frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_RZ_A1H/flctl_iodefine.h@93:9dd889aeda0e, 2014-12-05 (annotated)

Committer:
fblanc
Date:
Fri Dec 05 15:42:32 2014 +0000
Revision:
93:9dd889aeda0e
Parent:
92:4fc01daae5a5 
substitute line 894 extern } by }; /TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /*******************************************************************************
bogdanm 92:4fc01daae5a5 2 * DISCLAIMER
bogdanm 92:4fc01daae5a5 3 * This software is supplied by Renesas Electronics Corporation and is only
bogdanm 92:4fc01daae5a5 4 * intended for use with Renesas products. No other uses are authorized. This
bogdanm 92:4fc01daae5a5 5 * software is owned by Renesas Electronics Corporation and is protected under
bogdanm 92:4fc01daae5a5 6 * all applicable laws, including copyright laws.
bogdanm 92:4fc01daae5a5 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
bogdanm 92:4fc01daae5a5 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
bogdanm 92:4fc01daae5a5 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
bogdanm 92:4fc01daae5a5 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
bogdanm 92:4fc01daae5a5 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
bogdanm 92:4fc01daae5a5 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
bogdanm 92:4fc01daae5a5 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
bogdanm 92:4fc01daae5a5 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
bogdanm 92:4fc01daae5a5 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
bogdanm 92:4fc01daae5a5 16 * Renesas reserves the right, without notice, to make changes to this software
bogdanm 92:4fc01daae5a5 17 * and to discontinue the availability of this software. By using this software,
bogdanm 92:4fc01daae5a5 18 * you agree to the additional terms and conditions found by accessing the
bogdanm 92:4fc01daae5a5 19 * following link:
bogdanm 92:4fc01daae5a5 20 * http://www.renesas.com/disclaimer*
bogdanm 92:4fc01daae5a5 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
bogdanm 92:4fc01daae5a5 22 *******************************************************************************/
bogdanm 92:4fc01daae5a5 23 /*******************************************************************************
bogdanm 92:4fc01daae5a5 24 * File Name : flctl_iodefine.h
bogdanm 92:4fc01daae5a5 25 * $Rev: $
bogdanm 92:4fc01daae5a5 26 * $Date:: $
bogdanm 92:4fc01daae5a5 27 * Description : Definition of I/O Register (V1.00a)
bogdanm 92:4fc01daae5a5 28 ******************************************************************************/
bogdanm 92:4fc01daae5a5 29 #ifndef FLCTL_IODEFINE_H
bogdanm 92:4fc01daae5a5 30 #define FLCTL_IODEFINE_H
bogdanm 92:4fc01daae5a5 31 /* ->SEC M1.10.1 : Not magic number */
bogdanm 92:4fc01daae5a5 32
bogdanm 92:4fc01daae5a5 33 struct st_flctl
bogdanm 92:4fc01daae5a5 34 { /* FLCTL */
bogdanm 92:4fc01daae5a5 35 volatile uint32_t FLCMNCR; /* FLCMNCR */
bogdanm 92:4fc01daae5a5 36 volatile uint32_t FLCMDCR; /* FLCMDCR */
bogdanm 92:4fc01daae5a5 37 volatile uint32_t FLCMCDR; /* FLCMCDR */
bogdanm 92:4fc01daae5a5 38 volatile uint32_t FLADR; /* FLADR */
bogdanm 92:4fc01daae5a5 39 volatile uint32_t FLDATAR; /* FLDATAR */
bogdanm 92:4fc01daae5a5 40 volatile uint32_t FLDTCNTR; /* FLDTCNTR */
bogdanm 92:4fc01daae5a5 41 volatile uint32_t FLINTDMACR; /* FLINTDMACR */
bogdanm 92:4fc01daae5a5 42 volatile uint32_t FLBSYTMR; /* FLBSYTMR */
bogdanm 92:4fc01daae5a5 43 volatile uint32_t FLBSYCNT; /* FLBSYCNT */
bogdanm 92:4fc01daae5a5 44 volatile uint8_t dummy555[8]; /* */
bogdanm 92:4fc01daae5a5 45 volatile uint8_t FLTRCR; /* FLTRCR */
bogdanm 92:4fc01daae5a5 46 volatile uint8_t dummy556[15]; /* */
bogdanm 92:4fc01daae5a5 47 volatile uint32_t FLADR2; /* FLADR2 */
bogdanm 92:4fc01daae5a5 48 volatile uint8_t dummy557[16]; /* */
bogdanm 92:4fc01daae5a5 49 volatile uint32_t FLDTFIFO; /* FLDTFIFO */
bogdanm 92:4fc01daae5a5 50 volatile uint8_t dummy558[12]; /* */
bogdanm 92:4fc01daae5a5 51 volatile uint32_t FLECFIFO; /* FLECFIFO */
bogdanm 92:4fc01daae5a5 52 };
bogdanm 92:4fc01daae5a5 53
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 #define FLCTL (*(struct st_flctl *)0xFCFF4000uL) /* FLCTL */
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57
bogdanm 92:4fc01daae5a5 58 #define FLCTLFLCMNCR FLCTL.FLCMNCR
bogdanm 92:4fc01daae5a5 59 #define FLCTLFLCMDCR FLCTL.FLCMDCR
bogdanm 92:4fc01daae5a5 60 #define FLCTLFLCMCDR FLCTL.FLCMCDR
bogdanm 92:4fc01daae5a5 61 #define FLCTLFLADR FLCTL.FLADR
bogdanm 92:4fc01daae5a5 62 #define FLCTLFLDATAR FLCTL.FLDATAR
bogdanm 92:4fc01daae5a5 63 #define FLCTLFLDTCNTR FLCTL.FLDTCNTR
bogdanm 92:4fc01daae5a5 64 #define FLCTLFLINTDMACR FLCTL.FLINTDMACR
bogdanm 92:4fc01daae5a5 65 #define FLCTLFLBSYTMR FLCTL.FLBSYTMR
bogdanm 92:4fc01daae5a5 66 #define FLCTLFLBSYCNT FLCTL.FLBSYCNT
bogdanm 92:4fc01daae5a5 67 #define FLCTLFLTRCR FLCTL.FLTRCR
bogdanm 92:4fc01daae5a5 68 #define FLCTLFLADR2 FLCTL.FLADR2
bogdanm 92:4fc01daae5a5 69 #define FLCTLFLDTFIFO FLCTL.FLDTFIFO
bogdanm 92:4fc01daae5a5 70 #define FLCTLFLECFIFO FLCTL.FLECFIFO
bogdanm 92:4fc01daae5a5 71 /* <-SEC M1.10.1 */
bogdanm 92:4fc01daae5a5 72 #endif