frederic blanc
/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }
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TARGET_NUCLEO_F103RB/stm32f10x_sdio.h@93:9dd889aeda0e, 2014-12-05 (annotated)
- Committer:
- fblanc
- Date:
- Fri Dec 05 15:42:32 2014 +0000
- Revision:
- 93:9dd889aeda0e
- Parent:
- 77:869cf507173a
substitute line 894 extern } by }; /TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 73:1efda918f0ba | 1 | /** |
| bogdanm | 73:1efda918f0ba | 2 | ****************************************************************************** |
| bogdanm | 73:1efda918f0ba | 3 | * @file stm32f10x_sdio.h |
| bogdanm | 73:1efda918f0ba | 4 | * @author MCD Application Team |
| emilmont | 77:869cf507173a | 5 | * @version V3.6.1 |
| emilmont | 77:869cf507173a | 6 | * @date 05-March-2012 |
| bogdanm | 73:1efda918f0ba | 7 | * @brief This file contains all the functions prototypes for the SDIO firmware |
| bogdanm | 73:1efda918f0ba | 8 | * library. |
| bogdanm | 76:824293ae5e43 | 9 | ******************************************************************************* |
| bogdanm | 76:824293ae5e43 | 10 | * Copyright (c) 2014, STMicroelectronics |
| bogdanm | 76:824293ae5e43 | 11 | * All rights reserved. |
| bogdanm | 76:824293ae5e43 | 12 | * |
| bogdanm | 76:824293ae5e43 | 13 | * Redistribution and use in source and binary forms, with or without |
| bogdanm | 76:824293ae5e43 | 14 | * modification, are permitted provided that the following conditions are met: |
| bogdanm | 76:824293ae5e43 | 15 | * |
| bogdanm | 76:824293ae5e43 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 76:824293ae5e43 | 17 | * this list of conditions and the following disclaimer. |
| bogdanm | 76:824293ae5e43 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 76:824293ae5e43 | 19 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 76:824293ae5e43 | 20 | * and/or other materials provided with the distribution. |
| bogdanm | 76:824293ae5e43 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 76:824293ae5e43 | 22 | * may be used to endorse or promote products derived from this software |
| bogdanm | 76:824293ae5e43 | 23 | * without specific prior written permission. |
| bogdanm | 76:824293ae5e43 | 24 | * |
| bogdanm | 76:824293ae5e43 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 76:824293ae5e43 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 76:824293ae5e43 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 76:824293ae5e43 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 76:824293ae5e43 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 76:824293ae5e43 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 76:824293ae5e43 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 76:824293ae5e43 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 76:824293ae5e43 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 76:824293ae5e43 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 76:824293ae5e43 | 35 | ******************************************************************************* |
| bogdanm | 76:824293ae5e43 | 36 | */ |
| bogdanm | 73:1efda918f0ba | 37 | |
| bogdanm | 73:1efda918f0ba | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 73:1efda918f0ba | 39 | #ifndef __STM32F10x_SDIO_H |
| bogdanm | 73:1efda918f0ba | 40 | #define __STM32F10x_SDIO_H |
| bogdanm | 73:1efda918f0ba | 41 | |
| bogdanm | 73:1efda918f0ba | 42 | #ifdef __cplusplus |
| bogdanm | 73:1efda918f0ba | 43 | extern "C" { |
| bogdanm | 73:1efda918f0ba | 44 | #endif |
| bogdanm | 73:1efda918f0ba | 45 | |
| bogdanm | 73:1efda918f0ba | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 73:1efda918f0ba | 47 | #include "stm32f10x.h" |
| bogdanm | 73:1efda918f0ba | 48 | |
| bogdanm | 73:1efda918f0ba | 49 | /** @addtogroup STM32F10x_StdPeriph_Driver |
| bogdanm | 73:1efda918f0ba | 50 | * @{ |
| bogdanm | 73:1efda918f0ba | 51 | */ |
| bogdanm | 73:1efda918f0ba | 52 | |
| bogdanm | 73:1efda918f0ba | 53 | /** @addtogroup SDIO |
| bogdanm | 73:1efda918f0ba | 54 | * @{ |
| bogdanm | 73:1efda918f0ba | 55 | */ |
| bogdanm | 73:1efda918f0ba | 56 | |
| bogdanm | 73:1efda918f0ba | 57 | /** @defgroup SDIO_Exported_Types |
| bogdanm | 73:1efda918f0ba | 58 | * @{ |
| bogdanm | 73:1efda918f0ba | 59 | */ |
| bogdanm | 73:1efda918f0ba | 60 | |
| bogdanm | 73:1efda918f0ba | 61 | typedef struct |
| bogdanm | 73:1efda918f0ba | 62 | { |
| bogdanm | 73:1efda918f0ba | 63 | uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made. |
| bogdanm | 73:1efda918f0ba | 64 | This parameter can be a value of @ref SDIO_Clock_Edge */ |
| bogdanm | 73:1efda918f0ba | 65 | |
| bogdanm | 73:1efda918f0ba | 66 | uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is |
| bogdanm | 73:1efda918f0ba | 67 | enabled or disabled. |
| bogdanm | 73:1efda918f0ba | 68 | This parameter can be a value of @ref SDIO_Clock_Bypass */ |
| bogdanm | 73:1efda918f0ba | 69 | |
| bogdanm | 73:1efda918f0ba | 70 | uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or |
| bogdanm | 73:1efda918f0ba | 71 | disabled when the bus is idle. |
| bogdanm | 73:1efda918f0ba | 72 | This parameter can be a value of @ref SDIO_Clock_Power_Save */ |
| bogdanm | 73:1efda918f0ba | 73 | |
| bogdanm | 73:1efda918f0ba | 74 | uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width. |
| bogdanm | 73:1efda918f0ba | 75 | This parameter can be a value of @ref SDIO_Bus_Wide */ |
| bogdanm | 73:1efda918f0ba | 76 | |
| bogdanm | 73:1efda918f0ba | 77 | uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled. |
| bogdanm | 73:1efda918f0ba | 78 | This parameter can be a value of @ref SDIO_Hardware_Flow_Control */ |
| bogdanm | 73:1efda918f0ba | 79 | |
| bogdanm | 73:1efda918f0ba | 80 | uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller. |
| bogdanm | 73:1efda918f0ba | 81 | This parameter can be a value between 0x00 and 0xFF. */ |
| bogdanm | 73:1efda918f0ba | 82 | |
| bogdanm | 73:1efda918f0ba | 83 | } SDIO_InitTypeDef; |
| bogdanm | 73:1efda918f0ba | 84 | |
| bogdanm | 73:1efda918f0ba | 85 | typedef struct |
| bogdanm | 73:1efda918f0ba | 86 | { |
| bogdanm | 73:1efda918f0ba | 87 | uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent |
| bogdanm | 73:1efda918f0ba | 88 | to a card as part of a command message. If a command |
| bogdanm | 73:1efda918f0ba | 89 | contains an argument, it must be loaded into this register |
| bogdanm | 73:1efda918f0ba | 90 | before writing the command to the command register */ |
| bogdanm | 73:1efda918f0ba | 91 | |
| bogdanm | 73:1efda918f0ba | 92 | uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */ |
| bogdanm | 73:1efda918f0ba | 93 | |
| bogdanm | 73:1efda918f0ba | 94 | uint32_t SDIO_Response; /*!< Specifies the SDIO response type. |
| bogdanm | 73:1efda918f0ba | 95 | This parameter can be a value of @ref SDIO_Response_Type */ |
| bogdanm | 73:1efda918f0ba | 96 | |
| bogdanm | 73:1efda918f0ba | 97 | uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled. |
| bogdanm | 73:1efda918f0ba | 98 | This parameter can be a value of @ref SDIO_Wait_Interrupt_State */ |
| bogdanm | 73:1efda918f0ba | 99 | |
| bogdanm | 73:1efda918f0ba | 100 | uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM) |
| bogdanm | 73:1efda918f0ba | 101 | is enabled or disabled. |
| bogdanm | 73:1efda918f0ba | 102 | This parameter can be a value of @ref SDIO_CPSM_State */ |
| bogdanm | 73:1efda918f0ba | 103 | } SDIO_CmdInitTypeDef; |
| bogdanm | 73:1efda918f0ba | 104 | |
| bogdanm | 73:1efda918f0ba | 105 | typedef struct |
| bogdanm | 73:1efda918f0ba | 106 | { |
| bogdanm | 73:1efda918f0ba | 107 | uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */ |
| bogdanm | 73:1efda918f0ba | 108 | |
| bogdanm | 73:1efda918f0ba | 109 | uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */ |
| bogdanm | 73:1efda918f0ba | 110 | |
| bogdanm | 73:1efda918f0ba | 111 | uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer. |
| bogdanm | 73:1efda918f0ba | 112 | This parameter can be a value of @ref SDIO_Data_Block_Size */ |
| bogdanm | 73:1efda918f0ba | 113 | |
| bogdanm | 73:1efda918f0ba | 114 | uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer |
| bogdanm | 73:1efda918f0ba | 115 | is a read or write. |
| bogdanm | 73:1efda918f0ba | 116 | This parameter can be a value of @ref SDIO_Transfer_Direction */ |
| bogdanm | 73:1efda918f0ba | 117 | |
| bogdanm | 73:1efda918f0ba | 118 | uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode. |
| bogdanm | 73:1efda918f0ba | 119 | This parameter can be a value of @ref SDIO_Transfer_Type */ |
| bogdanm | 73:1efda918f0ba | 120 | |
| bogdanm | 73:1efda918f0ba | 121 | uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM) |
| bogdanm | 73:1efda918f0ba | 122 | is enabled or disabled. |
| bogdanm | 73:1efda918f0ba | 123 | This parameter can be a value of @ref SDIO_DPSM_State */ |
| bogdanm | 73:1efda918f0ba | 124 | } SDIO_DataInitTypeDef; |
| bogdanm | 73:1efda918f0ba | 125 | |
| bogdanm | 73:1efda918f0ba | 126 | /** |
| bogdanm | 73:1efda918f0ba | 127 | * @} |
| bogdanm | 73:1efda918f0ba | 128 | */ |
| bogdanm | 73:1efda918f0ba | 129 | |
| bogdanm | 73:1efda918f0ba | 130 | /** @defgroup SDIO_Exported_Constants |
| bogdanm | 73:1efda918f0ba | 131 | * @{ |
| bogdanm | 73:1efda918f0ba | 132 | */ |
| bogdanm | 73:1efda918f0ba | 133 | |
| bogdanm | 73:1efda918f0ba | 134 | /** @defgroup SDIO_Clock_Edge |
| bogdanm | 73:1efda918f0ba | 135 | * @{ |
| bogdanm | 73:1efda918f0ba | 136 | */ |
| bogdanm | 73:1efda918f0ba | 137 | |
| bogdanm | 73:1efda918f0ba | 138 | #define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 139 | #define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) |
| bogdanm | 73:1efda918f0ba | 140 | #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \ |
| bogdanm | 73:1efda918f0ba | 141 | ((EDGE) == SDIO_ClockEdge_Falling)) |
| bogdanm | 73:1efda918f0ba | 142 | /** |
| bogdanm | 73:1efda918f0ba | 143 | * @} |
| bogdanm | 73:1efda918f0ba | 144 | */ |
| bogdanm | 73:1efda918f0ba | 145 | |
| bogdanm | 73:1efda918f0ba | 146 | /** @defgroup SDIO_Clock_Bypass |
| bogdanm | 73:1efda918f0ba | 147 | * @{ |
| bogdanm | 73:1efda918f0ba | 148 | */ |
| bogdanm | 73:1efda918f0ba | 149 | |
| bogdanm | 73:1efda918f0ba | 150 | #define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 151 | #define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) |
| bogdanm | 73:1efda918f0ba | 152 | #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \ |
| bogdanm | 73:1efda918f0ba | 153 | ((BYPASS) == SDIO_ClockBypass_Enable)) |
| bogdanm | 73:1efda918f0ba | 154 | /** |
| bogdanm | 73:1efda918f0ba | 155 | * @} |
| bogdanm | 73:1efda918f0ba | 156 | */ |
| bogdanm | 73:1efda918f0ba | 157 | |
| bogdanm | 73:1efda918f0ba | 158 | /** @defgroup SDIO_Clock_Power_Save |
| bogdanm | 73:1efda918f0ba | 159 | * @{ |
| bogdanm | 73:1efda918f0ba | 160 | */ |
| bogdanm | 73:1efda918f0ba | 161 | |
| bogdanm | 73:1efda918f0ba | 162 | #define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 163 | #define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) |
| bogdanm | 73:1efda918f0ba | 164 | #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \ |
| bogdanm | 73:1efda918f0ba | 165 | ((SAVE) == SDIO_ClockPowerSave_Enable)) |
| bogdanm | 73:1efda918f0ba | 166 | /** |
| bogdanm | 73:1efda918f0ba | 167 | * @} |
| bogdanm | 73:1efda918f0ba | 168 | */ |
| bogdanm | 73:1efda918f0ba | 169 | |
| bogdanm | 73:1efda918f0ba | 170 | /** @defgroup SDIO_Bus_Wide |
| bogdanm | 73:1efda918f0ba | 171 | * @{ |
| bogdanm | 73:1efda918f0ba | 172 | */ |
| bogdanm | 73:1efda918f0ba | 173 | |
| bogdanm | 73:1efda918f0ba | 174 | #define SDIO_BusWide_1b ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 175 | #define SDIO_BusWide_4b ((uint32_t)0x00000800) |
| bogdanm | 73:1efda918f0ba | 176 | #define SDIO_BusWide_8b ((uint32_t)0x00001000) |
| bogdanm | 73:1efda918f0ba | 177 | #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \ |
| bogdanm | 73:1efda918f0ba | 178 | ((WIDE) == SDIO_BusWide_8b)) |
| bogdanm | 73:1efda918f0ba | 179 | |
| bogdanm | 73:1efda918f0ba | 180 | /** |
| bogdanm | 73:1efda918f0ba | 181 | * @} |
| bogdanm | 73:1efda918f0ba | 182 | */ |
| bogdanm | 73:1efda918f0ba | 183 | |
| bogdanm | 73:1efda918f0ba | 184 | /** @defgroup SDIO_Hardware_Flow_Control |
| bogdanm | 73:1efda918f0ba | 185 | * @{ |
| bogdanm | 73:1efda918f0ba | 186 | */ |
| bogdanm | 73:1efda918f0ba | 187 | |
| bogdanm | 73:1efda918f0ba | 188 | #define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 189 | #define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) |
| bogdanm | 73:1efda918f0ba | 190 | #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \ |
| bogdanm | 73:1efda918f0ba | 191 | ((CONTROL) == SDIO_HardwareFlowControl_Enable)) |
| bogdanm | 73:1efda918f0ba | 192 | /** |
| bogdanm | 73:1efda918f0ba | 193 | * @} |
| bogdanm | 73:1efda918f0ba | 194 | */ |
| bogdanm | 73:1efda918f0ba | 195 | |
| bogdanm | 73:1efda918f0ba | 196 | /** @defgroup SDIO_Power_State |
| bogdanm | 73:1efda918f0ba | 197 | * @{ |
| bogdanm | 73:1efda918f0ba | 198 | */ |
| bogdanm | 73:1efda918f0ba | 199 | |
| bogdanm | 73:1efda918f0ba | 200 | #define SDIO_PowerState_OFF ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 201 | #define SDIO_PowerState_ON ((uint32_t)0x00000003) |
| bogdanm | 73:1efda918f0ba | 202 | #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) |
| bogdanm | 73:1efda918f0ba | 203 | /** |
| bogdanm | 73:1efda918f0ba | 204 | * @} |
| bogdanm | 73:1efda918f0ba | 205 | */ |
| bogdanm | 73:1efda918f0ba | 206 | |
| bogdanm | 73:1efda918f0ba | 207 | |
| bogdanm | 73:1efda918f0ba | 208 | /** @defgroup SDIO_Interrupt_sources |
| bogdanm | 73:1efda918f0ba | 209 | * @{ |
| bogdanm | 73:1efda918f0ba | 210 | */ |
| bogdanm | 73:1efda918f0ba | 211 | |
| bogdanm | 73:1efda918f0ba | 212 | #define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) |
| bogdanm | 73:1efda918f0ba | 213 | #define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) |
| bogdanm | 73:1efda918f0ba | 214 | #define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) |
| bogdanm | 73:1efda918f0ba | 215 | #define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) |
| bogdanm | 73:1efda918f0ba | 216 | #define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) |
| bogdanm | 73:1efda918f0ba | 217 | #define SDIO_IT_RXOVERR ((uint32_t)0x00000020) |
| bogdanm | 73:1efda918f0ba | 218 | #define SDIO_IT_CMDREND ((uint32_t)0x00000040) |
| bogdanm | 73:1efda918f0ba | 219 | #define SDIO_IT_CMDSENT ((uint32_t)0x00000080) |
| bogdanm | 73:1efda918f0ba | 220 | #define SDIO_IT_DATAEND ((uint32_t)0x00000100) |
| bogdanm | 73:1efda918f0ba | 221 | #define SDIO_IT_STBITERR ((uint32_t)0x00000200) |
| bogdanm | 73:1efda918f0ba | 222 | #define SDIO_IT_DBCKEND ((uint32_t)0x00000400) |
| bogdanm | 73:1efda918f0ba | 223 | #define SDIO_IT_CMDACT ((uint32_t)0x00000800) |
| bogdanm | 73:1efda918f0ba | 224 | #define SDIO_IT_TXACT ((uint32_t)0x00001000) |
| bogdanm | 73:1efda918f0ba | 225 | #define SDIO_IT_RXACT ((uint32_t)0x00002000) |
| bogdanm | 73:1efda918f0ba | 226 | #define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) |
| bogdanm | 73:1efda918f0ba | 227 | #define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) |
| bogdanm | 73:1efda918f0ba | 228 | #define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) |
| bogdanm | 73:1efda918f0ba | 229 | #define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) |
| bogdanm | 73:1efda918f0ba | 230 | #define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) |
| bogdanm | 73:1efda918f0ba | 231 | #define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) |
| bogdanm | 73:1efda918f0ba | 232 | #define SDIO_IT_TXDAVL ((uint32_t)0x00100000) |
| bogdanm | 73:1efda918f0ba | 233 | #define SDIO_IT_RXDAVL ((uint32_t)0x00200000) |
| bogdanm | 73:1efda918f0ba | 234 | #define SDIO_IT_SDIOIT ((uint32_t)0x00400000) |
| bogdanm | 73:1efda918f0ba | 235 | #define SDIO_IT_CEATAEND ((uint32_t)0x00800000) |
| bogdanm | 73:1efda918f0ba | 236 | #define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) |
| bogdanm | 73:1efda918f0ba | 237 | /** |
| bogdanm | 73:1efda918f0ba | 238 | * @} |
| bogdanm | 73:1efda918f0ba | 239 | */ |
| bogdanm | 73:1efda918f0ba | 240 | |
| bogdanm | 73:1efda918f0ba | 241 | /** @defgroup SDIO_Command_Index |
| bogdanm | 73:1efda918f0ba | 242 | * @{ |
| bogdanm | 73:1efda918f0ba | 243 | */ |
| bogdanm | 73:1efda918f0ba | 244 | |
| bogdanm | 73:1efda918f0ba | 245 | #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) |
| bogdanm | 73:1efda918f0ba | 246 | /** |
| bogdanm | 73:1efda918f0ba | 247 | * @} |
| bogdanm | 73:1efda918f0ba | 248 | */ |
| bogdanm | 73:1efda918f0ba | 249 | |
| bogdanm | 73:1efda918f0ba | 250 | /** @defgroup SDIO_Response_Type |
| bogdanm | 73:1efda918f0ba | 251 | * @{ |
| bogdanm | 73:1efda918f0ba | 252 | */ |
| bogdanm | 73:1efda918f0ba | 253 | |
| bogdanm | 73:1efda918f0ba | 254 | #define SDIO_Response_No ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 255 | #define SDIO_Response_Short ((uint32_t)0x00000040) |
| bogdanm | 73:1efda918f0ba | 256 | #define SDIO_Response_Long ((uint32_t)0x000000C0) |
| bogdanm | 73:1efda918f0ba | 257 | #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \ |
| bogdanm | 73:1efda918f0ba | 258 | ((RESPONSE) == SDIO_Response_Short) || \ |
| bogdanm | 73:1efda918f0ba | 259 | ((RESPONSE) == SDIO_Response_Long)) |
| bogdanm | 73:1efda918f0ba | 260 | /** |
| bogdanm | 73:1efda918f0ba | 261 | * @} |
| bogdanm | 73:1efda918f0ba | 262 | */ |
| bogdanm | 73:1efda918f0ba | 263 | |
| bogdanm | 73:1efda918f0ba | 264 | /** @defgroup SDIO_Wait_Interrupt_State |
| bogdanm | 73:1efda918f0ba | 265 | * @{ |
| bogdanm | 73:1efda918f0ba | 266 | */ |
| bogdanm | 73:1efda918f0ba | 267 | |
| bogdanm | 73:1efda918f0ba | 268 | #define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ |
| bogdanm | 73:1efda918f0ba | 269 | #define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ |
| bogdanm | 73:1efda918f0ba | 270 | #define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ |
| bogdanm | 73:1efda918f0ba | 271 | #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \ |
| bogdanm | 73:1efda918f0ba | 272 | ((WAIT) == SDIO_Wait_Pend)) |
| bogdanm | 73:1efda918f0ba | 273 | /** |
| bogdanm | 73:1efda918f0ba | 274 | * @} |
| bogdanm | 73:1efda918f0ba | 275 | */ |
| bogdanm | 73:1efda918f0ba | 276 | |
| bogdanm | 73:1efda918f0ba | 277 | /** @defgroup SDIO_CPSM_State |
| bogdanm | 73:1efda918f0ba | 278 | * @{ |
| bogdanm | 73:1efda918f0ba | 279 | */ |
| bogdanm | 73:1efda918f0ba | 280 | |
| bogdanm | 73:1efda918f0ba | 281 | #define SDIO_CPSM_Disable ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 282 | #define SDIO_CPSM_Enable ((uint32_t)0x00000400) |
| bogdanm | 73:1efda918f0ba | 283 | #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable)) |
| bogdanm | 73:1efda918f0ba | 284 | /** |
| bogdanm | 73:1efda918f0ba | 285 | * @} |
| bogdanm | 73:1efda918f0ba | 286 | */ |
| bogdanm | 73:1efda918f0ba | 287 | |
| bogdanm | 73:1efda918f0ba | 288 | /** @defgroup SDIO_Response_Registers |
| bogdanm | 73:1efda918f0ba | 289 | * @{ |
| bogdanm | 73:1efda918f0ba | 290 | */ |
| bogdanm | 73:1efda918f0ba | 291 | |
| bogdanm | 73:1efda918f0ba | 292 | #define SDIO_RESP1 ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 293 | #define SDIO_RESP2 ((uint32_t)0x00000004) |
| bogdanm | 73:1efda918f0ba | 294 | #define SDIO_RESP3 ((uint32_t)0x00000008) |
| bogdanm | 73:1efda918f0ba | 295 | #define SDIO_RESP4 ((uint32_t)0x0000000C) |
| bogdanm | 73:1efda918f0ba | 296 | #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \ |
| bogdanm | 73:1efda918f0ba | 297 | ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) |
| bogdanm | 73:1efda918f0ba | 298 | /** |
| bogdanm | 73:1efda918f0ba | 299 | * @} |
| bogdanm | 73:1efda918f0ba | 300 | */ |
| bogdanm | 73:1efda918f0ba | 301 | |
| bogdanm | 73:1efda918f0ba | 302 | /** @defgroup SDIO_Data_Length |
| bogdanm | 73:1efda918f0ba | 303 | * @{ |
| bogdanm | 73:1efda918f0ba | 304 | */ |
| bogdanm | 73:1efda918f0ba | 305 | |
| bogdanm | 73:1efda918f0ba | 306 | #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) |
| bogdanm | 73:1efda918f0ba | 307 | /** |
| bogdanm | 73:1efda918f0ba | 308 | * @} |
| bogdanm | 73:1efda918f0ba | 309 | */ |
| bogdanm | 73:1efda918f0ba | 310 | |
| bogdanm | 73:1efda918f0ba | 311 | /** @defgroup SDIO_Data_Block_Size |
| bogdanm | 73:1efda918f0ba | 312 | * @{ |
| bogdanm | 73:1efda918f0ba | 313 | */ |
| bogdanm | 73:1efda918f0ba | 314 | |
| bogdanm | 73:1efda918f0ba | 315 | #define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 316 | #define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) |
| bogdanm | 73:1efda918f0ba | 317 | #define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) |
| bogdanm | 73:1efda918f0ba | 318 | #define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) |
| bogdanm | 73:1efda918f0ba | 319 | #define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) |
| bogdanm | 73:1efda918f0ba | 320 | #define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) |
| bogdanm | 73:1efda918f0ba | 321 | #define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) |
| bogdanm | 73:1efda918f0ba | 322 | #define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) |
| bogdanm | 73:1efda918f0ba | 323 | #define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) |
| bogdanm | 73:1efda918f0ba | 324 | #define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) |
| bogdanm | 73:1efda918f0ba | 325 | #define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) |
| bogdanm | 73:1efda918f0ba | 326 | #define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) |
| bogdanm | 73:1efda918f0ba | 327 | #define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) |
| bogdanm | 73:1efda918f0ba | 328 | #define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) |
| bogdanm | 73:1efda918f0ba | 329 | #define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) |
| bogdanm | 73:1efda918f0ba | 330 | #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \ |
| bogdanm | 73:1efda918f0ba | 331 | ((SIZE) == SDIO_DataBlockSize_2b) || \ |
| bogdanm | 73:1efda918f0ba | 332 | ((SIZE) == SDIO_DataBlockSize_4b) || \ |
| bogdanm | 73:1efda918f0ba | 333 | ((SIZE) == SDIO_DataBlockSize_8b) || \ |
| bogdanm | 73:1efda918f0ba | 334 | ((SIZE) == SDIO_DataBlockSize_16b) || \ |
| bogdanm | 73:1efda918f0ba | 335 | ((SIZE) == SDIO_DataBlockSize_32b) || \ |
| bogdanm | 73:1efda918f0ba | 336 | ((SIZE) == SDIO_DataBlockSize_64b) || \ |
| bogdanm | 73:1efda918f0ba | 337 | ((SIZE) == SDIO_DataBlockSize_128b) || \ |
| bogdanm | 73:1efda918f0ba | 338 | ((SIZE) == SDIO_DataBlockSize_256b) || \ |
| bogdanm | 73:1efda918f0ba | 339 | ((SIZE) == SDIO_DataBlockSize_512b) || \ |
| bogdanm | 73:1efda918f0ba | 340 | ((SIZE) == SDIO_DataBlockSize_1024b) || \ |
| bogdanm | 73:1efda918f0ba | 341 | ((SIZE) == SDIO_DataBlockSize_2048b) || \ |
| bogdanm | 73:1efda918f0ba | 342 | ((SIZE) == SDIO_DataBlockSize_4096b) || \ |
| bogdanm | 73:1efda918f0ba | 343 | ((SIZE) == SDIO_DataBlockSize_8192b) || \ |
| bogdanm | 73:1efda918f0ba | 344 | ((SIZE) == SDIO_DataBlockSize_16384b)) |
| bogdanm | 73:1efda918f0ba | 345 | /** |
| bogdanm | 73:1efda918f0ba | 346 | * @} |
| bogdanm | 73:1efda918f0ba | 347 | */ |
| bogdanm | 73:1efda918f0ba | 348 | |
| bogdanm | 73:1efda918f0ba | 349 | /** @defgroup SDIO_Transfer_Direction |
| bogdanm | 73:1efda918f0ba | 350 | * @{ |
| bogdanm | 73:1efda918f0ba | 351 | */ |
| bogdanm | 73:1efda918f0ba | 352 | |
| bogdanm | 73:1efda918f0ba | 353 | #define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 354 | #define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) |
| bogdanm | 73:1efda918f0ba | 355 | #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \ |
| bogdanm | 73:1efda918f0ba | 356 | ((DIR) == SDIO_TransferDir_ToSDIO)) |
| bogdanm | 73:1efda918f0ba | 357 | /** |
| bogdanm | 73:1efda918f0ba | 358 | * @} |
| bogdanm | 73:1efda918f0ba | 359 | */ |
| bogdanm | 73:1efda918f0ba | 360 | |
| bogdanm | 73:1efda918f0ba | 361 | /** @defgroup SDIO_Transfer_Type |
| bogdanm | 73:1efda918f0ba | 362 | * @{ |
| bogdanm | 73:1efda918f0ba | 363 | */ |
| bogdanm | 73:1efda918f0ba | 364 | |
| bogdanm | 73:1efda918f0ba | 365 | #define SDIO_TransferMode_Block ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 366 | #define SDIO_TransferMode_Stream ((uint32_t)0x00000004) |
| bogdanm | 73:1efda918f0ba | 367 | #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \ |
| bogdanm | 73:1efda918f0ba | 368 | ((MODE) == SDIO_TransferMode_Block)) |
| bogdanm | 73:1efda918f0ba | 369 | /** |
| bogdanm | 73:1efda918f0ba | 370 | * @} |
| bogdanm | 73:1efda918f0ba | 371 | */ |
| bogdanm | 73:1efda918f0ba | 372 | |
| bogdanm | 73:1efda918f0ba | 373 | /** @defgroup SDIO_DPSM_State |
| bogdanm | 73:1efda918f0ba | 374 | * @{ |
| bogdanm | 73:1efda918f0ba | 375 | */ |
| bogdanm | 73:1efda918f0ba | 376 | |
| bogdanm | 73:1efda918f0ba | 377 | #define SDIO_DPSM_Disable ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 378 | #define SDIO_DPSM_Enable ((uint32_t)0x00000001) |
| bogdanm | 73:1efda918f0ba | 379 | #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable)) |
| bogdanm | 73:1efda918f0ba | 380 | /** |
| bogdanm | 73:1efda918f0ba | 381 | * @} |
| bogdanm | 73:1efda918f0ba | 382 | */ |
| bogdanm | 73:1efda918f0ba | 383 | |
| bogdanm | 73:1efda918f0ba | 384 | /** @defgroup SDIO_Flags |
| bogdanm | 73:1efda918f0ba | 385 | * @{ |
| bogdanm | 73:1efda918f0ba | 386 | */ |
| bogdanm | 73:1efda918f0ba | 387 | |
| bogdanm | 73:1efda918f0ba | 388 | #define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) |
| bogdanm | 73:1efda918f0ba | 389 | #define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) |
| bogdanm | 73:1efda918f0ba | 390 | #define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) |
| bogdanm | 73:1efda918f0ba | 391 | #define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) |
| bogdanm | 73:1efda918f0ba | 392 | #define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) |
| bogdanm | 73:1efda918f0ba | 393 | #define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) |
| bogdanm | 73:1efda918f0ba | 394 | #define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) |
| bogdanm | 73:1efda918f0ba | 395 | #define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) |
| bogdanm | 73:1efda918f0ba | 396 | #define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) |
| bogdanm | 73:1efda918f0ba | 397 | #define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) |
| bogdanm | 73:1efda918f0ba | 398 | #define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) |
| bogdanm | 73:1efda918f0ba | 399 | #define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) |
| bogdanm | 73:1efda918f0ba | 400 | #define SDIO_FLAG_TXACT ((uint32_t)0x00001000) |
| bogdanm | 73:1efda918f0ba | 401 | #define SDIO_FLAG_RXACT ((uint32_t)0x00002000) |
| bogdanm | 73:1efda918f0ba | 402 | #define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) |
| bogdanm | 73:1efda918f0ba | 403 | #define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) |
| bogdanm | 73:1efda918f0ba | 404 | #define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) |
| bogdanm | 73:1efda918f0ba | 405 | #define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) |
| bogdanm | 73:1efda918f0ba | 406 | #define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) |
| bogdanm | 73:1efda918f0ba | 407 | #define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) |
| bogdanm | 73:1efda918f0ba | 408 | #define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) |
| bogdanm | 73:1efda918f0ba | 409 | #define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) |
| bogdanm | 73:1efda918f0ba | 410 | #define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) |
| bogdanm | 73:1efda918f0ba | 411 | #define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) |
| bogdanm | 73:1efda918f0ba | 412 | #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \ |
| bogdanm | 73:1efda918f0ba | 413 | ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ |
| bogdanm | 73:1efda918f0ba | 414 | ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ |
| bogdanm | 73:1efda918f0ba | 415 | ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ |
| bogdanm | 73:1efda918f0ba | 416 | ((FLAG) == SDIO_FLAG_TXUNDERR) || \ |
| bogdanm | 73:1efda918f0ba | 417 | ((FLAG) == SDIO_FLAG_RXOVERR) || \ |
| bogdanm | 73:1efda918f0ba | 418 | ((FLAG) == SDIO_FLAG_CMDREND) || \ |
| bogdanm | 73:1efda918f0ba | 419 | ((FLAG) == SDIO_FLAG_CMDSENT) || \ |
| bogdanm | 73:1efda918f0ba | 420 | ((FLAG) == SDIO_FLAG_DATAEND) || \ |
| bogdanm | 73:1efda918f0ba | 421 | ((FLAG) == SDIO_FLAG_STBITERR) || \ |
| bogdanm | 73:1efda918f0ba | 422 | ((FLAG) == SDIO_FLAG_DBCKEND) || \ |
| bogdanm | 73:1efda918f0ba | 423 | ((FLAG) == SDIO_FLAG_CMDACT) || \ |
| bogdanm | 73:1efda918f0ba | 424 | ((FLAG) == SDIO_FLAG_TXACT) || \ |
| bogdanm | 73:1efda918f0ba | 425 | ((FLAG) == SDIO_FLAG_RXACT) || \ |
| bogdanm | 73:1efda918f0ba | 426 | ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ |
| bogdanm | 73:1efda918f0ba | 427 | ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ |
| bogdanm | 73:1efda918f0ba | 428 | ((FLAG) == SDIO_FLAG_TXFIFOF) || \ |
| bogdanm | 73:1efda918f0ba | 429 | ((FLAG) == SDIO_FLAG_RXFIFOF) || \ |
| bogdanm | 73:1efda918f0ba | 430 | ((FLAG) == SDIO_FLAG_TXFIFOE) || \ |
| bogdanm | 73:1efda918f0ba | 431 | ((FLAG) == SDIO_FLAG_RXFIFOE) || \ |
| bogdanm | 73:1efda918f0ba | 432 | ((FLAG) == SDIO_FLAG_TXDAVL) || \ |
| bogdanm | 73:1efda918f0ba | 433 | ((FLAG) == SDIO_FLAG_RXDAVL) || \ |
| bogdanm | 73:1efda918f0ba | 434 | ((FLAG) == SDIO_FLAG_SDIOIT) || \ |
| bogdanm | 73:1efda918f0ba | 435 | ((FLAG) == SDIO_FLAG_CEATAEND)) |
| bogdanm | 73:1efda918f0ba | 436 | |
| bogdanm | 73:1efda918f0ba | 437 | #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) |
| bogdanm | 73:1efda918f0ba | 438 | |
| bogdanm | 73:1efda918f0ba | 439 | #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \ |
| bogdanm | 73:1efda918f0ba | 440 | ((IT) == SDIO_IT_DCRCFAIL) || \ |
| bogdanm | 73:1efda918f0ba | 441 | ((IT) == SDIO_IT_CTIMEOUT) || \ |
| bogdanm | 73:1efda918f0ba | 442 | ((IT) == SDIO_IT_DTIMEOUT) || \ |
| bogdanm | 73:1efda918f0ba | 443 | ((IT) == SDIO_IT_TXUNDERR) || \ |
| bogdanm | 73:1efda918f0ba | 444 | ((IT) == SDIO_IT_RXOVERR) || \ |
| bogdanm | 73:1efda918f0ba | 445 | ((IT) == SDIO_IT_CMDREND) || \ |
| bogdanm | 73:1efda918f0ba | 446 | ((IT) == SDIO_IT_CMDSENT) || \ |
| bogdanm | 73:1efda918f0ba | 447 | ((IT) == SDIO_IT_DATAEND) || \ |
| bogdanm | 73:1efda918f0ba | 448 | ((IT) == SDIO_IT_STBITERR) || \ |
| bogdanm | 73:1efda918f0ba | 449 | ((IT) == SDIO_IT_DBCKEND) || \ |
| bogdanm | 73:1efda918f0ba | 450 | ((IT) == SDIO_IT_CMDACT) || \ |
| bogdanm | 73:1efda918f0ba | 451 | ((IT) == SDIO_IT_TXACT) || \ |
| bogdanm | 73:1efda918f0ba | 452 | ((IT) == SDIO_IT_RXACT) || \ |
| bogdanm | 73:1efda918f0ba | 453 | ((IT) == SDIO_IT_TXFIFOHE) || \ |
| bogdanm | 73:1efda918f0ba | 454 | ((IT) == SDIO_IT_RXFIFOHF) || \ |
| bogdanm | 73:1efda918f0ba | 455 | ((IT) == SDIO_IT_TXFIFOF) || \ |
| bogdanm | 73:1efda918f0ba | 456 | ((IT) == SDIO_IT_RXFIFOF) || \ |
| bogdanm | 73:1efda918f0ba | 457 | ((IT) == SDIO_IT_TXFIFOE) || \ |
| bogdanm | 73:1efda918f0ba | 458 | ((IT) == SDIO_IT_RXFIFOE) || \ |
| bogdanm | 73:1efda918f0ba | 459 | ((IT) == SDIO_IT_TXDAVL) || \ |
| bogdanm | 73:1efda918f0ba | 460 | ((IT) == SDIO_IT_RXDAVL) || \ |
| bogdanm | 73:1efda918f0ba | 461 | ((IT) == SDIO_IT_SDIOIT) || \ |
| bogdanm | 73:1efda918f0ba | 462 | ((IT) == SDIO_IT_CEATAEND)) |
| bogdanm | 73:1efda918f0ba | 463 | |
| bogdanm | 73:1efda918f0ba | 464 | #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) |
| bogdanm | 73:1efda918f0ba | 465 | |
| bogdanm | 73:1efda918f0ba | 466 | /** |
| bogdanm | 73:1efda918f0ba | 467 | * @} |
| bogdanm | 73:1efda918f0ba | 468 | */ |
| bogdanm | 73:1efda918f0ba | 469 | |
| bogdanm | 73:1efda918f0ba | 470 | /** @defgroup SDIO_Read_Wait_Mode |
| bogdanm | 73:1efda918f0ba | 471 | * @{ |
| bogdanm | 73:1efda918f0ba | 472 | */ |
| bogdanm | 73:1efda918f0ba | 473 | |
| bogdanm | 73:1efda918f0ba | 474 | #define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001) |
| bogdanm | 73:1efda918f0ba | 475 | #define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 476 | #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \ |
| bogdanm | 73:1efda918f0ba | 477 | ((MODE) == SDIO_ReadWaitMode_DATA2)) |
| bogdanm | 73:1efda918f0ba | 478 | /** |
| bogdanm | 73:1efda918f0ba | 479 | * @} |
| bogdanm | 73:1efda918f0ba | 480 | */ |
| bogdanm | 73:1efda918f0ba | 481 | |
| bogdanm | 73:1efda918f0ba | 482 | /** |
| bogdanm | 73:1efda918f0ba | 483 | * @} |
| bogdanm | 73:1efda918f0ba | 484 | */ |
| bogdanm | 73:1efda918f0ba | 485 | |
| bogdanm | 73:1efda918f0ba | 486 | /** @defgroup SDIO_Exported_Macros |
| bogdanm | 73:1efda918f0ba | 487 | * @{ |
| bogdanm | 73:1efda918f0ba | 488 | */ |
| bogdanm | 73:1efda918f0ba | 489 | |
| bogdanm | 73:1efda918f0ba | 490 | /** |
| bogdanm | 73:1efda918f0ba | 491 | * @} |
| bogdanm | 73:1efda918f0ba | 492 | */ |
| bogdanm | 73:1efda918f0ba | 493 | |
| bogdanm | 73:1efda918f0ba | 494 | /** @defgroup SDIO_Exported_Functions |
| bogdanm | 73:1efda918f0ba | 495 | * @{ |
| bogdanm | 73:1efda918f0ba | 496 | */ |
| bogdanm | 73:1efda918f0ba | 497 | |
| bogdanm | 73:1efda918f0ba | 498 | void SDIO_DeInit(void); |
| bogdanm | 73:1efda918f0ba | 499 | void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct); |
| bogdanm | 73:1efda918f0ba | 500 | void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct); |
| bogdanm | 73:1efda918f0ba | 501 | void SDIO_ClockCmd(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 502 | void SDIO_SetPowerState(uint32_t SDIO_PowerState); |
| bogdanm | 73:1efda918f0ba | 503 | uint32_t SDIO_GetPowerState(void); |
| bogdanm | 73:1efda918f0ba | 504 | void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 505 | void SDIO_DMACmd(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 506 | void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct); |
| bogdanm | 73:1efda918f0ba | 507 | void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct); |
| bogdanm | 73:1efda918f0ba | 508 | uint8_t SDIO_GetCommandResponse(void); |
| bogdanm | 73:1efda918f0ba | 509 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); |
| bogdanm | 73:1efda918f0ba | 510 | void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct); |
| bogdanm | 73:1efda918f0ba | 511 | void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct); |
| bogdanm | 73:1efda918f0ba | 512 | uint32_t SDIO_GetDataCounter(void); |
| bogdanm | 73:1efda918f0ba | 513 | uint32_t SDIO_ReadData(void); |
| bogdanm | 73:1efda918f0ba | 514 | void SDIO_WriteData(uint32_t Data); |
| bogdanm | 73:1efda918f0ba | 515 | uint32_t SDIO_GetFIFOCount(void); |
| bogdanm | 73:1efda918f0ba | 516 | void SDIO_StartSDIOReadWait(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 517 | void SDIO_StopSDIOReadWait(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 518 | void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode); |
| bogdanm | 73:1efda918f0ba | 519 | void SDIO_SetSDIOOperation(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 520 | void SDIO_SendSDIOSuspendCmd(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 521 | void SDIO_CommandCompletionCmd(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 522 | void SDIO_CEATAITCmd(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 523 | void SDIO_SendCEATACmd(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 524 | FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); |
| bogdanm | 73:1efda918f0ba | 525 | void SDIO_ClearFlag(uint32_t SDIO_FLAG); |
| bogdanm | 73:1efda918f0ba | 526 | ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); |
| bogdanm | 73:1efda918f0ba | 527 | void SDIO_ClearITPendingBit(uint32_t SDIO_IT); |
| bogdanm | 73:1efda918f0ba | 528 | |
| bogdanm | 73:1efda918f0ba | 529 | #ifdef __cplusplus |
| bogdanm | 73:1efda918f0ba | 530 | } |
| bogdanm | 73:1efda918f0ba | 531 | #endif |
| bogdanm | 73:1efda918f0ba | 532 | |
| bogdanm | 73:1efda918f0ba | 533 | #endif /* __STM32F10x_SDIO_H */ |
| bogdanm | 73:1efda918f0ba | 534 | /** |
| bogdanm | 73:1efda918f0ba | 535 | * @} |
| bogdanm | 73:1efda918f0ba | 536 | */ |
| bogdanm | 73:1efda918f0ba | 537 | |
| bogdanm | 73:1efda918f0ba | 538 | /** |
| bogdanm | 73:1efda918f0ba | 539 | * @} |
| bogdanm | 73:1efda918f0ba | 540 | */ |
| bogdanm | 73:1efda918f0ba | 541 | |
| bogdanm | 73:1efda918f0ba | 542 | /** |
| bogdanm | 73:1efda918f0ba | 543 | * @} |
| bogdanm | 73:1efda918f0ba | 544 | */ |
| bogdanm | 73:1efda918f0ba | 545 | |
| emilmont | 77:869cf507173a | 546 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |