frederic blanc
/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }
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TARGET_NUCLEO_F103RB/stm32f10x_adc.h@93:9dd889aeda0e, 2014-12-05 (annotated)
- Committer:
- fblanc
- Date:
- Fri Dec 05 15:42:32 2014 +0000
- Revision:
- 93:9dd889aeda0e
- Parent:
- 77:869cf507173a
substitute line 894 extern } by }; /TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 73:1efda918f0ba | 1 | /** |
| bogdanm | 73:1efda918f0ba | 2 | ****************************************************************************** |
| bogdanm | 73:1efda918f0ba | 3 | * @file stm32f10x_adc.h |
| bogdanm | 73:1efda918f0ba | 4 | * @author MCD Application Team |
| emilmont | 77:869cf507173a | 5 | * @version V3.6.1 |
| emilmont | 77:869cf507173a | 6 | * @date 05-March-2012 |
| bogdanm | 73:1efda918f0ba | 7 | * @brief This file contains all the functions prototypes for the ADC firmware |
| bogdanm | 73:1efda918f0ba | 8 | * library. |
| bogdanm | 76:824293ae5e43 | 9 | ******************************************************************************* |
| bogdanm | 76:824293ae5e43 | 10 | * Copyright (c) 2014, STMicroelectronics |
| bogdanm | 76:824293ae5e43 | 11 | * All rights reserved. |
| bogdanm | 76:824293ae5e43 | 12 | * |
| bogdanm | 76:824293ae5e43 | 13 | * Redistribution and use in source and binary forms, with or without |
| bogdanm | 76:824293ae5e43 | 14 | * modification, are permitted provided that the following conditions are met: |
| bogdanm | 76:824293ae5e43 | 15 | * |
| bogdanm | 76:824293ae5e43 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 76:824293ae5e43 | 17 | * this list of conditions and the following disclaimer. |
| bogdanm | 76:824293ae5e43 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 76:824293ae5e43 | 19 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 76:824293ae5e43 | 20 | * and/or other materials provided with the distribution. |
| bogdanm | 76:824293ae5e43 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 76:824293ae5e43 | 22 | * may be used to endorse or promote products derived from this software |
| bogdanm | 76:824293ae5e43 | 23 | * without specific prior written permission. |
| bogdanm | 76:824293ae5e43 | 24 | * |
| bogdanm | 76:824293ae5e43 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 76:824293ae5e43 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 76:824293ae5e43 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 76:824293ae5e43 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 76:824293ae5e43 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 76:824293ae5e43 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 76:824293ae5e43 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 76:824293ae5e43 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 76:824293ae5e43 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 76:824293ae5e43 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 76:824293ae5e43 | 35 | ******************************************************************************* |
| bogdanm | 76:824293ae5e43 | 36 | */ |
| bogdanm | 73:1efda918f0ba | 37 | |
| bogdanm | 73:1efda918f0ba | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 73:1efda918f0ba | 39 | #ifndef __STM32F10x_ADC_H |
| bogdanm | 73:1efda918f0ba | 40 | #define __STM32F10x_ADC_H |
| bogdanm | 73:1efda918f0ba | 41 | |
| bogdanm | 73:1efda918f0ba | 42 | #ifdef __cplusplus |
| bogdanm | 73:1efda918f0ba | 43 | extern "C" { |
| bogdanm | 73:1efda918f0ba | 44 | #endif |
| bogdanm | 73:1efda918f0ba | 45 | |
| bogdanm | 73:1efda918f0ba | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 73:1efda918f0ba | 47 | #include "stm32f10x.h" |
| bogdanm | 73:1efda918f0ba | 48 | |
| bogdanm | 73:1efda918f0ba | 49 | /** @addtogroup STM32F10x_StdPeriph_Driver |
| bogdanm | 73:1efda918f0ba | 50 | * @{ |
| bogdanm | 73:1efda918f0ba | 51 | */ |
| bogdanm | 73:1efda918f0ba | 52 | |
| bogdanm | 73:1efda918f0ba | 53 | /** @addtogroup ADC |
| bogdanm | 73:1efda918f0ba | 54 | * @{ |
| bogdanm | 73:1efda918f0ba | 55 | */ |
| bogdanm | 73:1efda918f0ba | 56 | |
| bogdanm | 73:1efda918f0ba | 57 | /** @defgroup ADC_Exported_Types |
| bogdanm | 73:1efda918f0ba | 58 | * @{ |
| bogdanm | 73:1efda918f0ba | 59 | */ |
| bogdanm | 73:1efda918f0ba | 60 | |
| bogdanm | 73:1efda918f0ba | 61 | /** |
| bogdanm | 73:1efda918f0ba | 62 | * @brief ADC Init structure definition |
| bogdanm | 73:1efda918f0ba | 63 | */ |
| bogdanm | 73:1efda918f0ba | 64 | |
| bogdanm | 73:1efda918f0ba | 65 | typedef struct |
| bogdanm | 73:1efda918f0ba | 66 | { |
| bogdanm | 73:1efda918f0ba | 67 | uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or |
| bogdanm | 73:1efda918f0ba | 68 | dual mode. |
| bogdanm | 73:1efda918f0ba | 69 | This parameter can be a value of @ref ADC_mode */ |
| bogdanm | 73:1efda918f0ba | 70 | |
| bogdanm | 73:1efda918f0ba | 71 | FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in |
| bogdanm | 73:1efda918f0ba | 72 | Scan (multichannels) or Single (one channel) mode. |
| bogdanm | 73:1efda918f0ba | 73 | This parameter can be set to ENABLE or DISABLE */ |
| bogdanm | 73:1efda918f0ba | 74 | |
| bogdanm | 73:1efda918f0ba | 75 | FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in |
| bogdanm | 73:1efda918f0ba | 76 | Continuous or Single mode. |
| bogdanm | 73:1efda918f0ba | 77 | This parameter can be set to ENABLE or DISABLE. */ |
| bogdanm | 73:1efda918f0ba | 78 | |
| bogdanm | 73:1efda918f0ba | 79 | uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog |
| bogdanm | 73:1efda918f0ba | 80 | to digital conversion of regular channels. This parameter |
| bogdanm | 73:1efda918f0ba | 81 | can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */ |
| bogdanm | 73:1efda918f0ba | 82 | |
| bogdanm | 73:1efda918f0ba | 83 | uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right. |
| bogdanm | 73:1efda918f0ba | 84 | This parameter can be a value of @ref ADC_data_align */ |
| bogdanm | 73:1efda918f0ba | 85 | |
| bogdanm | 73:1efda918f0ba | 86 | uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted |
| bogdanm | 73:1efda918f0ba | 87 | using the sequencer for regular channel group. |
| bogdanm | 73:1efda918f0ba | 88 | This parameter must range from 1 to 16. */ |
| bogdanm | 73:1efda918f0ba | 89 | }ADC_InitTypeDef; |
| bogdanm | 73:1efda918f0ba | 90 | /** |
| bogdanm | 73:1efda918f0ba | 91 | * @} |
| bogdanm | 73:1efda918f0ba | 92 | */ |
| bogdanm | 73:1efda918f0ba | 93 | |
| bogdanm | 73:1efda918f0ba | 94 | /** @defgroup ADC_Exported_Constants |
| bogdanm | 73:1efda918f0ba | 95 | * @{ |
| bogdanm | 73:1efda918f0ba | 96 | */ |
| bogdanm | 73:1efda918f0ba | 97 | |
| bogdanm | 73:1efda918f0ba | 98 | #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ |
| bogdanm | 73:1efda918f0ba | 99 | ((PERIPH) == ADC2) || \ |
| bogdanm | 73:1efda918f0ba | 100 | ((PERIPH) == ADC3)) |
| bogdanm | 73:1efda918f0ba | 101 | |
| bogdanm | 73:1efda918f0ba | 102 | #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ |
| bogdanm | 73:1efda918f0ba | 103 | ((PERIPH) == ADC3)) |
| bogdanm | 73:1efda918f0ba | 104 | |
| bogdanm | 73:1efda918f0ba | 105 | /** @defgroup ADC_mode |
| bogdanm | 73:1efda918f0ba | 106 | * @{ |
| bogdanm | 73:1efda918f0ba | 107 | */ |
| bogdanm | 73:1efda918f0ba | 108 | |
| bogdanm | 73:1efda918f0ba | 109 | #define ADC_Mode_Independent ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 110 | #define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000) |
| bogdanm | 73:1efda918f0ba | 111 | #define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000) |
| bogdanm | 73:1efda918f0ba | 112 | #define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000) |
| bogdanm | 73:1efda918f0ba | 113 | #define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000) |
| bogdanm | 73:1efda918f0ba | 114 | #define ADC_Mode_InjecSimult ((uint32_t)0x00050000) |
| bogdanm | 73:1efda918f0ba | 115 | #define ADC_Mode_RegSimult ((uint32_t)0x00060000) |
| bogdanm | 73:1efda918f0ba | 116 | #define ADC_Mode_FastInterl ((uint32_t)0x00070000) |
| bogdanm | 73:1efda918f0ba | 117 | #define ADC_Mode_SlowInterl ((uint32_t)0x00080000) |
| bogdanm | 73:1efda918f0ba | 118 | #define ADC_Mode_AlterTrig ((uint32_t)0x00090000) |
| bogdanm | 73:1efda918f0ba | 119 | |
| bogdanm | 73:1efda918f0ba | 120 | #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \ |
| bogdanm | 73:1efda918f0ba | 121 | ((MODE) == ADC_Mode_RegInjecSimult) || \ |
| bogdanm | 73:1efda918f0ba | 122 | ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \ |
| bogdanm | 73:1efda918f0ba | 123 | ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \ |
| bogdanm | 73:1efda918f0ba | 124 | ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \ |
| bogdanm | 73:1efda918f0ba | 125 | ((MODE) == ADC_Mode_InjecSimult) || \ |
| bogdanm | 73:1efda918f0ba | 126 | ((MODE) == ADC_Mode_RegSimult) || \ |
| bogdanm | 73:1efda918f0ba | 127 | ((MODE) == ADC_Mode_FastInterl) || \ |
| bogdanm | 73:1efda918f0ba | 128 | ((MODE) == ADC_Mode_SlowInterl) || \ |
| bogdanm | 73:1efda918f0ba | 129 | ((MODE) == ADC_Mode_AlterTrig)) |
| bogdanm | 73:1efda918f0ba | 130 | /** |
| bogdanm | 73:1efda918f0ba | 131 | * @} |
| bogdanm | 73:1efda918f0ba | 132 | */ |
| bogdanm | 73:1efda918f0ba | 133 | |
| bogdanm | 73:1efda918f0ba | 134 | /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion |
| bogdanm | 73:1efda918f0ba | 135 | * @{ |
| bogdanm | 73:1efda918f0ba | 136 | */ |
| bogdanm | 73:1efda918f0ba | 137 | |
| bogdanm | 73:1efda918f0ba | 138 | #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 139 | #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 140 | #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 141 | #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 142 | #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 143 | #define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 144 | |
| bogdanm | 73:1efda918f0ba | 145 | #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 146 | #define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 147 | |
| bogdanm | 73:1efda918f0ba | 148 | #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 149 | #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 150 | #define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 151 | #define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 152 | #define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 153 | #define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 154 | |
| bogdanm | 73:1efda918f0ba | 155 | #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 156 | ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ |
| bogdanm | 73:1efda918f0ba | 157 | ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ |
| bogdanm | 73:1efda918f0ba | 158 | ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ |
| bogdanm | 73:1efda918f0ba | 159 | ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 160 | ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 161 | ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 162 | ((REGTRIG) == ADC_ExternalTrigConv_None) || \ |
| bogdanm | 73:1efda918f0ba | 163 | ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 164 | ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ |
| bogdanm | 73:1efda918f0ba | 165 | ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 166 | ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 167 | ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 168 | ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3)) |
| bogdanm | 73:1efda918f0ba | 169 | /** |
| bogdanm | 73:1efda918f0ba | 170 | * @} |
| bogdanm | 73:1efda918f0ba | 171 | */ |
| bogdanm | 73:1efda918f0ba | 172 | |
| bogdanm | 73:1efda918f0ba | 173 | /** @defgroup ADC_data_align |
| bogdanm | 73:1efda918f0ba | 174 | * @{ |
| bogdanm | 73:1efda918f0ba | 175 | */ |
| bogdanm | 73:1efda918f0ba | 176 | |
| bogdanm | 73:1efda918f0ba | 177 | #define ADC_DataAlign_Right ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 178 | #define ADC_DataAlign_Left ((uint32_t)0x00000800) |
| bogdanm | 73:1efda918f0ba | 179 | #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ |
| bogdanm | 73:1efda918f0ba | 180 | ((ALIGN) == ADC_DataAlign_Left)) |
| bogdanm | 73:1efda918f0ba | 181 | /** |
| bogdanm | 73:1efda918f0ba | 182 | * @} |
| bogdanm | 73:1efda918f0ba | 183 | */ |
| bogdanm | 73:1efda918f0ba | 184 | |
| bogdanm | 73:1efda918f0ba | 185 | /** @defgroup ADC_channels |
| bogdanm | 73:1efda918f0ba | 186 | * @{ |
| bogdanm | 73:1efda918f0ba | 187 | */ |
| bogdanm | 73:1efda918f0ba | 188 | |
| bogdanm | 73:1efda918f0ba | 189 | #define ADC_Channel_0 ((uint8_t)0x00) |
| bogdanm | 73:1efda918f0ba | 190 | #define ADC_Channel_1 ((uint8_t)0x01) |
| bogdanm | 73:1efda918f0ba | 191 | #define ADC_Channel_2 ((uint8_t)0x02) |
| bogdanm | 73:1efda918f0ba | 192 | #define ADC_Channel_3 ((uint8_t)0x03) |
| bogdanm | 73:1efda918f0ba | 193 | #define ADC_Channel_4 ((uint8_t)0x04) |
| bogdanm | 73:1efda918f0ba | 194 | #define ADC_Channel_5 ((uint8_t)0x05) |
| bogdanm | 73:1efda918f0ba | 195 | #define ADC_Channel_6 ((uint8_t)0x06) |
| bogdanm | 73:1efda918f0ba | 196 | #define ADC_Channel_7 ((uint8_t)0x07) |
| bogdanm | 73:1efda918f0ba | 197 | #define ADC_Channel_8 ((uint8_t)0x08) |
| bogdanm | 73:1efda918f0ba | 198 | #define ADC_Channel_9 ((uint8_t)0x09) |
| bogdanm | 73:1efda918f0ba | 199 | #define ADC_Channel_10 ((uint8_t)0x0A) |
| bogdanm | 73:1efda918f0ba | 200 | #define ADC_Channel_11 ((uint8_t)0x0B) |
| bogdanm | 73:1efda918f0ba | 201 | #define ADC_Channel_12 ((uint8_t)0x0C) |
| bogdanm | 73:1efda918f0ba | 202 | #define ADC_Channel_13 ((uint8_t)0x0D) |
| bogdanm | 73:1efda918f0ba | 203 | #define ADC_Channel_14 ((uint8_t)0x0E) |
| bogdanm | 73:1efda918f0ba | 204 | #define ADC_Channel_15 ((uint8_t)0x0F) |
| bogdanm | 73:1efda918f0ba | 205 | #define ADC_Channel_16 ((uint8_t)0x10) |
| bogdanm | 73:1efda918f0ba | 206 | #define ADC_Channel_17 ((uint8_t)0x11) |
| bogdanm | 73:1efda918f0ba | 207 | |
| bogdanm | 73:1efda918f0ba | 208 | #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16) |
| bogdanm | 73:1efda918f0ba | 209 | #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17) |
| bogdanm | 73:1efda918f0ba | 210 | |
| bogdanm | 73:1efda918f0ba | 211 | #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ |
| bogdanm | 73:1efda918f0ba | 212 | ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ |
| bogdanm | 73:1efda918f0ba | 213 | ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ |
| bogdanm | 73:1efda918f0ba | 214 | ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ |
| bogdanm | 73:1efda918f0ba | 215 | ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ |
| bogdanm | 73:1efda918f0ba | 216 | ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ |
| bogdanm | 73:1efda918f0ba | 217 | ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ |
| bogdanm | 73:1efda918f0ba | 218 | ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ |
| bogdanm | 73:1efda918f0ba | 219 | ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17)) |
| bogdanm | 73:1efda918f0ba | 220 | /** |
| bogdanm | 73:1efda918f0ba | 221 | * @} |
| bogdanm | 73:1efda918f0ba | 222 | */ |
| bogdanm | 73:1efda918f0ba | 223 | |
| bogdanm | 73:1efda918f0ba | 224 | /** @defgroup ADC_sampling_time |
| bogdanm | 73:1efda918f0ba | 225 | * @{ |
| bogdanm | 73:1efda918f0ba | 226 | */ |
| bogdanm | 73:1efda918f0ba | 227 | |
| bogdanm | 73:1efda918f0ba | 228 | #define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) |
| bogdanm | 73:1efda918f0ba | 229 | #define ADC_SampleTime_7Cycles5 ((uint8_t)0x01) |
| bogdanm | 73:1efda918f0ba | 230 | #define ADC_SampleTime_13Cycles5 ((uint8_t)0x02) |
| bogdanm | 73:1efda918f0ba | 231 | #define ADC_SampleTime_28Cycles5 ((uint8_t)0x03) |
| bogdanm | 73:1efda918f0ba | 232 | #define ADC_SampleTime_41Cycles5 ((uint8_t)0x04) |
| bogdanm | 73:1efda918f0ba | 233 | #define ADC_SampleTime_55Cycles5 ((uint8_t)0x05) |
| bogdanm | 73:1efda918f0ba | 234 | #define ADC_SampleTime_71Cycles5 ((uint8_t)0x06) |
| bogdanm | 73:1efda918f0ba | 235 | #define ADC_SampleTime_239Cycles5 ((uint8_t)0x07) |
| bogdanm | 73:1efda918f0ba | 236 | #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 237 | ((TIME) == ADC_SampleTime_7Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 238 | ((TIME) == ADC_SampleTime_13Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 239 | ((TIME) == ADC_SampleTime_28Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 240 | ((TIME) == ADC_SampleTime_41Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 241 | ((TIME) == ADC_SampleTime_55Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 242 | ((TIME) == ADC_SampleTime_71Cycles5) || \ |
| bogdanm | 73:1efda918f0ba | 243 | ((TIME) == ADC_SampleTime_239Cycles5)) |
| bogdanm | 73:1efda918f0ba | 244 | /** |
| bogdanm | 73:1efda918f0ba | 245 | * @} |
| bogdanm | 73:1efda918f0ba | 246 | */ |
| bogdanm | 73:1efda918f0ba | 247 | |
| bogdanm | 73:1efda918f0ba | 248 | /** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion |
| bogdanm | 73:1efda918f0ba | 249 | * @{ |
| bogdanm | 73:1efda918f0ba | 250 | */ |
| bogdanm | 73:1efda918f0ba | 251 | |
| bogdanm | 73:1efda918f0ba | 252 | #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 253 | #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 254 | #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 255 | #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 256 | #define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */ |
| bogdanm | 73:1efda918f0ba | 257 | |
| bogdanm | 73:1efda918f0ba | 258 | #define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 259 | #define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 260 | #define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */ |
| bogdanm | 73:1efda918f0ba | 261 | |
| bogdanm | 73:1efda918f0ba | 262 | #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 263 | #define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 264 | #define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 265 | #define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 266 | #define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */ |
| bogdanm | 73:1efda918f0ba | 267 | |
| bogdanm | 73:1efda918f0ba | 268 | #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 269 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 270 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 271 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ |
| bogdanm | 73:1efda918f0ba | 272 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 273 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 274 | ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 275 | ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \ |
| bogdanm | 73:1efda918f0ba | 276 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ |
| bogdanm | 73:1efda918f0ba | 277 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \ |
| bogdanm | 73:1efda918f0ba | 278 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \ |
| bogdanm | 73:1efda918f0ba | 279 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \ |
| bogdanm | 73:1efda918f0ba | 280 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4)) |
| bogdanm | 73:1efda918f0ba | 281 | /** |
| bogdanm | 73:1efda918f0ba | 282 | * @} |
| bogdanm | 73:1efda918f0ba | 283 | */ |
| bogdanm | 73:1efda918f0ba | 284 | |
| bogdanm | 73:1efda918f0ba | 285 | /** @defgroup ADC_injected_channel_selection |
| bogdanm | 73:1efda918f0ba | 286 | * @{ |
| bogdanm | 73:1efda918f0ba | 287 | */ |
| bogdanm | 73:1efda918f0ba | 288 | |
| bogdanm | 73:1efda918f0ba | 289 | #define ADC_InjectedChannel_1 ((uint8_t)0x14) |
| bogdanm | 73:1efda918f0ba | 290 | #define ADC_InjectedChannel_2 ((uint8_t)0x18) |
| bogdanm | 73:1efda918f0ba | 291 | #define ADC_InjectedChannel_3 ((uint8_t)0x1C) |
| bogdanm | 73:1efda918f0ba | 292 | #define ADC_InjectedChannel_4 ((uint8_t)0x20) |
| bogdanm | 73:1efda918f0ba | 293 | #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ |
| bogdanm | 73:1efda918f0ba | 294 | ((CHANNEL) == ADC_InjectedChannel_2) || \ |
| bogdanm | 73:1efda918f0ba | 295 | ((CHANNEL) == ADC_InjectedChannel_3) || \ |
| bogdanm | 73:1efda918f0ba | 296 | ((CHANNEL) == ADC_InjectedChannel_4)) |
| bogdanm | 73:1efda918f0ba | 297 | /** |
| bogdanm | 73:1efda918f0ba | 298 | * @} |
| bogdanm | 73:1efda918f0ba | 299 | */ |
| bogdanm | 73:1efda918f0ba | 300 | |
| bogdanm | 73:1efda918f0ba | 301 | /** @defgroup ADC_analog_watchdog_selection |
| bogdanm | 73:1efda918f0ba | 302 | * @{ |
| bogdanm | 73:1efda918f0ba | 303 | */ |
| bogdanm | 73:1efda918f0ba | 304 | |
| bogdanm | 73:1efda918f0ba | 305 | #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) |
| bogdanm | 73:1efda918f0ba | 306 | #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) |
| bogdanm | 73:1efda918f0ba | 307 | #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) |
| bogdanm | 73:1efda918f0ba | 308 | #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) |
| bogdanm | 73:1efda918f0ba | 309 | #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) |
| bogdanm | 73:1efda918f0ba | 310 | #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) |
| bogdanm | 73:1efda918f0ba | 311 | #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) |
| bogdanm | 73:1efda918f0ba | 312 | |
| bogdanm | 73:1efda918f0ba | 313 | #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ |
| bogdanm | 73:1efda918f0ba | 314 | ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ |
| bogdanm | 73:1efda918f0ba | 315 | ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ |
| bogdanm | 73:1efda918f0ba | 316 | ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ |
| bogdanm | 73:1efda918f0ba | 317 | ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ |
| bogdanm | 73:1efda918f0ba | 318 | ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ |
| bogdanm | 73:1efda918f0ba | 319 | ((WATCHDOG) == ADC_AnalogWatchdog_None)) |
| bogdanm | 73:1efda918f0ba | 320 | /** |
| bogdanm | 73:1efda918f0ba | 321 | * @} |
| bogdanm | 73:1efda918f0ba | 322 | */ |
| bogdanm | 73:1efda918f0ba | 323 | |
| bogdanm | 73:1efda918f0ba | 324 | /** @defgroup ADC_interrupts_definition |
| bogdanm | 73:1efda918f0ba | 325 | * @{ |
| bogdanm | 73:1efda918f0ba | 326 | */ |
| bogdanm | 73:1efda918f0ba | 327 | |
| bogdanm | 73:1efda918f0ba | 328 | #define ADC_IT_EOC ((uint16_t)0x0220) |
| bogdanm | 73:1efda918f0ba | 329 | #define ADC_IT_AWD ((uint16_t)0x0140) |
| bogdanm | 73:1efda918f0ba | 330 | #define ADC_IT_JEOC ((uint16_t)0x0480) |
| bogdanm | 73:1efda918f0ba | 331 | |
| bogdanm | 73:1efda918f0ba | 332 | #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00)) |
| bogdanm | 73:1efda918f0ba | 333 | |
| bogdanm | 73:1efda918f0ba | 334 | #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \ |
| bogdanm | 73:1efda918f0ba | 335 | ((IT) == ADC_IT_JEOC)) |
| bogdanm | 73:1efda918f0ba | 336 | /** |
| bogdanm | 73:1efda918f0ba | 337 | * @} |
| bogdanm | 73:1efda918f0ba | 338 | */ |
| bogdanm | 73:1efda918f0ba | 339 | |
| bogdanm | 73:1efda918f0ba | 340 | /** @defgroup ADC_flags_definition |
| bogdanm | 73:1efda918f0ba | 341 | * @{ |
| bogdanm | 73:1efda918f0ba | 342 | */ |
| bogdanm | 73:1efda918f0ba | 343 | |
| bogdanm | 73:1efda918f0ba | 344 | #define ADC_FLAG_AWD ((uint8_t)0x01) |
| bogdanm | 73:1efda918f0ba | 345 | #define ADC_FLAG_EOC ((uint8_t)0x02) |
| bogdanm | 73:1efda918f0ba | 346 | #define ADC_FLAG_JEOC ((uint8_t)0x04) |
| bogdanm | 73:1efda918f0ba | 347 | #define ADC_FLAG_JSTRT ((uint8_t)0x08) |
| bogdanm | 73:1efda918f0ba | 348 | #define ADC_FLAG_STRT ((uint8_t)0x10) |
| bogdanm | 73:1efda918f0ba | 349 | #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00)) |
| bogdanm | 73:1efda918f0ba | 350 | #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ |
| bogdanm | 73:1efda918f0ba | 351 | ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ |
| bogdanm | 73:1efda918f0ba | 352 | ((FLAG) == ADC_FLAG_STRT)) |
| bogdanm | 73:1efda918f0ba | 353 | /** |
| bogdanm | 73:1efda918f0ba | 354 | * @} |
| bogdanm | 73:1efda918f0ba | 355 | */ |
| bogdanm | 73:1efda918f0ba | 356 | |
| bogdanm | 73:1efda918f0ba | 357 | /** @defgroup ADC_thresholds |
| bogdanm | 73:1efda918f0ba | 358 | * @{ |
| bogdanm | 73:1efda918f0ba | 359 | */ |
| bogdanm | 73:1efda918f0ba | 360 | |
| bogdanm | 73:1efda918f0ba | 361 | #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) |
| bogdanm | 73:1efda918f0ba | 362 | |
| bogdanm | 73:1efda918f0ba | 363 | /** |
| bogdanm | 73:1efda918f0ba | 364 | * @} |
| bogdanm | 73:1efda918f0ba | 365 | */ |
| bogdanm | 73:1efda918f0ba | 366 | |
| bogdanm | 73:1efda918f0ba | 367 | /** @defgroup ADC_injected_offset |
| bogdanm | 73:1efda918f0ba | 368 | * @{ |
| bogdanm | 73:1efda918f0ba | 369 | */ |
| bogdanm | 73:1efda918f0ba | 370 | |
| bogdanm | 73:1efda918f0ba | 371 | #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) |
| bogdanm | 73:1efda918f0ba | 372 | |
| bogdanm | 73:1efda918f0ba | 373 | /** |
| bogdanm | 73:1efda918f0ba | 374 | * @} |
| bogdanm | 73:1efda918f0ba | 375 | */ |
| bogdanm | 73:1efda918f0ba | 376 | |
| bogdanm | 73:1efda918f0ba | 377 | /** @defgroup ADC_injected_length |
| bogdanm | 73:1efda918f0ba | 378 | * @{ |
| bogdanm | 73:1efda918f0ba | 379 | */ |
| bogdanm | 73:1efda918f0ba | 380 | |
| bogdanm | 73:1efda918f0ba | 381 | #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) |
| bogdanm | 73:1efda918f0ba | 382 | |
| bogdanm | 73:1efda918f0ba | 383 | /** |
| bogdanm | 73:1efda918f0ba | 384 | * @} |
| bogdanm | 73:1efda918f0ba | 385 | */ |
| bogdanm | 73:1efda918f0ba | 386 | |
| bogdanm | 73:1efda918f0ba | 387 | /** @defgroup ADC_injected_rank |
| bogdanm | 73:1efda918f0ba | 388 | * @{ |
| bogdanm | 73:1efda918f0ba | 389 | */ |
| bogdanm | 73:1efda918f0ba | 390 | |
| bogdanm | 73:1efda918f0ba | 391 | #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) |
| bogdanm | 73:1efda918f0ba | 392 | |
| bogdanm | 73:1efda918f0ba | 393 | /** |
| bogdanm | 73:1efda918f0ba | 394 | * @} |
| bogdanm | 73:1efda918f0ba | 395 | */ |
| bogdanm | 73:1efda918f0ba | 396 | |
| bogdanm | 73:1efda918f0ba | 397 | |
| bogdanm | 73:1efda918f0ba | 398 | /** @defgroup ADC_regular_length |
| bogdanm | 73:1efda918f0ba | 399 | * @{ |
| bogdanm | 73:1efda918f0ba | 400 | */ |
| bogdanm | 73:1efda918f0ba | 401 | |
| bogdanm | 73:1efda918f0ba | 402 | #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) |
| bogdanm | 73:1efda918f0ba | 403 | /** |
| bogdanm | 73:1efda918f0ba | 404 | * @} |
| bogdanm | 73:1efda918f0ba | 405 | */ |
| bogdanm | 73:1efda918f0ba | 406 | |
| bogdanm | 73:1efda918f0ba | 407 | /** @defgroup ADC_regular_rank |
| bogdanm | 73:1efda918f0ba | 408 | * @{ |
| bogdanm | 73:1efda918f0ba | 409 | */ |
| bogdanm | 73:1efda918f0ba | 410 | |
| bogdanm | 73:1efda918f0ba | 411 | #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) |
| bogdanm | 73:1efda918f0ba | 412 | |
| bogdanm | 73:1efda918f0ba | 413 | /** |
| bogdanm | 73:1efda918f0ba | 414 | * @} |
| bogdanm | 73:1efda918f0ba | 415 | */ |
| bogdanm | 73:1efda918f0ba | 416 | |
| bogdanm | 73:1efda918f0ba | 417 | /** @defgroup ADC_regular_discontinuous_mode_number |
| bogdanm | 73:1efda918f0ba | 418 | * @{ |
| bogdanm | 73:1efda918f0ba | 419 | */ |
| bogdanm | 73:1efda918f0ba | 420 | |
| bogdanm | 73:1efda918f0ba | 421 | #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) |
| bogdanm | 73:1efda918f0ba | 422 | |
| bogdanm | 73:1efda918f0ba | 423 | /** |
| bogdanm | 73:1efda918f0ba | 424 | * @} |
| bogdanm | 73:1efda918f0ba | 425 | */ |
| bogdanm | 73:1efda918f0ba | 426 | |
| bogdanm | 73:1efda918f0ba | 427 | /** |
| bogdanm | 73:1efda918f0ba | 428 | * @} |
| bogdanm | 73:1efda918f0ba | 429 | */ |
| bogdanm | 73:1efda918f0ba | 430 | |
| bogdanm | 73:1efda918f0ba | 431 | /** @defgroup ADC_Exported_Macros |
| bogdanm | 73:1efda918f0ba | 432 | * @{ |
| bogdanm | 73:1efda918f0ba | 433 | */ |
| bogdanm | 73:1efda918f0ba | 434 | |
| bogdanm | 73:1efda918f0ba | 435 | /** |
| bogdanm | 73:1efda918f0ba | 436 | * @} |
| bogdanm | 73:1efda918f0ba | 437 | */ |
| bogdanm | 73:1efda918f0ba | 438 | |
| bogdanm | 73:1efda918f0ba | 439 | /** @defgroup ADC_Exported_Functions |
| bogdanm | 73:1efda918f0ba | 440 | * @{ |
| bogdanm | 73:1efda918f0ba | 441 | */ |
| bogdanm | 73:1efda918f0ba | 442 | |
| bogdanm | 73:1efda918f0ba | 443 | void ADC_DeInit(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 444 | void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); |
| bogdanm | 73:1efda918f0ba | 445 | void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); |
| bogdanm | 73:1efda918f0ba | 446 | void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 447 | void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 448 | void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 449 | void ADC_ResetCalibration(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 450 | FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 451 | void ADC_StartCalibration(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 452 | FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 453 | void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 454 | FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 455 | void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); |
| bogdanm | 73:1efda918f0ba | 456 | void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 457 | void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); |
| bogdanm | 73:1efda918f0ba | 458 | void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 459 | uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 460 | uint32_t ADC_GetDualModeConversionValue(void); |
| bogdanm | 73:1efda918f0ba | 461 | void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 462 | void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 463 | void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); |
| bogdanm | 73:1efda918f0ba | 464 | void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 465 | void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 466 | FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx); |
| bogdanm | 73:1efda918f0ba | 467 | void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); |
| bogdanm | 73:1efda918f0ba | 468 | void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length); |
| bogdanm | 73:1efda918f0ba | 469 | void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset); |
| bogdanm | 73:1efda918f0ba | 470 | uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel); |
| bogdanm | 73:1efda918f0ba | 471 | void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); |
| bogdanm | 73:1efda918f0ba | 472 | void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); |
| bogdanm | 73:1efda918f0ba | 473 | void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); |
| bogdanm | 73:1efda918f0ba | 474 | void ADC_TempSensorVrefintCmd(FunctionalState NewState); |
| bogdanm | 73:1efda918f0ba | 475 | FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); |
| bogdanm | 73:1efda918f0ba | 476 | void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); |
| bogdanm | 73:1efda918f0ba | 477 | ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); |
| bogdanm | 73:1efda918f0ba | 478 | void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); |
| bogdanm | 73:1efda918f0ba | 479 | |
| bogdanm | 73:1efda918f0ba | 480 | #ifdef __cplusplus |
| bogdanm | 73:1efda918f0ba | 481 | } |
| bogdanm | 73:1efda918f0ba | 482 | #endif |
| bogdanm | 73:1efda918f0ba | 483 | |
| bogdanm | 73:1efda918f0ba | 484 | #endif /*__STM32F10x_ADC_H */ |
| bogdanm | 73:1efda918f0ba | 485 | |
| bogdanm | 73:1efda918f0ba | 486 | /** |
| bogdanm | 73:1efda918f0ba | 487 | * @} |
| bogdanm | 73:1efda918f0ba | 488 | */ |
| bogdanm | 73:1efda918f0ba | 489 | |
| bogdanm | 73:1efda918f0ba | 490 | /** |
| bogdanm | 73:1efda918f0ba | 491 | * @} |
| bogdanm | 73:1efda918f0ba | 492 | */ |
| bogdanm | 73:1efda918f0ba | 493 | |
| bogdanm | 73:1efda918f0ba | 494 | /** |
| bogdanm | 73:1efda918f0ba | 495 | * @} |
| bogdanm | 73:1efda918f0ba | 496 | */ |
| bogdanm | 73:1efda918f0ba | 497 | |
| emilmont | 77:869cf507173a | 498 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |