/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }
Fork of mbed by
TARGET_NUCLEO_F072RB/stm32f0xx_hal_uart_ex.h@93:9dd889aeda0e, 2014-12-05 (annotated)
- Committer:
- fblanc
- Date:
- Fri Dec 05 15:42:32 2014 +0000
- Revision:
- 93:9dd889aeda0e
- Parent:
- 92:4fc01daae5a5
substitute line 894 extern } by }; /TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 85:024bf7f99721 | 1 | /** |
bogdanm | 85:024bf7f99721 | 2 | ****************************************************************************** |
bogdanm | 85:024bf7f99721 | 3 | * @file stm32f0xx_hal_uart_ex.h |
bogdanm | 85:024bf7f99721 | 4 | * @author MCD Application Team |
bogdanm | 92:4fc01daae5a5 | 5 | * @version V1.1.0 |
bogdanm | 92:4fc01daae5a5 | 6 | * @date 03-Oct-2014 |
bogdanm | 85:024bf7f99721 | 7 | * @brief Header file of UART HAL Extension module. |
bogdanm | 85:024bf7f99721 | 8 | ****************************************************************************** |
bogdanm | 85:024bf7f99721 | 9 | * @attention |
bogdanm | 85:024bf7f99721 | 10 | * |
bogdanm | 85:024bf7f99721 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 85:024bf7f99721 | 12 | * |
bogdanm | 85:024bf7f99721 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 85:024bf7f99721 | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 85:024bf7f99721 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 85:024bf7f99721 | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 85:024bf7f99721 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 85:024bf7f99721 | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 85:024bf7f99721 | 19 | * and/or other materials provided with the distribution. |
bogdanm | 85:024bf7f99721 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 85:024bf7f99721 | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 85:024bf7f99721 | 22 | * without specific prior written permission. |
bogdanm | 85:024bf7f99721 | 23 | * |
bogdanm | 85:024bf7f99721 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 85:024bf7f99721 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 85:024bf7f99721 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 85:024bf7f99721 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 85:024bf7f99721 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 85:024bf7f99721 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 85:024bf7f99721 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 85:024bf7f99721 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 85:024bf7f99721 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 85:024bf7f99721 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 85:024bf7f99721 | 34 | * |
bogdanm | 85:024bf7f99721 | 35 | ****************************************************************************** |
bogdanm | 85:024bf7f99721 | 36 | */ |
bogdanm | 85:024bf7f99721 | 37 | |
bogdanm | 85:024bf7f99721 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 85:024bf7f99721 | 39 | #ifndef __STM32F0xx_HAL_UART_EX_H |
bogdanm | 85:024bf7f99721 | 40 | #define __STM32F0xx_HAL_UART_EX_H |
bogdanm | 85:024bf7f99721 | 41 | |
bogdanm | 85:024bf7f99721 | 42 | #ifdef __cplusplus |
bogdanm | 85:024bf7f99721 | 43 | extern "C" { |
bogdanm | 85:024bf7f99721 | 44 | #endif |
bogdanm | 85:024bf7f99721 | 45 | |
bogdanm | 85:024bf7f99721 | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 85:024bf7f99721 | 47 | #include "stm32f0xx_hal_def.h" |
bogdanm | 85:024bf7f99721 | 48 | |
bogdanm | 85:024bf7f99721 | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
bogdanm | 85:024bf7f99721 | 50 | * @{ |
bogdanm | 85:024bf7f99721 | 51 | */ |
bogdanm | 85:024bf7f99721 | 52 | |
bogdanm | 85:024bf7f99721 | 53 | /** @addtogroup UARTEx |
bogdanm | 85:024bf7f99721 | 54 | * @{ |
bogdanm | 85:024bf7f99721 | 55 | */ |
bogdanm | 85:024bf7f99721 | 56 | |
bogdanm | 85:024bf7f99721 | 57 | /* Exported types ------------------------------------------------------------*/ |
bogdanm | 85:024bf7f99721 | 58 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 59 | /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants |
bogdanm | 85:024bf7f99721 | 60 | * @{ |
bogdanm | 85:024bf7f99721 | 61 | */ |
bogdanm | 85:024bf7f99721 | 62 | |
bogdanm | 92:4fc01daae5a5 | 63 | /** @defgroup UARTEx_Word_Length UARTEx Word Length |
bogdanm | 85:024bf7f99721 | 64 | * @{ |
bogdanm | 85:024bf7f99721 | 65 | */ |
bogdanm | 85:024bf7f99721 | 66 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
bogdanm | 92:4fc01daae5a5 | 67 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
bogdanm | 92:4fc01daae5a5 | 68 | defined (STM32F091xC) || defined (STM32F098xx) |
bogdanm | 85:024bf7f99721 | 69 | #define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) |
bogdanm | 85:024bf7f99721 | 70 | #define UART_WORDLENGTH_8B ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 71 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) |
bogdanm | 85:024bf7f99721 | 72 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_7B) || \ |
bogdanm | 85:024bf7f99721 | 73 | ((LENGTH) == UART_WORDLENGTH_8B) || \ |
bogdanm | 85:024bf7f99721 | 74 | ((LENGTH) == UART_WORDLENGTH_9B)) |
bogdanm | 85:024bf7f99721 | 75 | #else |
bogdanm | 85:024bf7f99721 | 76 | #define UART_WORDLENGTH_8B ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 77 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
bogdanm | 85:024bf7f99721 | 78 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
bogdanm | 85:024bf7f99721 | 79 | ((LENGTH) == UART_WORDLENGTH_9B)) |
bogdanm | 85:024bf7f99721 | 80 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
bogdanm | 92:4fc01daae5a5 | 81 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
bogdanm | 92:4fc01daae5a5 | 82 | defined (STM32F091xC) || defined (STM32F098xx) */ |
bogdanm | 85:024bf7f99721 | 83 | /** |
bogdanm | 85:024bf7f99721 | 84 | * @} |
bogdanm | 85:024bf7f99721 | 85 | */ |
bogdanm | 85:024bf7f99721 | 86 | |
bogdanm | 92:4fc01daae5a5 | 87 | /** @defgroup UARTEx_AutoBaud_Rate_Mode UARTEx Advanced Feature AutoBaud Rate Mode |
bogdanm | 85:024bf7f99721 | 88 | * @{ |
bogdanm | 85:024bf7f99721 | 89 | */ |
bogdanm | 85:024bf7f99721 | 90 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
bogdanm | 92:4fc01daae5a5 | 91 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
bogdanm | 92:4fc01daae5a5 | 92 | defined (STM32F091xC) || defined (STM32F098xx) |
bogdanm | 85:024bf7f99721 | 93 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000) |
bogdanm | 85:024bf7f99721 | 94 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) |
bogdanm | 85:024bf7f99721 | 95 | #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) |
bogdanm | 85:024bf7f99721 | 96 | #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) |
bogdanm | 85:024bf7f99721 | 97 | #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ |
bogdanm | 85:024bf7f99721 | 98 | ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ |
bogdanm | 85:024bf7f99721 | 99 | ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ |
bogdanm | 85:024bf7f99721 | 100 | ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) |
bogdanm | 85:024bf7f99721 | 101 | #else |
bogdanm | 85:024bf7f99721 | 102 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000) |
bogdanm | 85:024bf7f99721 | 103 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) |
bogdanm | 85:024bf7f99721 | 104 | #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ |
bogdanm | 85:024bf7f99721 | 105 | ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE)) |
bogdanm | 85:024bf7f99721 | 106 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
bogdanm | 92:4fc01daae5a5 | 107 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
bogdanm | 92:4fc01daae5a5 | 108 | defined (STM32F091xC) || defined (STM32F098xx) */ |
bogdanm | 85:024bf7f99721 | 109 | /** |
bogdanm | 85:024bf7f99721 | 110 | * @} |
bogdanm | 85:024bf7f99721 | 111 | */ |
bogdanm | 85:024bf7f99721 | 112 | |
bogdanm | 85:024bf7f99721 | 113 | |
bogdanm | 85:024bf7f99721 | 114 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 92:4fc01daae5a5 | 115 | /** @defgroup UARTEx_LIN UARTEx Local Interconnection Network mode |
bogdanm | 85:024bf7f99721 | 116 | * @{ |
bogdanm | 85:024bf7f99721 | 117 | */ |
bogdanm | 85:024bf7f99721 | 118 | #define UART_LIN_DISABLE ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 119 | #define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) |
bogdanm | 85:024bf7f99721 | 120 | #define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) || \ |
bogdanm | 85:024bf7f99721 | 121 | ((LIN) == UART_LIN_ENABLE)) |
bogdanm | 85:024bf7f99721 | 122 | /** |
bogdanm | 85:024bf7f99721 | 123 | * @} |
bogdanm | 85:024bf7f99721 | 124 | */ |
bogdanm | 85:024bf7f99721 | 125 | |
bogdanm | 92:4fc01daae5a5 | 126 | /** @defgroup UARTEx_LIN_Break_Detection UARTEx LIN Break Detection |
bogdanm | 85:024bf7f99721 | 127 | * @{ |
bogdanm | 85:024bf7f99721 | 128 | */ |
bogdanm | 85:024bf7f99721 | 129 | #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 130 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
bogdanm | 85:024bf7f99721 | 131 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
bogdanm | 85:024bf7f99721 | 132 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
bogdanm | 85:024bf7f99721 | 133 | /** |
bogdanm | 85:024bf7f99721 | 134 | * @} |
bogdanm | 85:024bf7f99721 | 135 | */ |
bogdanm | 85:024bf7f99721 | 136 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 137 | |
bogdanm | 92:4fc01daae5a5 | 138 | /** @defgroup UART_Flags UARTEx Status Flags |
bogdanm | 85:024bf7f99721 | 139 | * Elements values convention: 0xXXXX |
bogdanm | 85:024bf7f99721 | 140 | * - 0xXXXX : Flag mask in the ISR register |
bogdanm | 85:024bf7f99721 | 141 | * @{ |
bogdanm | 85:024bf7f99721 | 142 | */ |
bogdanm | 85:024bf7f99721 | 143 | #define UART_FLAG_REACK ((uint32_t)0x00400000) |
bogdanm | 85:024bf7f99721 | 144 | #define UART_FLAG_TEACK ((uint32_t)0x00200000) |
bogdanm | 85:024bf7f99721 | 145 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 85:024bf7f99721 | 146 | #define UART_FLAG_WUF ((uint32_t)0x00100000) |
bogdanm | 85:024bf7f99721 | 147 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 148 | #define UART_FLAG_RWU ((uint32_t)0x00080000) |
bogdanm | 85:024bf7f99721 | 149 | #define UART_FLAG_SBKF ((uint32_t)0x00040000 |
bogdanm | 85:024bf7f99721 | 150 | #define UART_FLAG_CMF ((uint32_t)0x00020000) |
bogdanm | 85:024bf7f99721 | 151 | #define UART_FLAG_BUSY ((uint32_t)0x00010000) |
bogdanm | 85:024bf7f99721 | 152 | #define UART_FLAG_ABRF ((uint32_t)0x00008000) |
bogdanm | 85:024bf7f99721 | 153 | #define UART_FLAG_ABRE ((uint32_t)0x00004000) |
bogdanm | 85:024bf7f99721 | 154 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 85:024bf7f99721 | 155 | #define UART_FLAG_EOBF ((uint32_t)0x00001000) |
bogdanm | 85:024bf7f99721 | 156 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 157 | #define UART_FLAG_RTOF ((uint32_t)0x00000800) |
bogdanm | 85:024bf7f99721 | 158 | #define UART_FLAG_CTS ((uint32_t)0x00000400) |
bogdanm | 85:024bf7f99721 | 159 | #define UART_FLAG_CTSIF ((uint32_t)0x00000200) |
bogdanm | 85:024bf7f99721 | 160 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 85:024bf7f99721 | 161 | #define UART_FLAG_LBDF ((uint32_t)0x00000100) |
bogdanm | 85:024bf7f99721 | 162 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 163 | #define UART_FLAG_TXE ((uint32_t)0x00000080) |
bogdanm | 85:024bf7f99721 | 164 | #define UART_FLAG_TC ((uint32_t)0x00000040) |
bogdanm | 85:024bf7f99721 | 165 | #define UART_FLAG_RXNE ((uint32_t)0x00000020) |
bogdanm | 85:024bf7f99721 | 166 | #define UART_FLAG_IDLE ((uint32_t)0x00000010) |
bogdanm | 85:024bf7f99721 | 167 | #define UART_FLAG_ORE ((uint32_t)0x00000008) |
bogdanm | 85:024bf7f99721 | 168 | #define UART_FLAG_NE ((uint32_t)0x00000004) |
bogdanm | 85:024bf7f99721 | 169 | #define UART_FLAG_FE ((uint32_t)0x00000002) |
bogdanm | 85:024bf7f99721 | 170 | #define UART_FLAG_PE ((uint32_t)0x00000001) |
bogdanm | 85:024bf7f99721 | 171 | /** |
bogdanm | 85:024bf7f99721 | 172 | * @} |
bogdanm | 85:024bf7f99721 | 173 | */ |
bogdanm | 85:024bf7f99721 | 174 | |
bogdanm | 92:4fc01daae5a5 | 175 | /** @defgroup UART_Interrupt_definition UARTEx Interrupts Definition |
bogdanm | 85:024bf7f99721 | 176 | * Elements values convention: 0000ZZZZ0XXYYYYYb |
bogdanm | 85:024bf7f99721 | 177 | * - YYYYY : Interrupt source position in the XX register (5bits) |
bogdanm | 85:024bf7f99721 | 178 | * - XX : Interrupt source register (2bits) |
bogdanm | 85:024bf7f99721 | 179 | * - 01: CR1 register |
bogdanm | 85:024bf7f99721 | 180 | * - 10: CR2 register |
bogdanm | 85:024bf7f99721 | 181 | * - 11: CR3 register |
bogdanm | 85:024bf7f99721 | 182 | * - ZZZZ : Flag position in the ISR register(4bits) |
bogdanm | 85:024bf7f99721 | 183 | * @{ |
bogdanm | 85:024bf7f99721 | 184 | */ |
bogdanm | 85:024bf7f99721 | 185 | #define UART_IT_PE ((uint16_t)0x0028) |
bogdanm | 85:024bf7f99721 | 186 | #define UART_IT_TXE ((uint16_t)0x0727) |
bogdanm | 85:024bf7f99721 | 187 | #define UART_IT_TC ((uint16_t)0x0626) |
bogdanm | 85:024bf7f99721 | 188 | #define UART_IT_RXNE ((uint16_t)0x0525) |
bogdanm | 85:024bf7f99721 | 189 | #define UART_IT_IDLE ((uint16_t)0x0424) |
bogdanm | 85:024bf7f99721 | 190 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 85:024bf7f99721 | 191 | #define UART_IT_LBD ((uint16_t)0x0846) |
bogdanm | 85:024bf7f99721 | 192 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 193 | #define UART_IT_CTS ((uint16_t)0x096A) |
bogdanm | 85:024bf7f99721 | 194 | #define UART_IT_CM ((uint16_t)0x142E) |
bogdanm | 85:024bf7f99721 | 195 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 85:024bf7f99721 | 196 | #define UART_IT_WUF ((uint16_t)0x1476) |
bogdanm | 85:024bf7f99721 | 197 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 198 | /** |
bogdanm | 85:024bf7f99721 | 199 | * @} |
bogdanm | 85:024bf7f99721 | 200 | */ |
bogdanm | 85:024bf7f99721 | 201 | |
bogdanm | 85:024bf7f99721 | 202 | |
bogdanm | 92:4fc01daae5a5 | 203 | /** @defgroup UART_IT_CLEAR_Flags UARTEx Interruption Clear Flags |
bogdanm | 85:024bf7f99721 | 204 | * @{ |
bogdanm | 85:024bf7f99721 | 205 | */ |
bogdanm | 85:024bf7f99721 | 206 | #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
bogdanm | 85:024bf7f99721 | 207 | #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
bogdanm | 85:024bf7f99721 | 208 | #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ |
bogdanm | 85:024bf7f99721 | 209 | #define UART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ |
bogdanm | 85:024bf7f99721 | 210 | #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
bogdanm | 85:024bf7f99721 | 211 | #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
bogdanm | 85:024bf7f99721 | 212 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 85:024bf7f99721 | 213 | #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag (not available on F030xx devices)*/ |
bogdanm | 85:024bf7f99721 | 214 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 215 | #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ |
bogdanm | 85:024bf7f99721 | 216 | #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */ |
bogdanm | 85:024bf7f99721 | 217 | #define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */ |
bogdanm | 85:024bf7f99721 | 218 | #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ |
bogdanm | 85:024bf7f99721 | 219 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 85:024bf7f99721 | 220 | #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ |
bogdanm | 85:024bf7f99721 | 221 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 222 | /** |
bogdanm | 85:024bf7f99721 | 223 | * @} |
bogdanm | 85:024bf7f99721 | 224 | */ |
bogdanm | 85:024bf7f99721 | 225 | |
bogdanm | 92:4fc01daae5a5 | 226 | /** @defgroup UART_Request_Parameters UARTEx Request Parameters |
bogdanm | 85:024bf7f99721 | 227 | * @{ |
bogdanm | 85:024bf7f99721 | 228 | */ |
bogdanm | 85:024bf7f99721 | 229 | #define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */ |
bogdanm | 85:024bf7f99721 | 230 | #define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */ |
bogdanm | 85:024bf7f99721 | 231 | #define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */ |
bogdanm | 85:024bf7f99721 | 232 | #define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ |
bogdanm | 85:024bf7f99721 | 233 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 85:024bf7f99721 | 234 | #define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ |
bogdanm | 85:024bf7f99721 | 235 | #define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) || \ |
bogdanm | 85:024bf7f99721 | 236 | ((PARAM) == UART_SENDBREAK_REQUEST) || \ |
bogdanm | 85:024bf7f99721 | 237 | ((PARAM) == UART_MUTE_MODE_REQUEST) || \ |
bogdanm | 85:024bf7f99721 | 238 | ((PARAM) == UART_RXDATA_FLUSH_REQUEST) || \ |
bogdanm | 85:024bf7f99721 | 239 | ((PARAM) == UART_TXDATA_FLUSH_REQUEST)) |
bogdanm | 85:024bf7f99721 | 240 | #else |
bogdanm | 85:024bf7f99721 | 241 | #define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) || \ |
bogdanm | 85:024bf7f99721 | 242 | ((PARAM) == UART_SENDBREAK_REQUEST) || \ |
bogdanm | 85:024bf7f99721 | 243 | ((PARAM) == UART_MUTE_MODE_REQUEST) || \ |
bogdanm | 85:024bf7f99721 | 244 | ((PARAM) == UART_RXDATA_FLUSH_REQUEST)) |
bogdanm | 85:024bf7f99721 | 245 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 246 | /** |
bogdanm | 85:024bf7f99721 | 247 | * @} |
bogdanm | 85:024bf7f99721 | 248 | */ |
bogdanm | 85:024bf7f99721 | 249 | |
bogdanm | 85:024bf7f99721 | 250 | #if !defined(STM32F030x6) && !defined(STM32F030x8) |
bogdanm | 92:4fc01daae5a5 | 251 | /** @defgroup UART_Stop_Mode_Enable UARTEx Advanced Feature Stop Mode Enable |
bogdanm | 85:024bf7f99721 | 252 | * @{ |
bogdanm | 85:024bf7f99721 | 253 | */ |
bogdanm | 85:024bf7f99721 | 254 | #define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 255 | #define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) |
bogdanm | 85:024bf7f99721 | 256 | #define IS_UART_ADVFEATURE_STOPMODE(STOPMODE) (((STOPMODE) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ |
bogdanm | 85:024bf7f99721 | 257 | ((STOPMODE) == UART_ADVFEATURE_STOPMODE_ENABLE)) |
bogdanm | 85:024bf7f99721 | 258 | /** |
bogdanm | 85:024bf7f99721 | 259 | * @} |
bogdanm | 85:024bf7f99721 | 260 | */ |
bogdanm | 85:024bf7f99721 | 261 | |
bogdanm | 85:024bf7f99721 | 262 | /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection |
bogdanm | 85:024bf7f99721 | 263 | * @{ |
bogdanm | 85:024bf7f99721 | 264 | */ |
bogdanm | 85:024bf7f99721 | 265 | #define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x0000) |
bogdanm | 85:024bf7f99721 | 266 | #define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) |
bogdanm | 85:024bf7f99721 | 267 | #define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) |
bogdanm | 85:024bf7f99721 | 268 | #define IS_UART_WAKEUP_SELECTION(WAKE) (((WAKE) == UART_WAKEUP_ON_ADDRESS) || \ |
bogdanm | 85:024bf7f99721 | 269 | ((WAKE) == UART_WAKEUP_ON_STARTBIT) || \ |
bogdanm | 85:024bf7f99721 | 270 | ((WAKE) == UART_WAKEUP_ON_READDATA_NONEMPTY)) |
bogdanm | 85:024bf7f99721 | 271 | /** |
bogdanm | 85:024bf7f99721 | 272 | * @} |
bogdanm | 85:024bf7f99721 | 273 | */ |
bogdanm | 85:024bf7f99721 | 274 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */ |
bogdanm | 85:024bf7f99721 | 275 | |
bogdanm | 85:024bf7f99721 | 276 | /** |
bogdanm | 85:024bf7f99721 | 277 | * @} |
bogdanm | 85:024bf7f99721 | 278 | */ |
bogdanm | 85:024bf7f99721 | 279 | |
bogdanm | 85:024bf7f99721 | 280 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 85:024bf7f99721 | 281 | |
bogdanm | 92:4fc01daae5a5 | 282 | /** @defgroup UARTEx_Exported_Macros UARTEx Exported Macros |
bogdanm | 85:024bf7f99721 | 283 | * @{ |
bogdanm | 85:024bf7f99721 | 284 | */ |
bogdanm | 85:024bf7f99721 | 285 | |
bogdanm | 85:024bf7f99721 | 286 | /** @brief Reports the UART clock source. |
bogdanm | 85:024bf7f99721 | 287 | * @param __HANDLE__: specifies the UART Handle |
bogdanm | 85:024bf7f99721 | 288 | * @param __CLOCKSOURCE__ : output variable |
bogdanm | 85:024bf7f99721 | 289 | * @retval UART clocking source, written in __CLOCKSOURCE__. |
bogdanm | 85:024bf7f99721 | 290 | */ |
bogdanm | 85:024bf7f99721 | 291 | |
bogdanm | 85:024bf7f99721 | 292 | |
bogdanm | 85:024bf7f99721 | 293 | #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) |
bogdanm | 85:024bf7f99721 | 294 | #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
bogdanm | 85:024bf7f99721 | 295 | do { \ |
bogdanm | 85:024bf7f99721 | 296 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
bogdanm | 85:024bf7f99721 | 297 | { \ |
bogdanm | 85:024bf7f99721 | 298 | case RCC_USART1CLKSOURCE_PCLK1: \ |
bogdanm | 85:024bf7f99721 | 299 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 85:024bf7f99721 | 300 | break; \ |
bogdanm | 85:024bf7f99721 | 301 | case RCC_USART1CLKSOURCE_HSI: \ |
bogdanm | 85:024bf7f99721 | 302 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
bogdanm | 85:024bf7f99721 | 303 | break; \ |
bogdanm | 85:024bf7f99721 | 304 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
bogdanm | 85:024bf7f99721 | 305 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
bogdanm | 85:024bf7f99721 | 306 | break; \ |
bogdanm | 85:024bf7f99721 | 307 | case RCC_USART1CLKSOURCE_LSE: \ |
bogdanm | 85:024bf7f99721 | 308 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
bogdanm | 85:024bf7f99721 | 309 | break; \ |
bogdanm | 85:024bf7f99721 | 310 | default: \ |
bogdanm | 85:024bf7f99721 | 311 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 85:024bf7f99721 | 312 | break; \ |
bogdanm | 85:024bf7f99721 | 313 | } \ |
bogdanm | 85:024bf7f99721 | 314 | } while(0) |
bogdanm | 85:024bf7f99721 | 315 | #elif defined (STM32F030x8) || \ |
bogdanm | 85:024bf7f99721 | 316 | defined (STM32F042x6) || defined (STM32F048xx) || \ |
bogdanm | 85:024bf7f99721 | 317 | defined (STM32F051x8) || defined (STM32F058xx) |
bogdanm | 85:024bf7f99721 | 318 | #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
bogdanm | 85:024bf7f99721 | 319 | do { \ |
bogdanm | 85:024bf7f99721 | 320 | if((__HANDLE__)->Instance == USART1) \ |
bogdanm | 85:024bf7f99721 | 321 | { \ |
bogdanm | 85:024bf7f99721 | 322 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
bogdanm | 85:024bf7f99721 | 323 | { \ |
bogdanm | 85:024bf7f99721 | 324 | case RCC_USART1CLKSOURCE_PCLK1: \ |
bogdanm | 85:024bf7f99721 | 325 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 85:024bf7f99721 | 326 | break; \ |
bogdanm | 85:024bf7f99721 | 327 | case RCC_USART1CLKSOURCE_HSI: \ |
bogdanm | 85:024bf7f99721 | 328 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
bogdanm | 85:024bf7f99721 | 329 | break; \ |
bogdanm | 85:024bf7f99721 | 330 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
bogdanm | 85:024bf7f99721 | 331 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
bogdanm | 85:024bf7f99721 | 332 | break; \ |
bogdanm | 85:024bf7f99721 | 333 | case RCC_USART1CLKSOURCE_LSE: \ |
bogdanm | 85:024bf7f99721 | 334 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
bogdanm | 85:024bf7f99721 | 335 | break; \ |
bogdanm | 85:024bf7f99721 | 336 | default: \ |
bogdanm | 85:024bf7f99721 | 337 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 85:024bf7f99721 | 338 | break; \ |
bogdanm | 85:024bf7f99721 | 339 | } \ |
bogdanm | 85:024bf7f99721 | 340 | } \ |
bogdanm | 85:024bf7f99721 | 341 | else if((__HANDLE__)->Instance == USART2) \ |
bogdanm | 85:024bf7f99721 | 342 | { \ |
bogdanm | 85:024bf7f99721 | 343 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 85:024bf7f99721 | 344 | } \ |
bogdanm | 85:024bf7f99721 | 345 | else \ |
bogdanm | 85:024bf7f99721 | 346 | { \ |
bogdanm | 85:024bf7f99721 | 347 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 85:024bf7f99721 | 348 | } \ |
bogdanm | 85:024bf7f99721 | 349 | } while(0) |
bogdanm | 85:024bf7f99721 | 350 | #elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) |
bogdanm | 85:024bf7f99721 | 351 | #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
bogdanm | 85:024bf7f99721 | 352 | do { \ |
bogdanm | 85:024bf7f99721 | 353 | if((__HANDLE__)->Instance == USART1) \ |
bogdanm | 85:024bf7f99721 | 354 | { \ |
bogdanm | 85:024bf7f99721 | 355 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
bogdanm | 85:024bf7f99721 | 356 | { \ |
bogdanm | 85:024bf7f99721 | 357 | case RCC_USART1CLKSOURCE_PCLK1: \ |
bogdanm | 85:024bf7f99721 | 358 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 85:024bf7f99721 | 359 | break; \ |
bogdanm | 85:024bf7f99721 | 360 | case RCC_USART1CLKSOURCE_HSI: \ |
bogdanm | 85:024bf7f99721 | 361 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
bogdanm | 85:024bf7f99721 | 362 | break; \ |
bogdanm | 85:024bf7f99721 | 363 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
bogdanm | 85:024bf7f99721 | 364 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
bogdanm | 85:024bf7f99721 | 365 | break; \ |
bogdanm | 85:024bf7f99721 | 366 | case RCC_USART1CLKSOURCE_LSE: \ |
bogdanm | 85:024bf7f99721 | 367 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
bogdanm | 85:024bf7f99721 | 368 | break; \ |
bogdanm | 85:024bf7f99721 | 369 | default: \ |
bogdanm | 85:024bf7f99721 | 370 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 85:024bf7f99721 | 371 | break; \ |
bogdanm | 85:024bf7f99721 | 372 | } \ |
bogdanm | 85:024bf7f99721 | 373 | } \ |
bogdanm | 85:024bf7f99721 | 374 | else if((__HANDLE__)->Instance == USART2) \ |
bogdanm | 85:024bf7f99721 | 375 | { \ |
bogdanm | 85:024bf7f99721 | 376 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
bogdanm | 85:024bf7f99721 | 377 | { \ |
bogdanm | 85:024bf7f99721 | 378 | case RCC_USART2CLKSOURCE_PCLK1: \ |
bogdanm | 85:024bf7f99721 | 379 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 85:024bf7f99721 | 380 | break; \ |
bogdanm | 85:024bf7f99721 | 381 | case RCC_USART2CLKSOURCE_HSI: \ |
bogdanm | 85:024bf7f99721 | 382 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
bogdanm | 85:024bf7f99721 | 383 | break; \ |
bogdanm | 85:024bf7f99721 | 384 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
bogdanm | 85:024bf7f99721 | 385 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
bogdanm | 85:024bf7f99721 | 386 | break; \ |
bogdanm | 85:024bf7f99721 | 387 | case RCC_USART2CLKSOURCE_LSE: \ |
bogdanm | 85:024bf7f99721 | 388 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
bogdanm | 85:024bf7f99721 | 389 | break; \ |
bogdanm | 85:024bf7f99721 | 390 | default: \ |
bogdanm | 85:024bf7f99721 | 391 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 85:024bf7f99721 | 392 | break; \ |
bogdanm | 85:024bf7f99721 | 393 | } \ |
bogdanm | 85:024bf7f99721 | 394 | } \ |
bogdanm | 85:024bf7f99721 | 395 | else if((__HANDLE__)->Instance == USART3) \ |
bogdanm | 85:024bf7f99721 | 396 | { \ |
bogdanm | 85:024bf7f99721 | 397 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 85:024bf7f99721 | 398 | } \ |
bogdanm | 85:024bf7f99721 | 399 | else if((__HANDLE__)->Instance == USART4) \ |
bogdanm | 85:024bf7f99721 | 400 | { \ |
bogdanm | 85:024bf7f99721 | 401 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 85:024bf7f99721 | 402 | } \ |
bogdanm | 85:024bf7f99721 | 403 | else \ |
bogdanm | 85:024bf7f99721 | 404 | { \ |
bogdanm | 85:024bf7f99721 | 405 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 85:024bf7f99721 | 406 | } \ |
bogdanm | 85:024bf7f99721 | 407 | } while(0) |
bogdanm | 92:4fc01daae5a5 | 408 | #elif defined(STM32F091xC) || defined (STM32F098xx) |
bogdanm | 92:4fc01daae5a5 | 409 | #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
bogdanm | 92:4fc01daae5a5 | 410 | do { \ |
bogdanm | 92:4fc01daae5a5 | 411 | if((__HANDLE__)->Instance == USART1) \ |
bogdanm | 92:4fc01daae5a5 | 412 | { \ |
bogdanm | 92:4fc01daae5a5 | 413 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
bogdanm | 92:4fc01daae5a5 | 414 | { \ |
bogdanm | 92:4fc01daae5a5 | 415 | case RCC_USART1CLKSOURCE_PCLK1: \ |
bogdanm | 92:4fc01daae5a5 | 416 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 92:4fc01daae5a5 | 417 | break; \ |
bogdanm | 92:4fc01daae5a5 | 418 | case RCC_USART1CLKSOURCE_HSI: \ |
bogdanm | 92:4fc01daae5a5 | 419 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
bogdanm | 92:4fc01daae5a5 | 420 | break; \ |
bogdanm | 92:4fc01daae5a5 | 421 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
bogdanm | 92:4fc01daae5a5 | 422 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
bogdanm | 92:4fc01daae5a5 | 423 | break; \ |
bogdanm | 92:4fc01daae5a5 | 424 | case RCC_USART1CLKSOURCE_LSE: \ |
bogdanm | 92:4fc01daae5a5 | 425 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
bogdanm | 92:4fc01daae5a5 | 426 | break; \ |
bogdanm | 92:4fc01daae5a5 | 427 | default: \ |
bogdanm | 92:4fc01daae5a5 | 428 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 92:4fc01daae5a5 | 429 | break; \ |
bogdanm | 92:4fc01daae5a5 | 430 | } \ |
bogdanm | 92:4fc01daae5a5 | 431 | } \ |
bogdanm | 92:4fc01daae5a5 | 432 | else if((__HANDLE__)->Instance == USART2) \ |
bogdanm | 92:4fc01daae5a5 | 433 | { \ |
bogdanm | 92:4fc01daae5a5 | 434 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
bogdanm | 92:4fc01daae5a5 | 435 | { \ |
bogdanm | 92:4fc01daae5a5 | 436 | case RCC_USART2CLKSOURCE_PCLK1: \ |
bogdanm | 92:4fc01daae5a5 | 437 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 92:4fc01daae5a5 | 438 | break; \ |
bogdanm | 92:4fc01daae5a5 | 439 | case RCC_USART2CLKSOURCE_HSI: \ |
bogdanm | 92:4fc01daae5a5 | 440 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
bogdanm | 92:4fc01daae5a5 | 441 | break; \ |
bogdanm | 92:4fc01daae5a5 | 442 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
bogdanm | 92:4fc01daae5a5 | 443 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
bogdanm | 92:4fc01daae5a5 | 444 | break; \ |
bogdanm | 92:4fc01daae5a5 | 445 | case RCC_USART2CLKSOURCE_LSE: \ |
bogdanm | 92:4fc01daae5a5 | 446 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
bogdanm | 92:4fc01daae5a5 | 447 | break; \ |
bogdanm | 92:4fc01daae5a5 | 448 | default: \ |
bogdanm | 92:4fc01daae5a5 | 449 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 92:4fc01daae5a5 | 450 | break; \ |
bogdanm | 92:4fc01daae5a5 | 451 | } \ |
bogdanm | 92:4fc01daae5a5 | 452 | } \ |
bogdanm | 92:4fc01daae5a5 | 453 | else if((__HANDLE__)->Instance == USART3) \ |
bogdanm | 92:4fc01daae5a5 | 454 | { \ |
bogdanm | 92:4fc01daae5a5 | 455 | switch(__HAL_RCC_GET_USART3_SOURCE()) \ |
bogdanm | 92:4fc01daae5a5 | 456 | { \ |
bogdanm | 92:4fc01daae5a5 | 457 | case RCC_USART3CLKSOURCE_PCLK1: \ |
bogdanm | 92:4fc01daae5a5 | 458 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 92:4fc01daae5a5 | 459 | break; \ |
bogdanm | 92:4fc01daae5a5 | 460 | case RCC_USART3CLKSOURCE_HSI: \ |
bogdanm | 92:4fc01daae5a5 | 461 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
bogdanm | 92:4fc01daae5a5 | 462 | break; \ |
bogdanm | 92:4fc01daae5a5 | 463 | case RCC_USART3CLKSOURCE_SYSCLK: \ |
bogdanm | 92:4fc01daae5a5 | 464 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
bogdanm | 92:4fc01daae5a5 | 465 | break; \ |
bogdanm | 92:4fc01daae5a5 | 466 | case RCC_USART3CLKSOURCE_LSE: \ |
bogdanm | 92:4fc01daae5a5 | 467 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
bogdanm | 92:4fc01daae5a5 | 468 | break; \ |
bogdanm | 92:4fc01daae5a5 | 469 | default: \ |
bogdanm | 92:4fc01daae5a5 | 470 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 92:4fc01daae5a5 | 471 | break; \ |
bogdanm | 92:4fc01daae5a5 | 472 | } \ |
bogdanm | 92:4fc01daae5a5 | 473 | } \ |
bogdanm | 92:4fc01daae5a5 | 474 | else if((__HANDLE__)->Instance == USART4) \ |
bogdanm | 92:4fc01daae5a5 | 475 | { \ |
bogdanm | 92:4fc01daae5a5 | 476 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 92:4fc01daae5a5 | 477 | } \ |
bogdanm | 92:4fc01daae5a5 | 478 | else if((__HANDLE__)->Instance == USART5) \ |
bogdanm | 92:4fc01daae5a5 | 479 | { \ |
bogdanm | 92:4fc01daae5a5 | 480 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 92:4fc01daae5a5 | 481 | } \ |
bogdanm | 92:4fc01daae5a5 | 482 | else if((__HANDLE__)->Instance == USART6) \ |
bogdanm | 92:4fc01daae5a5 | 483 | { \ |
bogdanm | 92:4fc01daae5a5 | 484 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 92:4fc01daae5a5 | 485 | } \ |
bogdanm | 92:4fc01daae5a5 | 486 | else if((__HANDLE__)->Instance == USART7) \ |
bogdanm | 92:4fc01daae5a5 | 487 | { \ |
bogdanm | 92:4fc01daae5a5 | 488 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 92:4fc01daae5a5 | 489 | } \ |
bogdanm | 92:4fc01daae5a5 | 490 | else if((__HANDLE__)->Instance == USART8) \ |
bogdanm | 92:4fc01daae5a5 | 491 | { \ |
bogdanm | 92:4fc01daae5a5 | 492 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
bogdanm | 92:4fc01daae5a5 | 493 | } \ |
bogdanm | 92:4fc01daae5a5 | 494 | else \ |
bogdanm | 92:4fc01daae5a5 | 495 | { \ |
bogdanm | 92:4fc01daae5a5 | 496 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
bogdanm | 92:4fc01daae5a5 | 497 | } \ |
bogdanm | 92:4fc01daae5a5 | 498 | } while(0) |
bogdanm | 92:4fc01daae5a5 | 499 | |
bogdanm | 85:024bf7f99721 | 500 | #endif /* defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) */ |
bogdanm | 85:024bf7f99721 | 501 | |
bogdanm | 85:024bf7f99721 | 502 | |
bogdanm | 85:024bf7f99721 | 503 | /** @brief Computes the UART mask to apply to retrieve the received data |
bogdanm | 85:024bf7f99721 | 504 | * according to the word length and to the parity bits activation. |
bogdanm | 85:024bf7f99721 | 505 | * If PCE = 1, the parity bit is not included in the data extracted |
bogdanm | 85:024bf7f99721 | 506 | * by the reception API(). |
bogdanm | 85:024bf7f99721 | 507 | * This masking operation is not carried out in the case of |
bogdanm | 85:024bf7f99721 | 508 | * DMA transfers. |
bogdanm | 85:024bf7f99721 | 509 | * @param __HANDLE__: specifies the UART Handle |
bogdanm | 85:024bf7f99721 | 510 | * @retval none |
bogdanm | 85:024bf7f99721 | 511 | */ |
bogdanm | 85:024bf7f99721 | 512 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
bogdanm | 92:4fc01daae5a5 | 513 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
bogdanm | 92:4fc01daae5a5 | 514 | defined (STM32F091xC) || defined (STM32F098xx) |
bogdanm | 85:024bf7f99721 | 515 | #define __HAL_UART_MASK_COMPUTATION(__HANDLE__) \ |
bogdanm | 85:024bf7f99721 | 516 | do { \ |
bogdanm | 85:024bf7f99721 | 517 | if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ |
bogdanm | 85:024bf7f99721 | 518 | { \ |
bogdanm | 85:024bf7f99721 | 519 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ |
bogdanm | 85:024bf7f99721 | 520 | { \ |
bogdanm | 85:024bf7f99721 | 521 | (__HANDLE__)->Mask = 0x01FF ; \ |
bogdanm | 85:024bf7f99721 | 522 | } \ |
bogdanm | 85:024bf7f99721 | 523 | else \ |
bogdanm | 85:024bf7f99721 | 524 | { \ |
bogdanm | 85:024bf7f99721 | 525 | (__HANDLE__)->Mask = 0x00FF ; \ |
bogdanm | 85:024bf7f99721 | 526 | } \ |
bogdanm | 85:024bf7f99721 | 527 | } \ |
bogdanm | 85:024bf7f99721 | 528 | else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ |
bogdanm | 85:024bf7f99721 | 529 | { \ |
bogdanm | 85:024bf7f99721 | 530 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ |
bogdanm | 85:024bf7f99721 | 531 | { \ |
bogdanm | 85:024bf7f99721 | 532 | (__HANDLE__)->Mask = 0x00FF ; \ |
bogdanm | 85:024bf7f99721 | 533 | } \ |
bogdanm | 85:024bf7f99721 | 534 | else \ |
bogdanm | 85:024bf7f99721 | 535 | { \ |
bogdanm | 85:024bf7f99721 | 536 | (__HANDLE__)->Mask = 0x007F ; \ |
bogdanm | 85:024bf7f99721 | 537 | } \ |
bogdanm | 85:024bf7f99721 | 538 | } \ |
bogdanm | 85:024bf7f99721 | 539 | else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ |
bogdanm | 85:024bf7f99721 | 540 | { \ |
bogdanm | 85:024bf7f99721 | 541 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ |
bogdanm | 85:024bf7f99721 | 542 | { \ |
bogdanm | 85:024bf7f99721 | 543 | (__HANDLE__)->Mask = 0x007F ; \ |
bogdanm | 85:024bf7f99721 | 544 | } \ |
bogdanm | 85:024bf7f99721 | 545 | else \ |
bogdanm | 85:024bf7f99721 | 546 | { \ |
bogdanm | 85:024bf7f99721 | 547 | (__HANDLE__)->Mask = 0x003F ; \ |
bogdanm | 85:024bf7f99721 | 548 | } \ |
bogdanm | 85:024bf7f99721 | 549 | } \ |
bogdanm | 85:024bf7f99721 | 550 | } while(0) |
bogdanm | 85:024bf7f99721 | 551 | #else |
bogdanm | 85:024bf7f99721 | 552 | #define __HAL_UART_MASK_COMPUTATION(__HANDLE__) \ |
bogdanm | 85:024bf7f99721 | 553 | do { \ |
bogdanm | 85:024bf7f99721 | 554 | if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ |
bogdanm | 85:024bf7f99721 | 555 | { \ |
bogdanm | 85:024bf7f99721 | 556 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ |
bogdanm | 85:024bf7f99721 | 557 | { \ |
bogdanm | 85:024bf7f99721 | 558 | (__HANDLE__)->Mask = 0x01FF ; \ |
bogdanm | 85:024bf7f99721 | 559 | } \ |
bogdanm | 85:024bf7f99721 | 560 | else \ |
bogdanm | 85:024bf7f99721 | 561 | { \ |
bogdanm | 85:024bf7f99721 | 562 | (__HANDLE__)->Mask = 0x00FF ; \ |
bogdanm | 85:024bf7f99721 | 563 | } \ |
bogdanm | 85:024bf7f99721 | 564 | } \ |
bogdanm | 85:024bf7f99721 | 565 | else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ |
bogdanm | 85:024bf7f99721 | 566 | { \ |
bogdanm | 85:024bf7f99721 | 567 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ |
bogdanm | 85:024bf7f99721 | 568 | { \ |
bogdanm | 85:024bf7f99721 | 569 | (__HANDLE__)->Mask = 0x00FF ; \ |
bogdanm | 85:024bf7f99721 | 570 | } \ |
bogdanm | 85:024bf7f99721 | 571 | else \ |
bogdanm | 85:024bf7f99721 | 572 | { \ |
bogdanm | 85:024bf7f99721 | 573 | (__HANDLE__)->Mask = 0x007F ; \ |
bogdanm | 85:024bf7f99721 | 574 | } \ |
bogdanm | 85:024bf7f99721 | 575 | } \ |
bogdanm | 85:024bf7f99721 | 576 | } while(0) |
bogdanm | 85:024bf7f99721 | 577 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
bogdanm | 92:4fc01daae5a5 | 578 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
bogdanm | 92:4fc01daae5a5 | 579 | defined (STM32F091xC) || defined (STM32F098xx) */ |
bogdanm | 85:024bf7f99721 | 580 | /** |
bogdanm | 85:024bf7f99721 | 581 | * @} |
bogdanm | 85:024bf7f99721 | 582 | */ |
bogdanm | 85:024bf7f99721 | 583 | |
bogdanm | 85:024bf7f99721 | 584 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 585 | /** @addtogroup UARTEx_Exported_Functions |
bogdanm | 92:4fc01daae5a5 | 586 | * @{ |
bogdanm | 92:4fc01daae5a5 | 587 | */ |
bogdanm | 92:4fc01daae5a5 | 588 | |
bogdanm | 92:4fc01daae5a5 | 589 | /** @addtogroup UARTEx_Exported_Functions_Group1 |
bogdanm | 92:4fc01daae5a5 | 590 | * @brief Extended Initialization and Configuration Functions |
bogdanm | 92:4fc01daae5a5 | 591 | * @{ |
bogdanm | 92:4fc01daae5a5 | 592 | */ |
bogdanm | 85:024bf7f99721 | 593 | /* Initialization and de-initialization functions ****************************/ |
bogdanm | 85:024bf7f99721 | 594 | HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t UART_DEPolarity, uint32_t UART_DEAssertionTime, uint32_t UART_DEDeassertionTime); |
bogdanm | 92:4fc01daae5a5 | 595 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
bogdanm | 85:024bf7f99721 | 596 | HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); |
bogdanm | 85:024bf7f99721 | 597 | HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); |
bogdanm | 85:024bf7f99721 | 598 | HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); |
bogdanm | 92:4fc01daae5a5 | 599 | /** |
bogdanm | 92:4fc01daae5a5 | 600 | * @} |
bogdanm | 92:4fc01daae5a5 | 601 | */ |
bogdanm | 92:4fc01daae5a5 | 602 | |
bogdanm | 92:4fc01daae5a5 | 603 | /** @addtogroup UARTEx_Exported_Functions_Group2 |
bogdanm | 92:4fc01daae5a5 | 604 | * @brief Extended I/O operation functions |
bogdanm | 92:4fc01daae5a5 | 605 | * @{ |
bogdanm | 92:4fc01daae5a5 | 606 | */ |
bogdanm | 92:4fc01daae5a5 | 607 | |
bogdanm | 85:024bf7f99721 | 608 | /* I/O operation functions ***************************************************/ |
bogdanm | 85:024bf7f99721 | 609 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
bogdanm | 85:024bf7f99721 | 610 | void HAL_UART_WakeupCallback(UART_HandleTypeDef *huart); |
bogdanm | 92:4fc01daae5a5 | 611 | /** |
bogdanm | 92:4fc01daae5a5 | 612 | * @} |
bogdanm | 92:4fc01daae5a5 | 613 | */ |
bogdanm | 92:4fc01daae5a5 | 614 | |
bogdanm | 92:4fc01daae5a5 | 615 | /** @addtogroup UARTEx_Exported_Functions_Group3 |
bogdanm | 92:4fc01daae5a5 | 616 | * @brief Extended Peripheral Control functions |
bogdanm | 92:4fc01daae5a5 | 617 | * @{ |
bogdanm | 92:4fc01daae5a5 | 618 | */ |
bogdanm | 92:4fc01daae5a5 | 619 | |
bogdanm | 85:024bf7f99721 | 620 | /* Peripheral Control functions **********************************************/ |
bogdanm | 85:024bf7f99721 | 621 | void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); |
bogdanm | 85:024bf7f99721 | 622 | HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); |
bogdanm | 85:024bf7f99721 | 623 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
bogdanm | 92:4fc01daae5a5 | 624 | /** |
bogdanm | 92:4fc01daae5a5 | 625 | * @} |
bogdanm | 92:4fc01daae5a5 | 626 | */ |
bogdanm | 85:024bf7f99721 | 627 | /* Peripheral State functions ************************************************/ |
bogdanm | 85:024bf7f99721 | 628 | |
bogdanm | 92:4fc01daae5a5 | 629 | /** |
bogdanm | 92:4fc01daae5a5 | 630 | * @} |
bogdanm | 92:4fc01daae5a5 | 631 | */ |
bogdanm | 92:4fc01daae5a5 | 632 | |
bogdanm | 85:024bf7f99721 | 633 | |
bogdanm | 85:024bf7f99721 | 634 | /** |
bogdanm | 85:024bf7f99721 | 635 | * @} |
bogdanm | 85:024bf7f99721 | 636 | */ |
bogdanm | 85:024bf7f99721 | 637 | |
bogdanm | 85:024bf7f99721 | 638 | /** |
bogdanm | 85:024bf7f99721 | 639 | * @} |
bogdanm | 85:024bf7f99721 | 640 | */ |
bogdanm | 85:024bf7f99721 | 641 | |
bogdanm | 85:024bf7f99721 | 642 | #ifdef __cplusplus |
bogdanm | 85:024bf7f99721 | 643 | } |
bogdanm | 85:024bf7f99721 | 644 | #endif |
bogdanm | 85:024bf7f99721 | 645 | |
bogdanm | 85:024bf7f99721 | 646 | #endif /* __STM32F0xx_HAL_UART_EX_H */ |
bogdanm | 85:024bf7f99721 | 647 | |
bogdanm | 85:024bf7f99721 | 648 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
bogdanm | 92:4fc01daae5a5 | 649 |