frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_MTS_MDOT_F405RG/TOOLCHAIN_IAR/stm32f405xx.icf@93:9dd889aeda0e, 2014-12-05 (annotated)

Committer:
fblanc
Date:
Fri Dec 05 15:42:32 2014 +0000
Revision:
93:9dd889aeda0e
Parent:
92:4fc01daae5a5 
substitute line 894 extern } by }; /TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /*###ICF### Section handled by ICF editor, don't touch! ****/
bogdanm 92:4fc01daae5a5 2 /*-Editor annotation file-*/
bogdanm 92:4fc01daae5a5 3 /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
bogdanm 92:4fc01daae5a5 4 /*-Specials-*/
bogdanm 92:4fc01daae5a5 5 define symbol __ICFEDIT_intvec_start__ = 0x08000000;
bogdanm 92:4fc01daae5a5 6 /*-Memory Regions-*/
bogdanm 92:4fc01daae5a5 7 define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
bogdanm 92:4fc01daae5a5 8 define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
bogdanm 92:4fc01daae5a5 9 /* [RAM] Vector table dynamic copy: 98 vectors * 4 bytes = 392 bytes (0x188) */
bogdanm 92:4fc01daae5a5 10 define symbol __NVIC_start__ = 0x20000000;
bogdanm 92:4fc01daae5a5 11 define symbol __NVIC_end__ = 0x20000187; /* to be aligned on 8 bytes */
bogdanm 92:4fc01daae5a5 12 define symbol __ICFEDIT_region_RAM_start__ = 0x20000188;
bogdanm 92:4fc01daae5a5 13 define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
bogdanm 92:4fc01daae5a5 14 define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000;
bogdanm 92:4fc01daae5a5 15 define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF;
bogdanm 92:4fc01daae5a5 16 /*-Sizes-*/
bogdanm 92:4fc01daae5a5 17 define symbol __ICFEDIT_size_cstack__ = 0x400;
bogdanm 92:4fc01daae5a5 18 define symbol __ICFEDIT_size_heap__ = 0x8000;
bogdanm 92:4fc01daae5a5 19 /**** End of ICF editor section. ###ICF###*/
bogdanm 92:4fc01daae5a5 20
bogdanm 92:4fc01daae5a5 21
bogdanm 92:4fc01daae5a5 22 define memory mem with size = 4G;
bogdanm 92:4fc01daae5a5 23 define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
bogdanm 92:4fc01daae5a5 24 define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
bogdanm 92:4fc01daae5a5 25 define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__];
bogdanm 92:4fc01daae5a5 26
bogdanm 92:4fc01daae5a5 27 define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
bogdanm 92:4fc01daae5a5 28 define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
bogdanm 92:4fc01daae5a5 29
bogdanm 92:4fc01daae5a5 30 initialize by copy { readwrite };
bogdanm 92:4fc01daae5a5 31 do not initialize { section .noinit };
bogdanm 92:4fc01daae5a5 32
bogdanm 92:4fc01daae5a5 33 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
bogdanm 92:4fc01daae5a5 34
bogdanm 92:4fc01daae5a5 35 place in ROM_region { readonly };
bogdanm 92:4fc01daae5a5 36 place in RAM_region { readwrite,
bogdanm 92:4fc01daae5a5 37 block CSTACK, block HEAP };