/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

Committer:
emilmont
Date:
Fri Feb 14 14:36:43 2014 +0000
Revision:
77:869cf507173a
Release 77 of the mbed library

Main changes:
* Add target NUCLEO_F030R8
* Add target NUCLEO_F401RE
* Add target NUCLEO_F103RB
* Add target NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /******************************************************************************
emilmont 77:869cf507173a 2 * @file: system_LPC17xx.h
emilmont 77:869cf507173a 3 * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File
emilmont 77:869cf507173a 4 * for the NXP LPC17xx Device Series
emilmont 77:869cf507173a 5 * @version: V1.02
emilmont 77:869cf507173a 6 * @date: 27. July 2009
emilmont 77:869cf507173a 7 *----------------------------------------------------------------------------
emilmont 77:869cf507173a 8 *
emilmont 77:869cf507173a 9 * Copyright (C) 2009 ARM Limited. All rights reserved.
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M3
emilmont 77:869cf507173a 12 * processor based microcontrollers. This file can be freely distributed
emilmont 77:869cf507173a 13 * within development tools that are supporting such ARM based processors.
emilmont 77:869cf507173a 14 *
emilmont 77:869cf507173a 15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
emilmont 77:869cf507173a 16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
emilmont 77:869cf507173a 17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
emilmont 77:869cf507173a 18 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
emilmont 77:869cf507173a 19 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
emilmont 77:869cf507173a 20 *
emilmont 77:869cf507173a 21 ******************************************************************************/
emilmont 77:869cf507173a 22
emilmont 77:869cf507173a 23
emilmont 77:869cf507173a 24 #ifndef __SYSTEM_LPC17xx_H
emilmont 77:869cf507173a 25 #define __SYSTEM_LPC17xx_H
emilmont 77:869cf507173a 26
emilmont 77:869cf507173a 27 #ifdef __cplusplus
emilmont 77:869cf507173a 28 extern "C" {
emilmont 77:869cf507173a 29 #endif
emilmont 77:869cf507173a 30
emilmont 77:869cf507173a 31 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
emilmont 77:869cf507173a 32
emilmont 77:869cf507173a 33
emilmont 77:869cf507173a 34 /**
emilmont 77:869cf507173a 35 * Initialize the system
emilmont 77:869cf507173a 36 *
emilmont 77:869cf507173a 37 * @param none
emilmont 77:869cf507173a 38 * @return none
emilmont 77:869cf507173a 39 *
emilmont 77:869cf507173a 40 * @brief Setup the microcontroller system.
emilmont 77:869cf507173a 41 * Initialize the System and update the SystemCoreClock variable.
emilmont 77:869cf507173a 42 */
emilmont 77:869cf507173a 43 extern void SystemInit (void);
emilmont 77:869cf507173a 44
emilmont 77:869cf507173a 45 /**
emilmont 77:869cf507173a 46 * Update SystemCoreClock variable
emilmont 77:869cf507173a 47 *
emilmont 77:869cf507173a 48 * @param none
emilmont 77:869cf507173a 49 * @return none
emilmont 77:869cf507173a 50 *
emilmont 77:869cf507173a 51 * @brief Updates the SystemCoreClock with current core Clock
emilmont 77:869cf507173a 52 * retrieved from cpu registers.
emilmont 77:869cf507173a 53 */
emilmont 77:869cf507173a 54 extern void SystemCoreClockUpdate (void);
emilmont 77:869cf507173a 55
emilmont 77:869cf507173a 56 #ifdef __cplusplus
emilmont 77:869cf507173a 57 }
emilmont 77:869cf507173a 58 #endif
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 #endif /* __SYSTEM_LPC17xx_H */