frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_NUCLEO_F103RB/stm32f10x_usart.h@77:869cf507173a, 2014-02-14 (annotated)

Committer:
emilmont
Date:
Fri Feb 14 14:36:43 2014 +0000
Revision:
77:869cf507173a
Parent:
76:824293ae5e43 
Release 77 of the mbed library



Main changes:

* Add target NUCLEO_F030R8

* Add target NUCLEO_F401RE

* Add target NUCLEO_F103RB

* Add target NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 73:1efda918f0ba 1 /**
bogdanm 73:1efda918f0ba 2 ******************************************************************************
bogdanm 73:1efda918f0ba 3 * @file stm32f10x_usart.h
bogdanm 73:1efda918f0ba 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V3.6.1
emilmont 77:869cf507173a 6 * @date 05-March-2012
bogdanm 73:1efda918f0ba 7 * @brief This file contains all the functions prototypes for the USART
bogdanm 73:1efda918f0ba 8 * firmware library.
bogdanm 76:824293ae5e43 9 *******************************************************************************
bogdanm 76:824293ae5e43 10 * Copyright (c) 2014, STMicroelectronics
bogdanm 76:824293ae5e43 11 * All rights reserved.
bogdanm 76:824293ae5e43 12 *
bogdanm 76:824293ae5e43 13 * Redistribution and use in source and binary forms, with or without
bogdanm 76:824293ae5e43 14 * modification, are permitted provided that the following conditions are met:
bogdanm 76:824293ae5e43 15 *
bogdanm 76:824293ae5e43 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 76:824293ae5e43 17 * this list of conditions and the following disclaimer.
bogdanm 76:824293ae5e43 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 76:824293ae5e43 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 76:824293ae5e43 20 * and/or other materials provided with the distribution.
bogdanm 76:824293ae5e43 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 76:824293ae5e43 22 * may be used to endorse or promote products derived from this software
bogdanm 76:824293ae5e43 23 * without specific prior written permission.
bogdanm 76:824293ae5e43 24 *
bogdanm 76:824293ae5e43 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 76:824293ae5e43 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 76:824293ae5e43 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 76:824293ae5e43 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 76:824293ae5e43 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 76:824293ae5e43 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 76:824293ae5e43 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 76:824293ae5e43 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 76:824293ae5e43 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 76:824293ae5e43 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 76:824293ae5e43 35 *******************************************************************************
bogdanm 76:824293ae5e43 36 */
bogdanm 73:1efda918f0ba 37
bogdanm 73:1efda918f0ba 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 73:1efda918f0ba 39 #ifndef __STM32F10x_USART_H
bogdanm 73:1efda918f0ba 40 #define __STM32F10x_USART_H
bogdanm 73:1efda918f0ba 41
bogdanm 73:1efda918f0ba 42 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 43 extern "C" {
bogdanm 73:1efda918f0ba 44 #endif
bogdanm 73:1efda918f0ba 45
bogdanm 73:1efda918f0ba 46 /* Includes ------------------------------------------------------------------*/
bogdanm 73:1efda918f0ba 47 #include "stm32f10x.h"
bogdanm 73:1efda918f0ba 48
bogdanm 73:1efda918f0ba 49 /** @addtogroup STM32F10x_StdPeriph_Driver
bogdanm 73:1efda918f0ba 50 * @{
bogdanm 73:1efda918f0ba 51 */
bogdanm 73:1efda918f0ba 52
bogdanm 73:1efda918f0ba 53 /** @addtogroup USART
bogdanm 73:1efda918f0ba 54 * @{
bogdanm 73:1efda918f0ba 55 */
bogdanm 73:1efda918f0ba 56
bogdanm 73:1efda918f0ba 57 /** @defgroup USART_Exported_Types
bogdanm 73:1efda918f0ba 58 * @{
bogdanm 73:1efda918f0ba 59 */
bogdanm 73:1efda918f0ba 60
bogdanm 73:1efda918f0ba 61 /**
bogdanm 73:1efda918f0ba 62 * @brief USART Init Structure definition
bogdanm 73:1efda918f0ba 63 */
bogdanm 73:1efda918f0ba 64
bogdanm 73:1efda918f0ba 65 typedef struct
bogdanm 73:1efda918f0ba 66 {
bogdanm 73:1efda918f0ba 67 uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate.
bogdanm 73:1efda918f0ba 68 The baud rate is computed using the following formula:
bogdanm 73:1efda918f0ba 69 - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
bogdanm 73:1efda918f0ba 70 - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
bogdanm 73:1efda918f0ba 71
bogdanm 73:1efda918f0ba 72 uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm 73:1efda918f0ba 73 This parameter can be a value of @ref USART_Word_Length */
bogdanm 73:1efda918f0ba 74
bogdanm 73:1efda918f0ba 75 uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted.
bogdanm 73:1efda918f0ba 76 This parameter can be a value of @ref USART_Stop_Bits */
bogdanm 73:1efda918f0ba 77
bogdanm 73:1efda918f0ba 78 uint16_t USART_Parity; /*!< Specifies the parity mode.
bogdanm 73:1efda918f0ba 79 This parameter can be a value of @ref USART_Parity
bogdanm 73:1efda918f0ba 80 @note When parity is enabled, the computed parity is inserted
bogdanm 73:1efda918f0ba 81 at the MSB position of the transmitted data (9th bit when
bogdanm 73:1efda918f0ba 82 the word length is set to 9 data bits; 8th bit when the
bogdanm 73:1efda918f0ba 83 word length is set to 8 data bits). */
bogdanm 73:1efda918f0ba 84
bogdanm 73:1efda918f0ba 85 uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm 73:1efda918f0ba 86 This parameter can be a value of @ref USART_Mode */
bogdanm 73:1efda918f0ba 87
bogdanm 73:1efda918f0ba 88 uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled
bogdanm 73:1efda918f0ba 89 or disabled.
bogdanm 73:1efda918f0ba 90 This parameter can be a value of @ref USART_Hardware_Flow_Control */
bogdanm 73:1efda918f0ba 91 } USART_InitTypeDef;
bogdanm 73:1efda918f0ba 92
bogdanm 73:1efda918f0ba 93 /**
bogdanm 73:1efda918f0ba 94 * @brief USART Clock Init Structure definition
bogdanm 73:1efda918f0ba 95 */
bogdanm 73:1efda918f0ba 96
bogdanm 73:1efda918f0ba 97 typedef struct
bogdanm 73:1efda918f0ba 98 {
bogdanm 73:1efda918f0ba 99
bogdanm 73:1efda918f0ba 100 uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled.
bogdanm 73:1efda918f0ba 101 This parameter can be a value of @ref USART_Clock */
bogdanm 73:1efda918f0ba 102
bogdanm 73:1efda918f0ba 103 uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock.
bogdanm 73:1efda918f0ba 104 This parameter can be a value of @ref USART_Clock_Polarity */
bogdanm 73:1efda918f0ba 105
bogdanm 73:1efda918f0ba 106 uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made.
bogdanm 73:1efda918f0ba 107 This parameter can be a value of @ref USART_Clock_Phase */
bogdanm 73:1efda918f0ba 108
bogdanm 73:1efda918f0ba 109 uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
bogdanm 73:1efda918f0ba 110 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
bogdanm 73:1efda918f0ba 111 This parameter can be a value of @ref USART_Last_Bit */
bogdanm 73:1efda918f0ba 112 } USART_ClockInitTypeDef;
bogdanm 73:1efda918f0ba 113
bogdanm 73:1efda918f0ba 114 /**
bogdanm 73:1efda918f0ba 115 * @}
bogdanm 73:1efda918f0ba 116 */
bogdanm 73:1efda918f0ba 117
bogdanm 73:1efda918f0ba 118 /** @defgroup USART_Exported_Constants
bogdanm 73:1efda918f0ba 119 * @{
bogdanm 73:1efda918f0ba 120 */
bogdanm 73:1efda918f0ba 121
bogdanm 73:1efda918f0ba 122 #define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \
bogdanm 73:1efda918f0ba 123 ((PERIPH) == USART2) || \
bogdanm 73:1efda918f0ba 124 ((PERIPH) == USART3) || \
bogdanm 73:1efda918f0ba 125 ((PERIPH) == UART4) || \
bogdanm 73:1efda918f0ba 126 ((PERIPH) == UART5))
bogdanm 73:1efda918f0ba 127
bogdanm 73:1efda918f0ba 128 #define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \
bogdanm 73:1efda918f0ba 129 ((PERIPH) == USART2) || \
bogdanm 73:1efda918f0ba 130 ((PERIPH) == USART3))
bogdanm 73:1efda918f0ba 131
bogdanm 73:1efda918f0ba 132 #define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \
bogdanm 73:1efda918f0ba 133 ((PERIPH) == USART2) || \
bogdanm 73:1efda918f0ba 134 ((PERIPH) == USART3) || \
bogdanm 73:1efda918f0ba 135 ((PERIPH) == UART4))
bogdanm 73:1efda918f0ba 136 /** @defgroup USART_Word_Length
bogdanm 73:1efda918f0ba 137 * @{
bogdanm 73:1efda918f0ba 138 */
bogdanm 73:1efda918f0ba 139
bogdanm 73:1efda918f0ba 140 #define USART_WordLength_8b ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 141 #define USART_WordLength_9b ((uint16_t)0x1000)
bogdanm 73:1efda918f0ba 142
bogdanm 73:1efda918f0ba 143 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
bogdanm 73:1efda918f0ba 144 ((LENGTH) == USART_WordLength_9b))
bogdanm 73:1efda918f0ba 145 /**
bogdanm 73:1efda918f0ba 146 * @}
bogdanm 73:1efda918f0ba 147 */
bogdanm 73:1efda918f0ba 148
bogdanm 73:1efda918f0ba 149 /** @defgroup USART_Stop_Bits
bogdanm 73:1efda918f0ba 150 * @{
bogdanm 73:1efda918f0ba 151 */
bogdanm 73:1efda918f0ba 152
bogdanm 73:1efda918f0ba 153 #define USART_StopBits_1 ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 154 #define USART_StopBits_0_5 ((uint16_t)0x1000)
bogdanm 73:1efda918f0ba 155 #define USART_StopBits_2 ((uint16_t)0x2000)
bogdanm 73:1efda918f0ba 156 #define USART_StopBits_1_5 ((uint16_t)0x3000)
bogdanm 73:1efda918f0ba 157 #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
bogdanm 73:1efda918f0ba 158 ((STOPBITS) == USART_StopBits_0_5) || \
bogdanm 73:1efda918f0ba 159 ((STOPBITS) == USART_StopBits_2) || \
bogdanm 73:1efda918f0ba 160 ((STOPBITS) == USART_StopBits_1_5))
bogdanm 73:1efda918f0ba 161 /**
bogdanm 73:1efda918f0ba 162 * @}
bogdanm 73:1efda918f0ba 163 */
bogdanm 73:1efda918f0ba 164
bogdanm 73:1efda918f0ba 165 /** @defgroup USART_Parity
bogdanm 73:1efda918f0ba 166 * @{
bogdanm 73:1efda918f0ba 167 */
bogdanm 73:1efda918f0ba 168
bogdanm 73:1efda918f0ba 169 #define USART_Parity_No ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 170 #define USART_Parity_Even ((uint16_t)0x0400)
bogdanm 73:1efda918f0ba 171 #define USART_Parity_Odd ((uint16_t)0x0600)
bogdanm 73:1efda918f0ba 172 #define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
bogdanm 73:1efda918f0ba 173 ((PARITY) == USART_Parity_Even) || \
bogdanm 73:1efda918f0ba 174 ((PARITY) == USART_Parity_Odd))
bogdanm 73:1efda918f0ba 175 /**
bogdanm 73:1efda918f0ba 176 * @}
bogdanm 73:1efda918f0ba 177 */
bogdanm 73:1efda918f0ba 178
bogdanm 73:1efda918f0ba 179 /** @defgroup USART_Mode
bogdanm 73:1efda918f0ba 180 * @{
bogdanm 73:1efda918f0ba 181 */
bogdanm 73:1efda918f0ba 182
bogdanm 73:1efda918f0ba 183 #define USART_Mode_Rx ((uint16_t)0x0004)
bogdanm 73:1efda918f0ba 184 #define USART_Mode_Tx ((uint16_t)0x0008)
bogdanm 73:1efda918f0ba 185 #define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))
bogdanm 73:1efda918f0ba 186 /**
bogdanm 73:1efda918f0ba 187 * @}
bogdanm 73:1efda918f0ba 188 */
bogdanm 73:1efda918f0ba 189
bogdanm 73:1efda918f0ba 190 /** @defgroup USART_Hardware_Flow_Control
bogdanm 73:1efda918f0ba 191 * @{
bogdanm 73:1efda918f0ba 192 */
bogdanm 73:1efda918f0ba 193 #define USART_HardwareFlowControl_None ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 194 #define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
bogdanm 73:1efda918f0ba 195 #define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
bogdanm 73:1efda918f0ba 196 #define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
bogdanm 73:1efda918f0ba 197 #define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
bogdanm 73:1efda918f0ba 198 (((CONTROL) == USART_HardwareFlowControl_None) || \
bogdanm 73:1efda918f0ba 199 ((CONTROL) == USART_HardwareFlowControl_RTS) || \
bogdanm 73:1efda918f0ba 200 ((CONTROL) == USART_HardwareFlowControl_CTS) || \
bogdanm 73:1efda918f0ba 201 ((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
bogdanm 73:1efda918f0ba 202 /**
bogdanm 73:1efda918f0ba 203 * @}
bogdanm 73:1efda918f0ba 204 */
bogdanm 73:1efda918f0ba 205
bogdanm 73:1efda918f0ba 206 /** @defgroup USART_Clock
bogdanm 73:1efda918f0ba 207 * @{
bogdanm 73:1efda918f0ba 208 */
bogdanm 73:1efda918f0ba 209 #define USART_Clock_Disable ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 210 #define USART_Clock_Enable ((uint16_t)0x0800)
bogdanm 73:1efda918f0ba 211 #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
bogdanm 73:1efda918f0ba 212 ((CLOCK) == USART_Clock_Enable))
bogdanm 73:1efda918f0ba 213 /**
bogdanm 73:1efda918f0ba 214 * @}
bogdanm 73:1efda918f0ba 215 */
bogdanm 73:1efda918f0ba 216
bogdanm 73:1efda918f0ba 217 /** @defgroup USART_Clock_Polarity
bogdanm 73:1efda918f0ba 218 * @{
bogdanm 73:1efda918f0ba 219 */
bogdanm 73:1efda918f0ba 220
bogdanm 73:1efda918f0ba 221 #define USART_CPOL_Low ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 222 #define USART_CPOL_High ((uint16_t)0x0400)
bogdanm 73:1efda918f0ba 223 #define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
bogdanm 73:1efda918f0ba 224
bogdanm 73:1efda918f0ba 225 /**
bogdanm 73:1efda918f0ba 226 * @}
bogdanm 73:1efda918f0ba 227 */
bogdanm 73:1efda918f0ba 228
bogdanm 73:1efda918f0ba 229 /** @defgroup USART_Clock_Phase
bogdanm 73:1efda918f0ba 230 * @{
bogdanm 73:1efda918f0ba 231 */
bogdanm 73:1efda918f0ba 232
bogdanm 73:1efda918f0ba 233 #define USART_CPHA_1Edge ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 234 #define USART_CPHA_2Edge ((uint16_t)0x0200)
bogdanm 73:1efda918f0ba 235 #define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
bogdanm 73:1efda918f0ba 236
bogdanm 73:1efda918f0ba 237 /**
bogdanm 73:1efda918f0ba 238 * @}
bogdanm 73:1efda918f0ba 239 */
bogdanm 73:1efda918f0ba 240
bogdanm 73:1efda918f0ba 241 /** @defgroup USART_Last_Bit
bogdanm 73:1efda918f0ba 242 * @{
bogdanm 73:1efda918f0ba 243 */
bogdanm 73:1efda918f0ba 244
bogdanm 73:1efda918f0ba 245 #define USART_LastBit_Disable ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 246 #define USART_LastBit_Enable ((uint16_t)0x0100)
bogdanm 73:1efda918f0ba 247 #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
bogdanm 73:1efda918f0ba 248 ((LASTBIT) == USART_LastBit_Enable))
bogdanm 73:1efda918f0ba 249 /**
bogdanm 73:1efda918f0ba 250 * @}
bogdanm 73:1efda918f0ba 251 */
bogdanm 73:1efda918f0ba 252
bogdanm 73:1efda918f0ba 253 /** @defgroup USART_Interrupt_definition
bogdanm 73:1efda918f0ba 254 * @{
bogdanm 73:1efda918f0ba 255 */
bogdanm 73:1efda918f0ba 256
bogdanm 73:1efda918f0ba 257 #define USART_IT_PE ((uint16_t)0x0028)
bogdanm 73:1efda918f0ba 258 #define USART_IT_TXE ((uint16_t)0x0727)
bogdanm 73:1efda918f0ba 259 #define USART_IT_TC ((uint16_t)0x0626)
bogdanm 73:1efda918f0ba 260 #define USART_IT_RXNE ((uint16_t)0x0525)
emilmont 77:869cf507173a 261 #define USART_IT_ORE_RX ((uint16_t)0x0325) /* In case interrupt is generated if the RXNEIE bit is set */
bogdanm 73:1efda918f0ba 262 #define USART_IT_IDLE ((uint16_t)0x0424)
bogdanm 73:1efda918f0ba 263 #define USART_IT_LBD ((uint16_t)0x0846)
bogdanm 73:1efda918f0ba 264 #define USART_IT_CTS ((uint16_t)0x096A)
bogdanm 73:1efda918f0ba 265 #define USART_IT_ERR ((uint16_t)0x0060)
emilmont 77:869cf507173a 266 #define USART_IT_ORE_ER ((uint16_t)0x0360) /* In case interrupt is generated if the EIE bit is set */
bogdanm 73:1efda918f0ba 267 #define USART_IT_NE ((uint16_t)0x0260)
bogdanm 73:1efda918f0ba 268 #define USART_IT_FE ((uint16_t)0x0160)
emilmont 77:869cf507173a 269
emilmont 77:869cf507173a 270 /** @defgroup USART_Legacy
emilmont 77:869cf507173a 271 * @{
emilmont 77:869cf507173a 272 */
emilmont 77:869cf507173a 273 #define USART_IT_ORE USART_IT_ORE_ER
emilmont 77:869cf507173a 274 /**
emilmont 77:869cf507173a 275 * @}
emilmont 77:869cf507173a 276 */
emilmont 77:869cf507173a 277
bogdanm 73:1efda918f0ba 278 #define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
bogdanm 73:1efda918f0ba 279 ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
bogdanm 73:1efda918f0ba 280 ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
bogdanm 73:1efda918f0ba 281 ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
emilmont 77:869cf507173a 282
bogdanm 73:1efda918f0ba 283 #define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
bogdanm 73:1efda918f0ba 284 ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
bogdanm 73:1efda918f0ba 285 ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
bogdanm 73:1efda918f0ba 286 ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
emilmont 77:869cf507173a 287 ((IT) == USART_IT_ORE_RX) || ((IT) == USART_IT_ORE_ER) || \
bogdanm 73:1efda918f0ba 288 ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
emilmont 77:869cf507173a 289
bogdanm 73:1efda918f0ba 290 #define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
bogdanm 73:1efda918f0ba 291 ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
bogdanm 73:1efda918f0ba 292 /**
bogdanm 73:1efda918f0ba 293 * @}
bogdanm 73:1efda918f0ba 294 */
bogdanm 73:1efda918f0ba 295
bogdanm 73:1efda918f0ba 296 /** @defgroup USART_DMA_Requests
bogdanm 73:1efda918f0ba 297 * @{
bogdanm 73:1efda918f0ba 298 */
bogdanm 73:1efda918f0ba 299
bogdanm 73:1efda918f0ba 300 #define USART_DMAReq_Tx ((uint16_t)0x0080)
bogdanm 73:1efda918f0ba 301 #define USART_DMAReq_Rx ((uint16_t)0x0040)
bogdanm 73:1efda918f0ba 302 #define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
bogdanm 73:1efda918f0ba 303
bogdanm 73:1efda918f0ba 304 /**
bogdanm 73:1efda918f0ba 305 * @}
bogdanm 73:1efda918f0ba 306 */
bogdanm 73:1efda918f0ba 307
bogdanm 73:1efda918f0ba 308 /** @defgroup USART_WakeUp_methods
bogdanm 73:1efda918f0ba 309 * @{
bogdanm 73:1efda918f0ba 310 */
bogdanm 73:1efda918f0ba 311
bogdanm 73:1efda918f0ba 312 #define USART_WakeUp_IdleLine ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 313 #define USART_WakeUp_AddressMark ((uint16_t)0x0800)
bogdanm 73:1efda918f0ba 314 #define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
bogdanm 73:1efda918f0ba 315 ((WAKEUP) == USART_WakeUp_AddressMark))
bogdanm 73:1efda918f0ba 316 /**
bogdanm 73:1efda918f0ba 317 * @}
bogdanm 73:1efda918f0ba 318 */
bogdanm 73:1efda918f0ba 319
bogdanm 73:1efda918f0ba 320 /** @defgroup USART_LIN_Break_Detection_Length
bogdanm 73:1efda918f0ba 321 * @{
bogdanm 73:1efda918f0ba 322 */
bogdanm 73:1efda918f0ba 323
bogdanm 73:1efda918f0ba 324 #define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 325 #define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
bogdanm 73:1efda918f0ba 326 #define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
bogdanm 73:1efda918f0ba 327 (((LENGTH) == USART_LINBreakDetectLength_10b) || \
bogdanm 73:1efda918f0ba 328 ((LENGTH) == USART_LINBreakDetectLength_11b))
bogdanm 73:1efda918f0ba 329 /**
bogdanm 73:1efda918f0ba 330 * @}
bogdanm 73:1efda918f0ba 331 */
bogdanm 73:1efda918f0ba 332
bogdanm 73:1efda918f0ba 333 /** @defgroup USART_IrDA_Low_Power
bogdanm 73:1efda918f0ba 334 * @{
bogdanm 73:1efda918f0ba 335 */
bogdanm 73:1efda918f0ba 336
bogdanm 73:1efda918f0ba 337 #define USART_IrDAMode_LowPower ((uint16_t)0x0004)
bogdanm 73:1efda918f0ba 338 #define USART_IrDAMode_Normal ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 339 #define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
bogdanm 73:1efda918f0ba 340 ((MODE) == USART_IrDAMode_Normal))
bogdanm 73:1efda918f0ba 341 /**
bogdanm 73:1efda918f0ba 342 * @}
bogdanm 73:1efda918f0ba 343 */
bogdanm 73:1efda918f0ba 344
bogdanm 73:1efda918f0ba 345 /** @defgroup USART_Flags
bogdanm 73:1efda918f0ba 346 * @{
bogdanm 73:1efda918f0ba 347 */
bogdanm 73:1efda918f0ba 348
bogdanm 73:1efda918f0ba 349 #define USART_FLAG_CTS ((uint16_t)0x0200)
bogdanm 73:1efda918f0ba 350 #define USART_FLAG_LBD ((uint16_t)0x0100)
bogdanm 73:1efda918f0ba 351 #define USART_FLAG_TXE ((uint16_t)0x0080)
bogdanm 73:1efda918f0ba 352 #define USART_FLAG_TC ((uint16_t)0x0040)
bogdanm 73:1efda918f0ba 353 #define USART_FLAG_RXNE ((uint16_t)0x0020)
bogdanm 73:1efda918f0ba 354 #define USART_FLAG_IDLE ((uint16_t)0x0010)
bogdanm 73:1efda918f0ba 355 #define USART_FLAG_ORE ((uint16_t)0x0008)
bogdanm 73:1efda918f0ba 356 #define USART_FLAG_NE ((uint16_t)0x0004)
bogdanm 73:1efda918f0ba 357 #define USART_FLAG_FE ((uint16_t)0x0002)
bogdanm 73:1efda918f0ba 358 #define USART_FLAG_PE ((uint16_t)0x0001)
bogdanm 73:1efda918f0ba 359 #define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
bogdanm 73:1efda918f0ba 360 ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
bogdanm 73:1efda918f0ba 361 ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
bogdanm 73:1efda918f0ba 362 ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
bogdanm 73:1efda918f0ba 363 ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
bogdanm 73:1efda918f0ba 364
bogdanm 73:1efda918f0ba 365 #define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
emilmont 77:869cf507173a 366
bogdanm 73:1efda918f0ba 367 #define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
bogdanm 73:1efda918f0ba 368 #define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
bogdanm 73:1efda918f0ba 369 #define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
bogdanm 73:1efda918f0ba 370
bogdanm 73:1efda918f0ba 371 /**
bogdanm 73:1efda918f0ba 372 * @}
bogdanm 73:1efda918f0ba 373 */
bogdanm 73:1efda918f0ba 374
bogdanm 73:1efda918f0ba 375 /**
bogdanm 73:1efda918f0ba 376 * @}
bogdanm 73:1efda918f0ba 377 */
bogdanm 73:1efda918f0ba 378
bogdanm 73:1efda918f0ba 379 /** @defgroup USART_Exported_Macros
bogdanm 73:1efda918f0ba 380 * @{
bogdanm 73:1efda918f0ba 381 */
bogdanm 73:1efda918f0ba 382
bogdanm 73:1efda918f0ba 383 /**
bogdanm 73:1efda918f0ba 384 * @}
bogdanm 73:1efda918f0ba 385 */
bogdanm 73:1efda918f0ba 386
bogdanm 73:1efda918f0ba 387 /** @defgroup USART_Exported_Functions
bogdanm 73:1efda918f0ba 388 * @{
bogdanm 73:1efda918f0ba 389 */
bogdanm 73:1efda918f0ba 390
bogdanm 73:1efda918f0ba 391 void USART_DeInit(USART_TypeDef* USARTx);
bogdanm 73:1efda918f0ba 392 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
bogdanm 73:1efda918f0ba 393 void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
bogdanm 73:1efda918f0ba 394 void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
bogdanm 73:1efda918f0ba 395 void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
bogdanm 73:1efda918f0ba 396 void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 397 void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState);
bogdanm 73:1efda918f0ba 398 void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
bogdanm 73:1efda918f0ba 399 void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address);
bogdanm 73:1efda918f0ba 400 void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp);
bogdanm 73:1efda918f0ba 401 void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 402 void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength);
bogdanm 73:1efda918f0ba 403 void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 404 void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
bogdanm 73:1efda918f0ba 405 uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
bogdanm 73:1efda918f0ba 406 void USART_SendBreak(USART_TypeDef* USARTx);
bogdanm 73:1efda918f0ba 407 void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime);
bogdanm 73:1efda918f0ba 408 void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler);
bogdanm 73:1efda918f0ba 409 void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 410 void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 411 void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 412 void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 413 void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 414 void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode);
bogdanm 73:1efda918f0ba 415 void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 416 FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG);
bogdanm 73:1efda918f0ba 417 void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG);
bogdanm 73:1efda918f0ba 418 ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT);
bogdanm 73:1efda918f0ba 419 void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
bogdanm 73:1efda918f0ba 420
bogdanm 73:1efda918f0ba 421 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 422 }
bogdanm 73:1efda918f0ba 423 #endif
bogdanm 73:1efda918f0ba 424
bogdanm 73:1efda918f0ba 425 #endif /* __STM32F10x_USART_H */
bogdanm 73:1efda918f0ba 426 /**
bogdanm 73:1efda918f0ba 427 * @}
bogdanm 73:1efda918f0ba 428 */
bogdanm 73:1efda918f0ba 429
bogdanm 73:1efda918f0ba 430 /**
bogdanm 73:1efda918f0ba 431 * @}
bogdanm 73:1efda918f0ba 432 */
bogdanm 73:1efda918f0ba 433
bogdanm 73:1efda918f0ba 434 /**
bogdanm 73:1efda918f0ba 435 * @}
bogdanm 73:1efda918f0ba 436 */
bogdanm 73:1efda918f0ba 437
emilmont 77:869cf507173a 438 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/