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TARGET_KL46Z/PeripheralNames.h@77:869cf507173a, 2014-02-14 (annotated)

Committer:
emilmont
Date:
Fri Feb 14 14:36:43 2014 +0000
Revision:
77:869cf507173a
Parent:
73:1efda918f0ba 
Release 77 of the mbed library



Main changes:

* Add target NUCLEO_F030R8

* Add target NUCLEO_F401RE

* Add target NUCLEO_F103RB

* Add target NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 73:1efda918f0ba 1 /* mbed Microcontroller Library
bogdanm 73:1efda918f0ba 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 73:1efda918f0ba 3 *
bogdanm 73:1efda918f0ba 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 73:1efda918f0ba 5 * you may not use this file except in compliance with the License.
bogdanm 73:1efda918f0ba 6 * You may obtain a copy of the License at
bogdanm 73:1efda918f0ba 7 *
bogdanm 73:1efda918f0ba 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 73:1efda918f0ba 9 *
bogdanm 73:1efda918f0ba 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 73:1efda918f0ba 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 73:1efda918f0ba 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 73:1efda918f0ba 13 * See the License for the specific language governing permissions and
bogdanm 73:1efda918f0ba 14 * limitations under the License.
bogdanm 73:1efda918f0ba 15 */
bogdanm 73:1efda918f0ba 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 73:1efda918f0ba 17 #define MBED_PERIPHERALNAMES_H
bogdanm 73:1efda918f0ba 18
bogdanm 73:1efda918f0ba 19 #include "cmsis.h"
bogdanm 73:1efda918f0ba 20
bogdanm 73:1efda918f0ba 21 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 22 extern "C" {
bogdanm 73:1efda918f0ba 23 #endif
bogdanm 73:1efda918f0ba 24
bogdanm 73:1efda918f0ba 25 typedef enum {
emilmont 77:869cf507173a 26 OSC32KCLK = 0,
emilmont 77:869cf507173a 27 RTC_CLKIN = 2
emilmont 77:869cf507173a 28 } RTCName;
emilmont 77:869cf507173a 29
emilmont 77:869cf507173a 30 typedef enum {
bogdanm 73:1efda918f0ba 31 UART_0 = (int)UART0_BASE,
bogdanm 73:1efda918f0ba 32 UART_1 = (int)UART1_BASE,
bogdanm 73:1efda918f0ba 33 UART_2 = (int)UART2_BASE
bogdanm 73:1efda918f0ba 34 } UARTName;
bogdanm 73:1efda918f0ba 35 #define STDIO_UART_TX USBTX
bogdanm 73:1efda918f0ba 36 #define STDIO_UART_RX USBRX
bogdanm 73:1efda918f0ba 37 #define STDIO_UART UART_0
bogdanm 73:1efda918f0ba 38
bogdanm 73:1efda918f0ba 39 typedef enum {
bogdanm 73:1efda918f0ba 40 I2C_0 = (int)I2C0_BASE,
bogdanm 73:1efda918f0ba 41 I2C_1 = (int)I2C1_BASE,
bogdanm 73:1efda918f0ba 42 } I2CName;
bogdanm 73:1efda918f0ba 43
bogdanm 73:1efda918f0ba 44 #define TPM_SHIFT 8
bogdanm 73:1efda918f0ba 45 typedef enum {
bogdanm 73:1efda918f0ba 46 PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
bogdanm 73:1efda918f0ba 47 PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
bogdanm 73:1efda918f0ba 48 PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
bogdanm 73:1efda918f0ba 49 PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
bogdanm 73:1efda918f0ba 50 PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
bogdanm 73:1efda918f0ba 51 PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
bogdanm 73:1efda918f0ba 52
bogdanm 73:1efda918f0ba 53 PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
bogdanm 73:1efda918f0ba 54 PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
bogdanm 73:1efda918f0ba 55
bogdanm 73:1efda918f0ba 56 PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0
bogdanm 73:1efda918f0ba 57 PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
bogdanm 73:1efda918f0ba 58 } PWMName;
bogdanm 73:1efda918f0ba 59
emilmont 77:869cf507173a 60 #define CHANNELS_A_SHIFT 5
bogdanm 73:1efda918f0ba 61 typedef enum {
bogdanm 73:1efda918f0ba 62 ADC0_SE0 = 0,
bogdanm 73:1efda918f0ba 63 ADC0_SE3 = 3,
bogdanm 73:1efda918f0ba 64 ADC0_SE4a = (1 << CHANNELS_A_SHIFT) | (4),
bogdanm 73:1efda918f0ba 65 ADC0_SE4b = 4,
bogdanm 73:1efda918f0ba 66 ADC0_SE5b = 5,
bogdanm 73:1efda918f0ba 67 ADC0_SE6b = 6,
bogdanm 73:1efda918f0ba 68 ADC0_SE7a = (1 << CHANNELS_A_SHIFT) | (7),
bogdanm 73:1efda918f0ba 69 ADC0_SE7b = 7,
bogdanm 73:1efda918f0ba 70 ADC0_SE8 = 8,
bogdanm 73:1efda918f0ba 71 ADC0_SE9 = 9,
bogdanm 73:1efda918f0ba 72 ADC0_SE11 = 11,
bogdanm 73:1efda918f0ba 73 ADC0_SE12 = 12,
bogdanm 73:1efda918f0ba 74 ADC0_SE13 = 13,
bogdanm 73:1efda918f0ba 75 ADC0_SE14 = 14,
bogdanm 73:1efda918f0ba 76 ADC0_SE15 = 15,
bogdanm 73:1efda918f0ba 77 ADC0_SE23 = 23
bogdanm 73:1efda918f0ba 78 } ADCName;
bogdanm 73:1efda918f0ba 79
bogdanm 73:1efda918f0ba 80 typedef enum {
bogdanm 73:1efda918f0ba 81 DAC_0 = 0
bogdanm 73:1efda918f0ba 82 } DACName;
bogdanm 73:1efda918f0ba 83
bogdanm 73:1efda918f0ba 84
bogdanm 73:1efda918f0ba 85 typedef enum {
bogdanm 73:1efda918f0ba 86 SPI_0 = (int)SPI0_BASE,
bogdanm 73:1efda918f0ba 87 SPI_1 = (int)SPI1_BASE,
bogdanm 73:1efda918f0ba 88 } SPIName;
bogdanm 73:1efda918f0ba 89
bogdanm 73:1efda918f0ba 90 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 91 }
bogdanm 73:1efda918f0ba 92 #endif
bogdanm 73:1efda918f0ba 93
bogdanm 73:1efda918f0ba 94 #endif