frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_LPC4088/TOOLCHAIN_GCC_ARM/LPC4088.ld@76:824293ae5e43, 2014-01-13 (annotated)

Committer:
bogdanm
Date:
Mon Jan 13 15:31:11 2014 +0200
Revision:
76:824293ae5e43
Parent:
69:4a7918f48478 
Release 76 of the mbed library



Main changes:



- enabled SPI slave on LPC812

- the RTOS should now work with GCC_CR  (LPC1768 and LPC4088)

- GCC now uses 'hard' as the floating point ABI (arguments in floating point registers)

- Bug fixes on various platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 69:4a7918f48478 1 /* Linker script for mbed LPC1768 */
emilmont 69:4a7918f48478 2
emilmont 69:4a7918f48478 3 /* Linker script to configure memory regions. */
emilmont 69:4a7918f48478 4 MEMORY
emilmont 69:4a7918f48478 5 {
emilmont 69:4a7918f48478 6 FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
bogdanm 76:824293ae5e43 7 RAM (rwx) : ORIGIN = 0x100000E8, LENGTH = (64K - 0xE8)
emilmont 69:4a7918f48478 8
emilmont 69:4a7918f48478 9 USB_RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 16K
emilmont 69:4a7918f48478 10 ETH_RAM(rwx) : ORIGIN = 0x20004000, LENGTH = 16K
emilmont 69:4a7918f48478 11 }
emilmont 69:4a7918f48478 12
emilmont 69:4a7918f48478 13 /* Linker script to place sections and symbol values. Should be used together
emilmont 69:4a7918f48478 14 * with other linker script that defines memory regions FLASH and RAM.
emilmont 69:4a7918f48478 15 * It references following symbols, which must be defined in code:
emilmont 69:4a7918f48478 16 * Reset_Handler : Entry of reset handler
emilmont 69:4a7918f48478 17 *
emilmont 69:4a7918f48478 18 * It defines following symbols, which code can use without definition:
emilmont 69:4a7918f48478 19 * __exidx_start
emilmont 69:4a7918f48478 20 * __exidx_end
emilmont 69:4a7918f48478 21 * __etext
emilmont 69:4a7918f48478 22 * __data_start__
emilmont 69:4a7918f48478 23 * __preinit_array_start
emilmont 69:4a7918f48478 24 * __preinit_array_end
emilmont 69:4a7918f48478 25 * __init_array_start
emilmont 69:4a7918f48478 26 * __init_array_end
emilmont 69:4a7918f48478 27 * __fini_array_start
emilmont 69:4a7918f48478 28 * __fini_array_end
emilmont 69:4a7918f48478 29 * __data_end__
emilmont 69:4a7918f48478 30 * __bss_start__
emilmont 69:4a7918f48478 31 * __bss_end__
emilmont 69:4a7918f48478 32 * __end__
emilmont 69:4a7918f48478 33 * end
emilmont 69:4a7918f48478 34 * __HeapLimit
emilmont 69:4a7918f48478 35 * __StackLimit
emilmont 69:4a7918f48478 36 * __StackTop
emilmont 69:4a7918f48478 37 * __stack
emilmont 69:4a7918f48478 38 */
emilmont 69:4a7918f48478 39 ENTRY(Reset_Handler)
emilmont 69:4a7918f48478 40
emilmont 69:4a7918f48478 41 SECTIONS
emilmont 69:4a7918f48478 42 {
emilmont 69:4a7918f48478 43 .text :
emilmont 69:4a7918f48478 44 {
emilmont 69:4a7918f48478 45 KEEP(*(.isr_vector))
emilmont 69:4a7918f48478 46 *(.text*)
emilmont 69:4a7918f48478 47
emilmont 69:4a7918f48478 48 KEEP(*(.init))
emilmont 69:4a7918f48478 49 KEEP(*(.fini))
emilmont 69:4a7918f48478 50
emilmont 69:4a7918f48478 51 /* .ctors */
emilmont 69:4a7918f48478 52 *crtbegin.o(.ctors)
emilmont 69:4a7918f48478 53 *crtbegin?.o(.ctors)
emilmont 69:4a7918f48478 54 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
emilmont 69:4a7918f48478 55 *(SORT(.ctors.*))
emilmont 69:4a7918f48478 56 *(.ctors)
emilmont 69:4a7918f48478 57
emilmont 69:4a7918f48478 58 /* .dtors */
emilmont 69:4a7918f48478 59 *crtbegin.o(.dtors)
emilmont 69:4a7918f48478 60 *crtbegin?.o(.dtors)
emilmont 69:4a7918f48478 61 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
emilmont 69:4a7918f48478 62 *(SORT(.dtors.*))
emilmont 69:4a7918f48478 63 *(.dtors)
emilmont 69:4a7918f48478 64
emilmont 69:4a7918f48478 65 *(.rodata*)
emilmont 69:4a7918f48478 66
emilmont 69:4a7918f48478 67 KEEP(*(.eh_frame*))
emilmont 69:4a7918f48478 68 } > FLASH
emilmont 69:4a7918f48478 69
emilmont 69:4a7918f48478 70 .ARM.extab :
emilmont 69:4a7918f48478 71 {
emilmont 69:4a7918f48478 72 *(.ARM.extab* .gnu.linkonce.armextab.*)
emilmont 69:4a7918f48478 73 } > FLASH
emilmont 69:4a7918f48478 74
emilmont 69:4a7918f48478 75 __exidx_start = .;
emilmont 69:4a7918f48478 76 .ARM.exidx :
emilmont 69:4a7918f48478 77 {
emilmont 69:4a7918f48478 78 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
emilmont 69:4a7918f48478 79 } > FLASH
emilmont 69:4a7918f48478 80 __exidx_end = .;
emilmont 69:4a7918f48478 81
emilmont 69:4a7918f48478 82 __etext = .;
emilmont 69:4a7918f48478 83
emilmont 69:4a7918f48478 84 .data : AT (__etext)
emilmont 69:4a7918f48478 85 {
emilmont 69:4a7918f48478 86 __data_start__ = .;
emilmont 69:4a7918f48478 87 Image$$RW_IRAM1$$Base = .;
emilmont 69:4a7918f48478 88 *(vtable)
emilmont 69:4a7918f48478 89 *(.data*)
emilmont 69:4a7918f48478 90
emilmont 69:4a7918f48478 91 . = ALIGN(4);
emilmont 69:4a7918f48478 92 /* preinit data */
emilmont 69:4a7918f48478 93 PROVIDE (__preinit_array_start = .);
emilmont 69:4a7918f48478 94 KEEP(*(.preinit_array))
emilmont 69:4a7918f48478 95 PROVIDE (__preinit_array_end = .);
emilmont 69:4a7918f48478 96
emilmont 69:4a7918f48478 97 . = ALIGN(4);
emilmont 69:4a7918f48478 98 /* init data */
emilmont 69:4a7918f48478 99 PROVIDE (__init_array_start = .);
emilmont 69:4a7918f48478 100 KEEP(*(SORT(.init_array.*)))
emilmont 69:4a7918f48478 101 KEEP(*(.init_array))
emilmont 69:4a7918f48478 102 PROVIDE (__init_array_end = .);
emilmont 69:4a7918f48478 103
emilmont 69:4a7918f48478 104
emilmont 69:4a7918f48478 105 . = ALIGN(4);
emilmont 69:4a7918f48478 106 /* finit data */
emilmont 69:4a7918f48478 107 PROVIDE (__fini_array_start = .);
emilmont 69:4a7918f48478 108 KEEP(*(SORT(.fini_array.*)))
emilmont 69:4a7918f48478 109 KEEP(*(.fini_array))
emilmont 69:4a7918f48478 110 PROVIDE (__fini_array_end = .);
emilmont 69:4a7918f48478 111
emilmont 69:4a7918f48478 112 . = ALIGN(4);
emilmont 69:4a7918f48478 113 /* All data end */
emilmont 69:4a7918f48478 114 __data_end__ = .;
emilmont 69:4a7918f48478 115
emilmont 69:4a7918f48478 116 } > RAM
emilmont 69:4a7918f48478 117
emilmont 69:4a7918f48478 118
emilmont 69:4a7918f48478 119 .bss :
emilmont 69:4a7918f48478 120 {
emilmont 69:4a7918f48478 121 __bss_start__ = .;
emilmont 69:4a7918f48478 122 *(.bss*)
emilmont 69:4a7918f48478 123 *(COMMON)
emilmont 69:4a7918f48478 124 __bss_end__ = .;
emilmont 69:4a7918f48478 125 Image$$RW_IRAM1$$ZI$$Limit = . ;
emilmont 69:4a7918f48478 126 } > RAM
emilmont 69:4a7918f48478 127
emilmont 69:4a7918f48478 128
emilmont 69:4a7918f48478 129 .heap :
emilmont 69:4a7918f48478 130 {
emilmont 69:4a7918f48478 131 __end__ = .;
emilmont 69:4a7918f48478 132 end = __end__;
emilmont 69:4a7918f48478 133 *(.heap*)
emilmont 69:4a7918f48478 134 __HeapLimit = .;
emilmont 69:4a7918f48478 135 } > RAM
emilmont 69:4a7918f48478 136
emilmont 69:4a7918f48478 137 /* .stack_dummy section doesn't contains any symbols. It is only
emilmont 69:4a7918f48478 138 * used for linker to calculate size of stack sections, and assign
emilmont 69:4a7918f48478 139 * values to stack symbols later */
emilmont 69:4a7918f48478 140 .stack_dummy :
emilmont 69:4a7918f48478 141 {
emilmont 69:4a7918f48478 142 *(.stack)
emilmont 69:4a7918f48478 143 } > RAM
emilmont 69:4a7918f48478 144
emilmont 69:4a7918f48478 145 /* Set stack top to end of RAM, and stack limit move down by
emilmont 69:4a7918f48478 146 * size of stack_dummy section */
emilmont 69:4a7918f48478 147 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
emilmont 69:4a7918f48478 148 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
emilmont 69:4a7918f48478 149 PROVIDE(__stack = __StackTop);
emilmont 69:4a7918f48478 150
emilmont 69:4a7918f48478 151 /* Check if data + heap + stack exceeds RAM limit */
emilmont 69:4a7918f48478 152 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
emilmont 69:4a7918f48478 153
emilmont 69:4a7918f48478 154
emilmont 69:4a7918f48478 155 /* Code can explicitly ask for data to be
emilmont 69:4a7918f48478 156 placed in these higher RAM banks where
emilmont 69:4a7918f48478 157 they will be left uninitialized.
emilmont 69:4a7918f48478 158 */
emilmont 69:4a7918f48478 159 .AHBSRAM0 (NOLOAD):
emilmont 69:4a7918f48478 160 {
emilmont 69:4a7918f48478 161 Image$$RW_IRAM2$$Base = . ;
emilmont 69:4a7918f48478 162 *(AHBSRAM0)
emilmont 69:4a7918f48478 163 Image$$RW_IRAM2$$ZI$$Limit = .;
emilmont 69:4a7918f48478 164 } > USB_RAM
emilmont 69:4a7918f48478 165
emilmont 69:4a7918f48478 166 .AHBSRAM1 (NOLOAD):
emilmont 69:4a7918f48478 167 {
emilmont 69:4a7918f48478 168 Image$$RW_IRAM3$$Base = . ;
emilmont 69:4a7918f48478 169 *(AHBSRAM1)
emilmont 69:4a7918f48478 170 Image$$RW_IRAM3$$ZI$$Limit = .;
emilmont 69:4a7918f48478 171 } > ETH_RAM
emilmont 69:4a7918f48478 172 }