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TARGET_KL25Z/clk_freqs.h@76:824293ae5e43, 2014-01-13 (annotated)

Committer:
bogdanm
Date:
Mon Jan 13 15:31:11 2014 +0200
Revision:
76:824293ae5e43
Child:
77:869cf507173a
Release 76 of the mbed library



Main changes:



- enabled SPI slave on LPC812

- the RTOS should now work with GCC_CR  (LPC1768 and LPC4088)

- GCC now uses 'hard' as the floating point ABI (arguments in floating point registers)

- Bug fixes on various platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 76:824293ae5e43 1 /* mbed Microcontroller Library
bogdanm 76:824293ae5e43 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 76:824293ae5e43 3 *
bogdanm 76:824293ae5e43 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 76:824293ae5e43 5 * you may not use this file except in compliance with the License.
bogdanm 76:824293ae5e43 6 * You may obtain a copy of the License at
bogdanm 76:824293ae5e43 7 *
bogdanm 76:824293ae5e43 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 76:824293ae5e43 9 *
bogdanm 76:824293ae5e43 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 76:824293ae5e43 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 76:824293ae5e43 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 76:824293ae5e43 13 * See the License for the specific language governing permissions and
bogdanm 76:824293ae5e43 14 * limitations under the License.
bogdanm 76:824293ae5e43 15 */
bogdanm 76:824293ae5e43 16 #ifndef MBED_CLK_FREQS_H
bogdanm 76:824293ae5e43 17 #define MBED_CLK_FREQS_H
bogdanm 76:824293ae5e43 18
bogdanm 76:824293ae5e43 19 #ifdef __cplusplus
bogdanm 76:824293ae5e43 20 extern "C" {
bogdanm 76:824293ae5e43 21 #endif
bogdanm 76:824293ae5e43 22
bogdanm 76:824293ae5e43 23 //Get the peripheral bus clock frequency
bogdanm 76:824293ae5e43 24 static inline uint32_t bus_frequency(void) {
bogdanm 76:824293ae5e43 25 return SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
bogdanm 76:824293ae5e43 26 }
bogdanm 76:824293ae5e43 27
bogdanm 76:824293ae5e43 28 //Get external oscillator (crystal) frequency
bogdanm 76:824293ae5e43 29 static uint32_t extosc_frequency(void) {
bogdanm 76:824293ae5e43 30 uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
bogdanm 76:824293ae5e43 31
bogdanm 76:824293ae5e43 32 if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2)) //MCG clock = external reference clock
bogdanm 76:824293ae5e43 33 return MCGClock;
bogdanm 76:824293ae5e43 34
bogdanm 76:824293ae5e43 35 if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) { //PLL/FLL is selected
bogdanm 76:824293ae5e43 36 uint32_t divider, multiplier;
bogdanm 76:824293ae5e43 37 if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected
bogdanm 76:824293ae5e43 38 if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) { //FLL uses external reference
bogdanm 76:824293ae5e43 39 divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
bogdanm 76:824293ae5e43 40 if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u)
bogdanm 76:824293ae5e43 41 divider <<= 5u;
bogdanm 76:824293ae5e43 42 /* Select correct multiplier to calculate the MCG output clock */
bogdanm 76:824293ae5e43 43 switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) {
bogdanm 76:824293ae5e43 44 case 0x0u:
bogdanm 76:824293ae5e43 45 multiplier = 640u;
bogdanm 76:824293ae5e43 46 break;
bogdanm 76:824293ae5e43 47 case 0x20u:
bogdanm 76:824293ae5e43 48 multiplier = 1280u;
bogdanm 76:824293ae5e43 49 break;
bogdanm 76:824293ae5e43 50 case 0x40u:
bogdanm 76:824293ae5e43 51 multiplier = 1920u;
bogdanm 76:824293ae5e43 52 break;
bogdanm 76:824293ae5e43 53 case 0x60u:
bogdanm 76:824293ae5e43 54 multiplier = 2560u;
bogdanm 76:824293ae5e43 55 break;
bogdanm 76:824293ae5e43 56 case 0x80u:
bogdanm 76:824293ae5e43 57 multiplier = 732u;
bogdanm 76:824293ae5e43 58 break;
bogdanm 76:824293ae5e43 59 case 0xA0u:
bogdanm 76:824293ae5e43 60 multiplier = 1464u;
bogdanm 76:824293ae5e43 61 break;
bogdanm 76:824293ae5e43 62 case 0xC0u:
bogdanm 76:824293ae5e43 63 multiplier = 2197u;
bogdanm 76:824293ae5e43 64 break;
bogdanm 76:824293ae5e43 65 case 0xE0u:
bogdanm 76:824293ae5e43 66 default:
bogdanm 76:824293ae5e43 67 multiplier = 2929u;
bogdanm 76:824293ae5e43 68 break;
bogdanm 76:824293ae5e43 69 }
bogdanm 76:824293ae5e43 70
bogdanm 76:824293ae5e43 71 return MCGClock * divider / multiplier;
bogdanm 76:824293ae5e43 72 }
bogdanm 76:824293ae5e43 73 } else { //PLL is selected
bogdanm 76:824293ae5e43 74 divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
bogdanm 76:824293ae5e43 75 multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
bogdanm 76:824293ae5e43 76 return MCGClock * divider / multiplier;
bogdanm 76:824293ae5e43 77 }
bogdanm 76:824293ae5e43 78 }
bogdanm 76:824293ae5e43 79
bogdanm 76:824293ae5e43 80 //In all other cases either there is no crystal or we cannot determine it
bogdanm 76:824293ae5e43 81 //For example when the FLL is running on the internal reference, and there is also an
bogdanm 76:824293ae5e43 82 //external crystal. However these are unlikely situations
bogdanm 76:824293ae5e43 83 return 0;
bogdanm 76:824293ae5e43 84 }
bogdanm 76:824293ae5e43 85
bogdanm 76:824293ae5e43 86
bogdanm 76:824293ae5e43 87 #ifdef __cplusplus
bogdanm 76:824293ae5e43 88 }
bogdanm 76:824293ae5e43 89 #endif
bogdanm 76:824293ae5e43 90
bogdanm 76:824293ae5e43 91 #endif