frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_RZ_A1H/rtc_iodefine.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /*******************************************************************************
bogdanm 92:4fc01daae5a5 2 * DISCLAIMER
bogdanm 92:4fc01daae5a5 3 * This software is supplied by Renesas Electronics Corporation and is only
bogdanm 92:4fc01daae5a5 4 * intended for use with Renesas products. No other uses are authorized. This
bogdanm 92:4fc01daae5a5 5 * software is owned by Renesas Electronics Corporation and is protected under
bogdanm 92:4fc01daae5a5 6 * all applicable laws, including copyright laws.
bogdanm 92:4fc01daae5a5 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
bogdanm 92:4fc01daae5a5 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
bogdanm 92:4fc01daae5a5 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
bogdanm 92:4fc01daae5a5 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
bogdanm 92:4fc01daae5a5 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
bogdanm 92:4fc01daae5a5 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
bogdanm 92:4fc01daae5a5 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
bogdanm 92:4fc01daae5a5 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
bogdanm 92:4fc01daae5a5 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
bogdanm 92:4fc01daae5a5 16 * Renesas reserves the right, without notice, to make changes to this software
bogdanm 92:4fc01daae5a5 17 * and to discontinue the availability of this software. By using this software,
bogdanm 92:4fc01daae5a5 18 * you agree to the additional terms and conditions found by accessing the
bogdanm 92:4fc01daae5a5 19 * following link:
bogdanm 92:4fc01daae5a5 20 * http://www.renesas.com/disclaimer*
bogdanm 92:4fc01daae5a5 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
bogdanm 92:4fc01daae5a5 22 *******************************************************************************/
bogdanm 92:4fc01daae5a5 23 /*******************************************************************************
bogdanm 92:4fc01daae5a5 24 * File Name : rtc_iodefine.h
bogdanm 92:4fc01daae5a5 25 * $Rev: $
bogdanm 92:4fc01daae5a5 26 * $Date:: $
bogdanm 92:4fc01daae5a5 27 * Description : Definition of I/O Register (V1.00a)
bogdanm 92:4fc01daae5a5 28 ******************************************************************************/
bogdanm 92:4fc01daae5a5 29 #ifndef RTC_IODEFINE_H
bogdanm 92:4fc01daae5a5 30 #define RTC_IODEFINE_H
bogdanm 92:4fc01daae5a5 31 /* ->SEC M1.10.1 : Not magic number */
bogdanm 92:4fc01daae5a5 32
bogdanm 92:4fc01daae5a5 33 struct st_rtc
bogdanm 92:4fc01daae5a5 34 { /* RTC */
bogdanm 92:4fc01daae5a5 35 volatile uint8_t R64CNT; /* R64CNT */
bogdanm 92:4fc01daae5a5 36 volatile uint8_t dummy537[1]; /* */
bogdanm 92:4fc01daae5a5 37 volatile uint8_t RSECCNT; /* RSECCNT */
bogdanm 92:4fc01daae5a5 38 volatile uint8_t dummy538[1]; /* */
bogdanm 92:4fc01daae5a5 39 volatile uint8_t RMINCNT; /* RMINCNT */
bogdanm 92:4fc01daae5a5 40 volatile uint8_t dummy539[1]; /* */
bogdanm 92:4fc01daae5a5 41 volatile uint8_t RHRCNT; /* RHRCNT */
bogdanm 92:4fc01daae5a5 42 volatile uint8_t dummy540[1]; /* */
bogdanm 92:4fc01daae5a5 43 volatile uint8_t RWKCNT; /* RWKCNT */
bogdanm 92:4fc01daae5a5 44 volatile uint8_t dummy541[1]; /* */
bogdanm 92:4fc01daae5a5 45 volatile uint8_t RDAYCNT; /* RDAYCNT */
bogdanm 92:4fc01daae5a5 46 volatile uint8_t dummy542[1]; /* */
bogdanm 92:4fc01daae5a5 47 volatile uint8_t RMONCNT; /* RMONCNT */
bogdanm 92:4fc01daae5a5 48 volatile uint8_t dummy543[1]; /* */
bogdanm 92:4fc01daae5a5 49 volatile uint16_t RYRCNT; /* RYRCNT */
bogdanm 92:4fc01daae5a5 50 volatile uint8_t RSECAR; /* RSECAR */
bogdanm 92:4fc01daae5a5 51 volatile uint8_t dummy544[1]; /* */
bogdanm 92:4fc01daae5a5 52 volatile uint8_t RMINAR; /* RMINAR */
bogdanm 92:4fc01daae5a5 53 volatile uint8_t dummy545[1]; /* */
bogdanm 92:4fc01daae5a5 54 volatile uint8_t RHRAR; /* RHRAR */
bogdanm 92:4fc01daae5a5 55 volatile uint8_t dummy546[1]; /* */
bogdanm 92:4fc01daae5a5 56 volatile uint8_t RWKAR; /* RWKAR */
bogdanm 92:4fc01daae5a5 57 volatile uint8_t dummy547[1]; /* */
bogdanm 92:4fc01daae5a5 58 volatile uint8_t RDAYAR; /* RDAYAR */
bogdanm 92:4fc01daae5a5 59 volatile uint8_t dummy548[1]; /* */
bogdanm 92:4fc01daae5a5 60 volatile uint8_t RMONAR; /* RMONAR */
bogdanm 92:4fc01daae5a5 61 volatile uint8_t dummy549[1]; /* */
bogdanm 92:4fc01daae5a5 62 volatile uint8_t RCR1; /* RCR1 */
bogdanm 92:4fc01daae5a5 63 volatile uint8_t dummy550[1]; /* */
bogdanm 92:4fc01daae5a5 64 volatile uint8_t RCR2; /* RCR2 */
bogdanm 92:4fc01daae5a5 65 volatile uint8_t dummy551[1]; /* */
bogdanm 92:4fc01daae5a5 66 volatile uint16_t RYRAR; /* RYRAR */
bogdanm 92:4fc01daae5a5 67 volatile uint8_t dummy552[2]; /* */
bogdanm 92:4fc01daae5a5 68 volatile uint8_t RCR3; /* RCR3 */
bogdanm 92:4fc01daae5a5 69 volatile uint8_t dummy553[1]; /* */
bogdanm 92:4fc01daae5a5 70 volatile uint8_t RCR5; /* RCR5 */
bogdanm 92:4fc01daae5a5 71 volatile uint8_t dummy554[3]; /* */
bogdanm 92:4fc01daae5a5 72 volatile uint16_t RFRH; /* RFRH */
bogdanm 92:4fc01daae5a5 73 volatile uint16_t RFRL; /* RFRL */
bogdanm 92:4fc01daae5a5 74 };
bogdanm 92:4fc01daae5a5 75
bogdanm 92:4fc01daae5a5 76
bogdanm 92:4fc01daae5a5 77 #define RTC (*(struct st_rtc *)0xFCFF1000uL) /* RTC */
bogdanm 92:4fc01daae5a5 78
bogdanm 92:4fc01daae5a5 79
bogdanm 92:4fc01daae5a5 80 #define RTCR64CNT RTC.R64CNT
bogdanm 92:4fc01daae5a5 81 #define RTCRSECCNT RTC.RSECCNT
bogdanm 92:4fc01daae5a5 82 #define RTCRMINCNT RTC.RMINCNT
bogdanm 92:4fc01daae5a5 83 #define RTCRHRCNT RTC.RHRCNT
bogdanm 92:4fc01daae5a5 84 #define RTCRWKCNT RTC.RWKCNT
bogdanm 92:4fc01daae5a5 85 #define RTCRDAYCNT RTC.RDAYCNT
bogdanm 92:4fc01daae5a5 86 #define RTCRMONCNT RTC.RMONCNT
bogdanm 92:4fc01daae5a5 87 #define RTCRYRCNT RTC.RYRCNT
bogdanm 92:4fc01daae5a5 88 #define RTCRSECAR RTC.RSECAR
bogdanm 92:4fc01daae5a5 89 #define RTCRMINAR RTC.RMINAR
bogdanm 92:4fc01daae5a5 90 #define RTCRHRAR RTC.RHRAR
bogdanm 92:4fc01daae5a5 91 #define RTCRWKAR RTC.RWKAR
bogdanm 92:4fc01daae5a5 92 #define RTCRDAYAR RTC.RDAYAR
bogdanm 92:4fc01daae5a5 93 #define RTCRMONAR RTC.RMONAR
bogdanm 92:4fc01daae5a5 94 #define RTCRCR1 RTC.RCR1
bogdanm 92:4fc01daae5a5 95 #define RTCRCR2 RTC.RCR2
bogdanm 92:4fc01daae5a5 96 #define RTCRYRAR RTC.RYRAR
bogdanm 92:4fc01daae5a5 97 #define RTCRCR3 RTC.RCR3
bogdanm 92:4fc01daae5a5 98 #define RTCRCR5 RTC.RCR5
bogdanm 92:4fc01daae5a5 99 #define RTCRFRH RTC.RFRH
bogdanm 92:4fc01daae5a5 100 #define RTCRFRL RTC.RFRL
bogdanm 92:4fc01daae5a5 101 /* <-SEC M1.10.1 */
bogdanm 92:4fc01daae5a5 102 #endif