frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_RZ_A1H/l2c_iodefine.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /*******************************************************************************
bogdanm 92:4fc01daae5a5 2 * DISCLAIMER
bogdanm 92:4fc01daae5a5 3 * This software is supplied by Renesas Electronics Corporation and is only
bogdanm 92:4fc01daae5a5 4 * intended for use with Renesas products. No other uses are authorized. This
bogdanm 92:4fc01daae5a5 5 * software is owned by Renesas Electronics Corporation and is protected under
bogdanm 92:4fc01daae5a5 6 * all applicable laws, including copyright laws.
bogdanm 92:4fc01daae5a5 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
bogdanm 92:4fc01daae5a5 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
bogdanm 92:4fc01daae5a5 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
bogdanm 92:4fc01daae5a5 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
bogdanm 92:4fc01daae5a5 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
bogdanm 92:4fc01daae5a5 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
bogdanm 92:4fc01daae5a5 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
bogdanm 92:4fc01daae5a5 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
bogdanm 92:4fc01daae5a5 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
bogdanm 92:4fc01daae5a5 16 * Renesas reserves the right, without notice, to make changes to this software
bogdanm 92:4fc01daae5a5 17 * and to discontinue the availability of this software. By using this software,
bogdanm 92:4fc01daae5a5 18 * you agree to the additional terms and conditions found by accessing the
bogdanm 92:4fc01daae5a5 19 * following link:
bogdanm 92:4fc01daae5a5 20 * http://www.renesas.com/disclaimer*
bogdanm 92:4fc01daae5a5 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
bogdanm 92:4fc01daae5a5 22 *******************************************************************************/
bogdanm 92:4fc01daae5a5 23 /*******************************************************************************
bogdanm 92:4fc01daae5a5 24 * File Name : l2c_iodefine.h
bogdanm 92:4fc01daae5a5 25 * $Rev: $
bogdanm 92:4fc01daae5a5 26 * $Date:: $
bogdanm 92:4fc01daae5a5 27 * Description : Definition of I/O Register (V1.00a)
bogdanm 92:4fc01daae5a5 28 ******************************************************************************/
bogdanm 92:4fc01daae5a5 29 #ifndef L2C_IODEFINE_H
bogdanm 92:4fc01daae5a5 30 #define L2C_IODEFINE_H
bogdanm 92:4fc01daae5a5 31 /* ->SEC M1.10.1 : Not magic number */
bogdanm 92:4fc01daae5a5 32
bogdanm 92:4fc01daae5a5 33 struct st_l2c
bogdanm 92:4fc01daae5a5 34 { /* L2C */
bogdanm 92:4fc01daae5a5 35 volatile uint32_t REG0_CACHE_ID; /* REG0_CACHE_ID */
bogdanm 92:4fc01daae5a5 36 volatile uint32_t REG0_CACHE_TYPE; /* REG0_CACHE_TYPE */
bogdanm 92:4fc01daae5a5 37 volatile uint8_t dummy8[248]; /* */
bogdanm 92:4fc01daae5a5 38 volatile uint32_t REG1_CONTROL; /* REG1_CONTROL */
bogdanm 92:4fc01daae5a5 39 volatile uint32_t REG1_AUX_CONTROL; /* REG1_AUX_CONTROL */
bogdanm 92:4fc01daae5a5 40 volatile uint32_t REG1_TAG_RAM_CONTROL; /* REG1_TAG_RAM_CONTROL */
bogdanm 92:4fc01daae5a5 41 volatile uint32_t REG1_DATA_RAM_CONTROL; /* REG1_DATA_RAM_CONTROL */
bogdanm 92:4fc01daae5a5 42 volatile uint8_t dummy9[240]; /* */
bogdanm 92:4fc01daae5a5 43 volatile uint32_t REG2_EV_COUNTER_CTRL; /* REG2_EV_COUNTER_CTRL */
bogdanm 92:4fc01daae5a5 44 volatile uint32_t REG2_EV_COUNTER1_CFG; /* REG2_EV_COUNTER1_CFG */
bogdanm 92:4fc01daae5a5 45 volatile uint32_t REG2_EV_COUNTER0_CFG; /* REG2_EV_COUNTER0_CFG */
bogdanm 92:4fc01daae5a5 46 volatile uint32_t REG2_EV_COUNTER1; /* REG2_EV_COUNTER1 */
bogdanm 92:4fc01daae5a5 47 volatile uint32_t REG2_EV_COUNTER0; /* REG2_EV_COUNTER0 */
bogdanm 92:4fc01daae5a5 48 volatile uint32_t REG2_INT_MASK; /* REG2_INT_MASK */
bogdanm 92:4fc01daae5a5 49 volatile uint32_t REG2_INT_MASK_STATUS; /* REG2_INT_MASK_STATUS */
bogdanm 92:4fc01daae5a5 50 volatile uint32_t REG2_INT_RAW_STATUS; /* REG2_INT_RAW_STATUS */
bogdanm 92:4fc01daae5a5 51 volatile uint32_t REG2_INT_CLEAR; /* REG2_INT_CLEAR */
bogdanm 92:4fc01daae5a5 52 volatile uint8_t dummy10[1292]; /* */
bogdanm 92:4fc01daae5a5 53 volatile uint32_t REG7_CACHE_SYNC; /* REG7_CACHE_SYNC */
bogdanm 92:4fc01daae5a5 54 volatile uint8_t dummy11[60]; /* */
bogdanm 92:4fc01daae5a5 55 volatile uint32_t REG7_INV_PA; /* REG7_INV_PA */
bogdanm 92:4fc01daae5a5 56 volatile uint8_t dummy12[8]; /* */
bogdanm 92:4fc01daae5a5 57 volatile uint32_t REG7_INV_WAY; /* REG7_INV_WAY */
bogdanm 92:4fc01daae5a5 58 volatile uint8_t dummy13[48]; /* */
bogdanm 92:4fc01daae5a5 59 volatile uint32_t REG7_CLEAN_PA; /* REG7_CLEAN_PA */
bogdanm 92:4fc01daae5a5 60 volatile uint8_t dummy14[4]; /* */
bogdanm 92:4fc01daae5a5 61 volatile uint32_t REG7_CLEAN_INDEX; /* REG7_CLEAN_INDEX */
bogdanm 92:4fc01daae5a5 62 volatile uint32_t REG7_CLEAN_WAY; /* REG7_CLEAN_WAY */
bogdanm 92:4fc01daae5a5 63 volatile uint8_t dummy15[48]; /* */
bogdanm 92:4fc01daae5a5 64 volatile uint32_t REG7_CLEAN_INV_PA; /* REG7_CLEAN_INV_PA */
bogdanm 92:4fc01daae5a5 65 volatile uint8_t dummy16[4]; /* */
bogdanm 92:4fc01daae5a5 66 volatile uint32_t REG7_CLEAN_INV_INDEX; /* REG7_CLEAN_INV_INDEX */
bogdanm 92:4fc01daae5a5 67 volatile uint32_t REG7_CLEAN_INV_WAY; /* REG7_CLEAN_INV_WAY */
bogdanm 92:4fc01daae5a5 68 volatile uint8_t dummy17[256]; /* */
bogdanm 92:4fc01daae5a5 69 /* start of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 70 volatile uint32_t REG9_D_LOCKDOWN0; /* REG9_D_LOCKDOWN0 */
bogdanm 92:4fc01daae5a5 71 volatile uint32_t REG9_I_LOCKDOWN0; /* REG9_I_LOCKDOWN0 */
bogdanm 92:4fc01daae5a5 72 /* end of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 73 /* start of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 74 volatile uint32_t REG9_D_LOCKDOWN1; /* REG9_D_LOCKDOWN1 */
bogdanm 92:4fc01daae5a5 75 volatile uint32_t REG9_I_LOCKDOWN1; /* REG9_I_LOCKDOWN1 */
bogdanm 92:4fc01daae5a5 76 /* end of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 77 /* start of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 78 volatile uint32_t REG9_D_LOCKDOWN2; /* REG9_D_LOCKDOWN2 */
bogdanm 92:4fc01daae5a5 79 volatile uint32_t REG9_I_LOCKDOWN2; /* REG9_I_LOCKDOWN2 */
bogdanm 92:4fc01daae5a5 80 /* end of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 81 /* start of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 82 volatile uint32_t REG9_D_LOCKDOWN3; /* REG9_D_LOCKDOWN3 */
bogdanm 92:4fc01daae5a5 83 volatile uint32_t REG9_I_LOCKDOWN3; /* REG9_I_LOCKDOWN3 */
bogdanm 92:4fc01daae5a5 84 /* end of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 85 /* start of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 86 volatile uint32_t REG9_D_LOCKDOWN4; /* REG9_D_LOCKDOWN4 */
bogdanm 92:4fc01daae5a5 87 volatile uint32_t REG9_I_LOCKDOWN4; /* REG9_I_LOCKDOWN4 */
bogdanm 92:4fc01daae5a5 88 /* end of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 89 /* start of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 90 volatile uint32_t REG9_D_LOCKDOWN5; /* REG9_D_LOCKDOWN5 */
bogdanm 92:4fc01daae5a5 91 volatile uint32_t REG9_I_LOCKDOWN5; /* REG9_I_LOCKDOWN5 */
bogdanm 92:4fc01daae5a5 92 /* end of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 93 /* start of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 94 volatile uint32_t REG9_D_LOCKDOWN6; /* REG9_D_LOCKDOWN6 */
bogdanm 92:4fc01daae5a5 95 volatile uint32_t REG9_I_LOCKDOWN6; /* REG9_I_LOCKDOWN6 */
bogdanm 92:4fc01daae5a5 96 /* end of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 97 /* start of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 98 volatile uint32_t REG9_D_LOCKDOWN7; /* REG9_D_LOCKDOWN7 */
bogdanm 92:4fc01daae5a5 99 volatile uint32_t REG9_I_LOCKDOWN7; /* REG9_I_LOCKDOWN7 */
bogdanm 92:4fc01daae5a5 100 /* end of struct st_l2c_from_reg9_d_lockdown0 */
bogdanm 92:4fc01daae5a5 101 volatile uint8_t dummy18[16]; /* */
bogdanm 92:4fc01daae5a5 102 volatile uint32_t REG9_LOCK_LINE_EN; /* REG9_LOCK_LINE_EN */
bogdanm 92:4fc01daae5a5 103 volatile uint32_t REG9_UNLOCK_WAY; /* REG9_UNLOCK_WAY */
bogdanm 92:4fc01daae5a5 104 volatile uint8_t dummy19[680]; /* */
bogdanm 92:4fc01daae5a5 105 volatile uint32_t REG12_ADDR_FILTERING_START; /* REG12_ADDR_FILTERING_START */
bogdanm 92:4fc01daae5a5 106 volatile uint32_t REG12_ADDR_FILTERING_END; /* REG12_ADDR_FILTERING_END */
bogdanm 92:4fc01daae5a5 107 volatile uint8_t dummy20[824]; /* */
bogdanm 92:4fc01daae5a5 108 volatile uint32_t REG15_DEBUG_CTRL; /* REG15_DEBUG_CTRL */
bogdanm 92:4fc01daae5a5 109 volatile uint8_t dummy21[28]; /* */
bogdanm 92:4fc01daae5a5 110 volatile uint32_t REG15_PREFETCH_CTRL; /* REG15_PREFETCH_CTRL */
bogdanm 92:4fc01daae5a5 111 volatile uint8_t dummy22[28]; /* */
bogdanm 92:4fc01daae5a5 112 volatile uint32_t REG15_POWER_CTRL; /* REG15_POWER_CTRL */
bogdanm 92:4fc01daae5a5 113 };
bogdanm 92:4fc01daae5a5 114
bogdanm 92:4fc01daae5a5 115
bogdanm 92:4fc01daae5a5 116 struct st_l2c_from_reg9_d_lockdown0
bogdanm 92:4fc01daae5a5 117 {
bogdanm 92:4fc01daae5a5 118 volatile uint32_t REG9_D_LOCKDOWN0; /* REG9_D_LOCKDOWN0 */
bogdanm 92:4fc01daae5a5 119 volatile uint32_t REG9_I_LOCKDOWN0; /* REG9_I_LOCKDOWN0 */
bogdanm 92:4fc01daae5a5 120 };
bogdanm 92:4fc01daae5a5 121
bogdanm 92:4fc01daae5a5 122
bogdanm 92:4fc01daae5a5 123 #define L2C (*(struct st_l2c *)0x3FFFF000uL) /* L2C */
bogdanm 92:4fc01daae5a5 124
bogdanm 92:4fc01daae5a5 125
bogdanm 92:4fc01daae5a5 126 /* Start of channnel array defines of L2C */
bogdanm 92:4fc01daae5a5 127
bogdanm 92:4fc01daae5a5 128 /* Channnel array defines of L2C_FROM_REG9_D_LOCKDOWN0_ARRAY */
bogdanm 92:4fc01daae5a5 129 /*(Sample) value = L2C_FROM_REG9_D_LOCKDOWN0_ARRAY[ channel ]->REG9_D_LOCKDOWN0; */
bogdanm 92:4fc01daae5a5 130 #define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_COUNT 8
bogdanm 92:4fc01daae5a5 131 #define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_ADDRESS_LIST \
bogdanm 92:4fc01daae5a5 132 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
bogdanm 92:4fc01daae5a5 133 &L2C_FROM_REG9_D_LOCKDOWN0, &L2C_FROM_REG9_D_LOCKDOWN1, &L2C_FROM_REG9_D_LOCKDOWN2, &L2C_FROM_REG9_D_LOCKDOWN3, &L2C_FROM_REG9_D_LOCKDOWN4, &L2C_FROM_REG9_D_LOCKDOWN5, &L2C_FROM_REG9_D_LOCKDOWN6, &L2C_FROM_REG9_D_LOCKDOWN7 \
bogdanm 92:4fc01daae5a5 134 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
bogdanm 92:4fc01daae5a5 135 #define L2C_FROM_REG9_D_LOCKDOWN0 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN0) /* L2C_FROM_REG9_D_LOCKDOWN0 */
bogdanm 92:4fc01daae5a5 136 #define L2C_FROM_REG9_D_LOCKDOWN1 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN1) /* L2C_FROM_REG9_D_LOCKDOWN1 */
bogdanm 92:4fc01daae5a5 137 #define L2C_FROM_REG9_D_LOCKDOWN2 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN2) /* L2C_FROM_REG9_D_LOCKDOWN2 */
bogdanm 92:4fc01daae5a5 138 #define L2C_FROM_REG9_D_LOCKDOWN3 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN3) /* L2C_FROM_REG9_D_LOCKDOWN3 */
bogdanm 92:4fc01daae5a5 139 #define L2C_FROM_REG9_D_LOCKDOWN4 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN4) /* L2C_FROM_REG9_D_LOCKDOWN4 */
bogdanm 92:4fc01daae5a5 140 #define L2C_FROM_REG9_D_LOCKDOWN5 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN5) /* L2C_FROM_REG9_D_LOCKDOWN5 */
bogdanm 92:4fc01daae5a5 141 #define L2C_FROM_REG9_D_LOCKDOWN6 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN6) /* L2C_FROM_REG9_D_LOCKDOWN6 */
bogdanm 92:4fc01daae5a5 142 #define L2C_FROM_REG9_D_LOCKDOWN7 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN7) /* L2C_FROM_REG9_D_LOCKDOWN7 */
bogdanm 92:4fc01daae5a5 143
bogdanm 92:4fc01daae5a5 144 /* End of channnel array defines of L2C */
bogdanm 92:4fc01daae5a5 145
bogdanm 92:4fc01daae5a5 146
bogdanm 92:4fc01daae5a5 147 #define L2CREG0_CACHE_ID L2C.REG0_CACHE_ID
bogdanm 92:4fc01daae5a5 148 #define L2CREG0_CACHE_TYPE L2C.REG0_CACHE_TYPE
bogdanm 92:4fc01daae5a5 149 #define L2CREG1_CONTROL L2C.REG1_CONTROL
bogdanm 92:4fc01daae5a5 150 #define L2CREG1_AUX_CONTROL L2C.REG1_AUX_CONTROL
bogdanm 92:4fc01daae5a5 151 #define L2CREG1_TAG_RAM_CONTROL L2C.REG1_TAG_RAM_CONTROL
bogdanm 92:4fc01daae5a5 152 #define L2CREG1_DATA_RAM_CONTROL L2C.REG1_DATA_RAM_CONTROL
bogdanm 92:4fc01daae5a5 153 #define L2CREG2_EV_COUNTER_CTRL L2C.REG2_EV_COUNTER_CTRL
bogdanm 92:4fc01daae5a5 154 #define L2CREG2_EV_COUNTER1_CFG L2C.REG2_EV_COUNTER1_CFG
bogdanm 92:4fc01daae5a5 155 #define L2CREG2_EV_COUNTER0_CFG L2C.REG2_EV_COUNTER0_CFG
bogdanm 92:4fc01daae5a5 156 #define L2CREG2_EV_COUNTER1 L2C.REG2_EV_COUNTER1
bogdanm 92:4fc01daae5a5 157 #define L2CREG2_EV_COUNTER0 L2C.REG2_EV_COUNTER0
bogdanm 92:4fc01daae5a5 158 #define L2CREG2_INT_MASK L2C.REG2_INT_MASK
bogdanm 92:4fc01daae5a5 159 #define L2CREG2_INT_MASK_STATUS L2C.REG2_INT_MASK_STATUS
bogdanm 92:4fc01daae5a5 160 #define L2CREG2_INT_RAW_STATUS L2C.REG2_INT_RAW_STATUS
bogdanm 92:4fc01daae5a5 161 #define L2CREG2_INT_CLEAR L2C.REG2_INT_CLEAR
bogdanm 92:4fc01daae5a5 162 #define L2CREG7_CACHE_SYNC L2C.REG7_CACHE_SYNC
bogdanm 92:4fc01daae5a5 163 #define L2CREG7_INV_PA L2C.REG7_INV_PA
bogdanm 92:4fc01daae5a5 164 #define L2CREG7_INV_WAY L2C.REG7_INV_WAY
bogdanm 92:4fc01daae5a5 165 #define L2CREG7_CLEAN_PA L2C.REG7_CLEAN_PA
bogdanm 92:4fc01daae5a5 166 #define L2CREG7_CLEAN_INDEX L2C.REG7_CLEAN_INDEX
bogdanm 92:4fc01daae5a5 167 #define L2CREG7_CLEAN_WAY L2C.REG7_CLEAN_WAY
bogdanm 92:4fc01daae5a5 168 #define L2CREG7_CLEAN_INV_PA L2C.REG7_CLEAN_INV_PA
bogdanm 92:4fc01daae5a5 169 #define L2CREG7_CLEAN_INV_INDEX L2C.REG7_CLEAN_INV_INDEX
bogdanm 92:4fc01daae5a5 170 #define L2CREG7_CLEAN_INV_WAY L2C.REG7_CLEAN_INV_WAY
bogdanm 92:4fc01daae5a5 171 #define L2CREG9_D_LOCKDOWN0 L2C.REG9_D_LOCKDOWN0
bogdanm 92:4fc01daae5a5 172 #define L2CREG9_I_LOCKDOWN0 L2C.REG9_I_LOCKDOWN0
bogdanm 92:4fc01daae5a5 173 #define L2CREG9_D_LOCKDOWN1 L2C.REG9_D_LOCKDOWN1
bogdanm 92:4fc01daae5a5 174 #define L2CREG9_I_LOCKDOWN1 L2C.REG9_I_LOCKDOWN1
bogdanm 92:4fc01daae5a5 175 #define L2CREG9_D_LOCKDOWN2 L2C.REG9_D_LOCKDOWN2
bogdanm 92:4fc01daae5a5 176 #define L2CREG9_I_LOCKDOWN2 L2C.REG9_I_LOCKDOWN2
bogdanm 92:4fc01daae5a5 177 #define L2CREG9_D_LOCKDOWN3 L2C.REG9_D_LOCKDOWN3
bogdanm 92:4fc01daae5a5 178 #define L2CREG9_I_LOCKDOWN3 L2C.REG9_I_LOCKDOWN3
bogdanm 92:4fc01daae5a5 179 #define L2CREG9_D_LOCKDOWN4 L2C.REG9_D_LOCKDOWN4
bogdanm 92:4fc01daae5a5 180 #define L2CREG9_I_LOCKDOWN4 L2C.REG9_I_LOCKDOWN4
bogdanm 92:4fc01daae5a5 181 #define L2CREG9_D_LOCKDOWN5 L2C.REG9_D_LOCKDOWN5
bogdanm 92:4fc01daae5a5 182 #define L2CREG9_I_LOCKDOWN5 L2C.REG9_I_LOCKDOWN5
bogdanm 92:4fc01daae5a5 183 #define L2CREG9_D_LOCKDOWN6 L2C.REG9_D_LOCKDOWN6
bogdanm 92:4fc01daae5a5 184 #define L2CREG9_I_LOCKDOWN6 L2C.REG9_I_LOCKDOWN6
bogdanm 92:4fc01daae5a5 185 #define L2CREG9_D_LOCKDOWN7 L2C.REG9_D_LOCKDOWN7
bogdanm 92:4fc01daae5a5 186 #define L2CREG9_I_LOCKDOWN7 L2C.REG9_I_LOCKDOWN7
bogdanm 92:4fc01daae5a5 187 #define L2CREG9_LOCK_LINE_EN L2C.REG9_LOCK_LINE_EN
bogdanm 92:4fc01daae5a5 188 #define L2CREG9_UNLOCK_WAY L2C.REG9_UNLOCK_WAY
bogdanm 92:4fc01daae5a5 189 #define L2CREG12_ADDR_FILTERING_START L2C.REG12_ADDR_FILTERING_START
bogdanm 92:4fc01daae5a5 190 #define L2CREG12_ADDR_FILTERING_END L2C.REG12_ADDR_FILTERING_END
bogdanm 92:4fc01daae5a5 191 #define L2CREG15_DEBUG_CTRL L2C.REG15_DEBUG_CTRL
bogdanm 92:4fc01daae5a5 192 #define L2CREG15_PREFETCH_CTRL L2C.REG15_PREFETCH_CTRL
bogdanm 92:4fc01daae5a5 193 #define L2CREG15_POWER_CTRL L2C.REG15_POWER_CTRL
bogdanm 92:4fc01daae5a5 194 /* <-SEC M1.10.1 */
bogdanm 92:4fc01daae5a5 195 #endif