frederic blanc / mbed

/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

TARGET_NUCLEO_F334R8/stm32f3xx_hal_spi.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Parent:
86:04dd9b1680ae 
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 86:04dd9b1680ae 1 /**
bogdanm 86:04dd9b1680ae 2 ******************************************************************************
bogdanm 86:04dd9b1680ae 3 * @file stm32f3xx_hal_spi.h
bogdanm 86:04dd9b1680ae 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 12-Sept-2014
bogdanm 86:04dd9b1680ae 7 * @brief Header file of SPI HAL module.
bogdanm 86:04dd9b1680ae 8 ******************************************************************************
bogdanm 86:04dd9b1680ae 9 * @attention
bogdanm 86:04dd9b1680ae 10 *
bogdanm 86:04dd9b1680ae 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 86:04dd9b1680ae 12 *
bogdanm 86:04dd9b1680ae 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 86:04dd9b1680ae 14 * are permitted provided that the following conditions are met:
bogdanm 86:04dd9b1680ae 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 86:04dd9b1680ae 16 * this list of conditions and the following disclaimer.
bogdanm 86:04dd9b1680ae 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 86:04dd9b1680ae 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 86:04dd9b1680ae 19 * and/or other materials provided with the distribution.
bogdanm 86:04dd9b1680ae 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 86:04dd9b1680ae 21 * may be used to endorse or promote products derived from this software
bogdanm 86:04dd9b1680ae 22 * without specific prior written permission.
bogdanm 86:04dd9b1680ae 23 *
bogdanm 86:04dd9b1680ae 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 86:04dd9b1680ae 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 86:04dd9b1680ae 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 86:04dd9b1680ae 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 86:04dd9b1680ae 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 86:04dd9b1680ae 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 86:04dd9b1680ae 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 86:04dd9b1680ae 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 86:04dd9b1680ae 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 86:04dd9b1680ae 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 86:04dd9b1680ae 34 *
bogdanm 86:04dd9b1680ae 35 ******************************************************************************
bogdanm 86:04dd9b1680ae 36 */
bogdanm 86:04dd9b1680ae 37
bogdanm 86:04dd9b1680ae 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 86:04dd9b1680ae 39 #ifndef __STM32F3xx_HAL_SPI_H
bogdanm 86:04dd9b1680ae 40 #define __STM32F3xx_HAL_SPI_H
bogdanm 86:04dd9b1680ae 41
bogdanm 86:04dd9b1680ae 42 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 43 extern "C" {
bogdanm 86:04dd9b1680ae 44 #endif
bogdanm 86:04dd9b1680ae 45
bogdanm 86:04dd9b1680ae 46 /* Includes ------------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 47 #include "stm32f3xx_hal_def.h"
bogdanm 86:04dd9b1680ae 48
bogdanm 86:04dd9b1680ae 49 /** @addtogroup STM32F3xx_HAL_Driver
bogdanm 86:04dd9b1680ae 50 * @{
bogdanm 86:04dd9b1680ae 51 */
bogdanm 86:04dd9b1680ae 52
bogdanm 86:04dd9b1680ae 53 /** @addtogroup SPI
bogdanm 86:04dd9b1680ae 54 * @{
bogdanm 86:04dd9b1680ae 55 */
bogdanm 86:04dd9b1680ae 56
bogdanm 86:04dd9b1680ae 57 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 58 /** @defgroup SPI_Exported_Types SPI Exported Types
bogdanm 92:4fc01daae5a5 59 * @{
bogdanm 92:4fc01daae5a5 60 */
bogdanm 86:04dd9b1680ae 61
bogdanm 86:04dd9b1680ae 62 /**
bogdanm 86:04dd9b1680ae 63 * @brief SPI Configuration Structure definition
bogdanm 86:04dd9b1680ae 64 */
bogdanm 86:04dd9b1680ae 65 typedef struct
bogdanm 86:04dd9b1680ae 66 {
bogdanm 86:04dd9b1680ae 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
bogdanm 86:04dd9b1680ae 68 This parameter can be a value of @ref SPI_mode */
bogdanm 86:04dd9b1680ae 69
bogdanm 86:04dd9b1680ae 70 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
bogdanm 86:04dd9b1680ae 71 This parameter can be a value of @ref SPI_Direction */
bogdanm 86:04dd9b1680ae 72
bogdanm 86:04dd9b1680ae 73 uint32_t DataSize; /*!< Specifies the SPI data size.
bogdanm 86:04dd9b1680ae 74 This parameter can be a value of @ref SPI_data_size */
bogdanm 86:04dd9b1680ae 75
bogdanm 86:04dd9b1680ae 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
bogdanm 86:04dd9b1680ae 77 This parameter can be a value of @ref SPI_Clock_Polarity */
bogdanm 86:04dd9b1680ae 78
bogdanm 86:04dd9b1680ae 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
bogdanm 86:04dd9b1680ae 80 This parameter can be a value of @ref SPI_Clock_Phase */
bogdanm 86:04dd9b1680ae 81
bogdanm 86:04dd9b1680ae 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
bogdanm 86:04dd9b1680ae 83 hardware (NSS pin) or by software using the SSI bit.
bogdanm 86:04dd9b1680ae 84 This parameter can be a value of @ref SPI_Slave_Select_management */
bogdanm 86:04dd9b1680ae 85
bogdanm 86:04dd9b1680ae 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
bogdanm 86:04dd9b1680ae 87 used to configure the transmit and receive SCK clock.
bogdanm 86:04dd9b1680ae 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
bogdanm 86:04dd9b1680ae 89 @note The communication clock is derived from the master
bogdanm 86:04dd9b1680ae 90 clock. The slave clock does not need to be set. */
bogdanm 86:04dd9b1680ae 91
bogdanm 86:04dd9b1680ae 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
bogdanm 86:04dd9b1680ae 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
bogdanm 86:04dd9b1680ae 94
bogdanm 86:04dd9b1680ae 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not .
bogdanm 86:04dd9b1680ae 96 This parameter can be a value of @ref SPI_TI_mode */
bogdanm 86:04dd9b1680ae 97
bogdanm 86:04dd9b1680ae 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
bogdanm 86:04dd9b1680ae 99 This parameter can be a value of @ref SPI_CRC_Calculation */
bogdanm 86:04dd9b1680ae 100
bogdanm 86:04dd9b1680ae 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
bogdanm 86:04dd9b1680ae 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
bogdanm 86:04dd9b1680ae 103
bogdanm 86:04dd9b1680ae 104 uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
bogdanm 86:04dd9b1680ae 105 CRC Length is only used with Data8 and Data16, not other data size
bogdanm 86:04dd9b1680ae 106 This parameter must 0 or 1 or 2*/
bogdanm 86:04dd9b1680ae 107
bogdanm 86:04dd9b1680ae 108 uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not .
bogdanm 86:04dd9b1680ae 109 This mode is activated by the NSSP bit in the SPIx_CR2 register and
bogdanm 86:04dd9b1680ae 110 it takes effect only if the SPI interface is configured as Motorola SPI
bogdanm 86:04dd9b1680ae 111 master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
bogdanm 86:04dd9b1680ae 112 CPOL setting is ignored).. */
bogdanm 86:04dd9b1680ae 113 } SPI_InitTypeDef;
bogdanm 86:04dd9b1680ae 114
bogdanm 86:04dd9b1680ae 115 /**
bogdanm 86:04dd9b1680ae 116 * @brief HAL State structures definition
bogdanm 86:04dd9b1680ae 117 */
bogdanm 86:04dd9b1680ae 118 typedef enum
bogdanm 86:04dd9b1680ae 119 {
bogdanm 86:04dd9b1680ae 120 HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */
bogdanm 86:04dd9b1680ae 121 HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 86:04dd9b1680ae 122 HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 86:04dd9b1680ae 123 HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
bogdanm 86:04dd9b1680ae 124 HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
bogdanm 86:04dd9b1680ae 125 HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */
bogdanm 86:04dd9b1680ae 126 HAL_SPI_STATE_TIMEOUT = 0x06, /*!< Timeout state */
bogdanm 86:04dd9b1680ae 127 HAL_SPI_STATE_ERROR = 0x07 /*!< Data Transmission and Reception process is ongoing */
bogdanm 86:04dd9b1680ae 128
bogdanm 86:04dd9b1680ae 129 }HAL_SPI_StateTypeDef;
bogdanm 86:04dd9b1680ae 130
bogdanm 86:04dd9b1680ae 131 /**
bogdanm 86:04dd9b1680ae 132 * @brief HAL SPI Error Code structure definition
bogdanm 86:04dd9b1680ae 133 */
bogdanm 86:04dd9b1680ae 134 typedef enum
bogdanm 86:04dd9b1680ae 135 {
bogdanm 86:04dd9b1680ae 136 HAL_SPI_ERROR_NONE = 0x00, /*!< No error */
bogdanm 86:04dd9b1680ae 137 HAL_SPI_ERROR_MODF = 0x01, /*!< MODF error */
bogdanm 86:04dd9b1680ae 138 HAL_SPI_ERROR_CRC = 0x02, /*!< CRC error */
bogdanm 86:04dd9b1680ae 139 HAL_SPI_ERROR_OVR = 0x04, /*!< OVR error */
bogdanm 86:04dd9b1680ae 140 HAL_SPI_ERROR_FRE = 0x08, /*!< FRE error */
bogdanm 86:04dd9b1680ae 141 HAL_SPI_ERROR_DMA = 0x10, /*!< DMA transfer error */
bogdanm 86:04dd9b1680ae 142 HAL_SPI_ERROR_FLAG = 0x20, /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
bogdanm 86:04dd9b1680ae 143 HAL_SPI_ERROR_UNKNOW = 0x40, /*!< Unknow Error error */
bogdanm 86:04dd9b1680ae 144 }HAL_SPI_ErrorTypeDef;
bogdanm 86:04dd9b1680ae 145
bogdanm 86:04dd9b1680ae 146 /**
bogdanm 86:04dd9b1680ae 147 * @brief SPI handle Structure definition
bogdanm 86:04dd9b1680ae 148 */
bogdanm 86:04dd9b1680ae 149 typedef struct __SPI_HandleTypeDef
bogdanm 86:04dd9b1680ae 150 {
bogdanm 86:04dd9b1680ae 151 SPI_TypeDef *Instance; /* SPI registers base address */
bogdanm 86:04dd9b1680ae 152
bogdanm 86:04dd9b1680ae 153 SPI_InitTypeDef Init; /* SPI communication parameters */
bogdanm 86:04dd9b1680ae 154
bogdanm 86:04dd9b1680ae 155 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
bogdanm 86:04dd9b1680ae 156
bogdanm 86:04dd9b1680ae 157 uint16_t TxXferSize; /* SPI Tx Transfer size */
bogdanm 86:04dd9b1680ae 158
bogdanm 86:04dd9b1680ae 159 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
bogdanm 86:04dd9b1680ae 160
bogdanm 86:04dd9b1680ae 161 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
bogdanm 86:04dd9b1680ae 162
bogdanm 86:04dd9b1680ae 163 uint16_t RxXferSize; /* SPI Rx Transfer size */
bogdanm 86:04dd9b1680ae 164
bogdanm 86:04dd9b1680ae 165 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
bogdanm 86:04dd9b1680ae 166
bogdanm 86:04dd9b1680ae 167 uint32_t CRCSize; /* SPI CRC size used for the transfer */
bogdanm 86:04dd9b1680ae 168
bogdanm 86:04dd9b1680ae 169 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */
bogdanm 86:04dd9b1680ae 170
bogdanm 86:04dd9b1680ae 171 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */
bogdanm 86:04dd9b1680ae 172
bogdanm 86:04dd9b1680ae 173 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
bogdanm 86:04dd9b1680ae 174
bogdanm 86:04dd9b1680ae 175 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
bogdanm 86:04dd9b1680ae 176
bogdanm 86:04dd9b1680ae 177 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 86:04dd9b1680ae 178
bogdanm 86:04dd9b1680ae 179 HAL_SPI_StateTypeDef State; /* SPI communication state */
bogdanm 86:04dd9b1680ae 180
bogdanm 86:04dd9b1680ae 181 HAL_SPI_ErrorTypeDef ErrorCode; /* SPI Error code */
bogdanm 86:04dd9b1680ae 182
bogdanm 86:04dd9b1680ae 183 }SPI_HandleTypeDef;
bogdanm 86:04dd9b1680ae 184
bogdanm 92:4fc01daae5a5 185 /**
bogdanm 92:4fc01daae5a5 186 * @}
bogdanm 92:4fc01daae5a5 187 */
bogdanm 92:4fc01daae5a5 188
bogdanm 86:04dd9b1680ae 189 /* Exported constants --------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 190
bogdanm 92:4fc01daae5a5 191 /** @defgroup SPI_Exported_Constants SPI Exported Constants
bogdanm 86:04dd9b1680ae 192 * @{
bogdanm 86:04dd9b1680ae 193 */
bogdanm 86:04dd9b1680ae 194
bogdanm 92:4fc01daae5a5 195 /** @defgroup SPI_mode SPI mode
bogdanm 86:04dd9b1680ae 196 * @{
bogdanm 86:04dd9b1680ae 197 */
bogdanm 86:04dd9b1680ae 198
bogdanm 86:04dd9b1680ae 199 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 200 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
bogdanm 86:04dd9b1680ae 201 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
bogdanm 86:04dd9b1680ae 202 ((MODE) == SPI_MODE_MASTER))
bogdanm 86:04dd9b1680ae 203 /**
bogdanm 86:04dd9b1680ae 204 * @}
bogdanm 86:04dd9b1680ae 205 */
bogdanm 86:04dd9b1680ae 206
bogdanm 92:4fc01daae5a5 207 /** @defgroup SPI_Direction SPI Direction
bogdanm 86:04dd9b1680ae 208 * @{
bogdanm 86:04dd9b1680ae 209 */
bogdanm 86:04dd9b1680ae 210 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 211 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
bogdanm 86:04dd9b1680ae 212 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
bogdanm 86:04dd9b1680ae 213
bogdanm 86:04dd9b1680ae 214 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
bogdanm 86:04dd9b1680ae 215 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
bogdanm 86:04dd9b1680ae 216 ((MODE) == SPI_DIRECTION_1LINE))
bogdanm 86:04dd9b1680ae 217
bogdanm 86:04dd9b1680ae 218 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
bogdanm 86:04dd9b1680ae 219
bogdanm 86:04dd9b1680ae 220 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
bogdanm 86:04dd9b1680ae 221 ((MODE) == SPI_DIRECTION_1LINE))
bogdanm 86:04dd9b1680ae 222 /**
bogdanm 86:04dd9b1680ae 223 * @}
bogdanm 86:04dd9b1680ae 224 */
bogdanm 86:04dd9b1680ae 225
bogdanm 92:4fc01daae5a5 226 /** @defgroup SPI_data_size SPI data size
bogdanm 86:04dd9b1680ae 227 * @{
bogdanm 86:04dd9b1680ae 228 */
bogdanm 86:04dd9b1680ae 229
bogdanm 86:04dd9b1680ae 230 #define SPI_DATASIZE_4BIT ((uint16_t)0x0300)
bogdanm 86:04dd9b1680ae 231 #define SPI_DATASIZE_5BIT ((uint16_t)0x0400)
bogdanm 86:04dd9b1680ae 232 #define SPI_DATASIZE_6BIT ((uint16_t)0x0500)
bogdanm 86:04dd9b1680ae 233 #define SPI_DATASIZE_7BIT ((uint16_t)0x0600)
bogdanm 86:04dd9b1680ae 234 #define SPI_DATASIZE_8BIT ((uint16_t)0x0700)
bogdanm 86:04dd9b1680ae 235 #define SPI_DATASIZE_9BIT ((uint16_t)0x0800)
bogdanm 86:04dd9b1680ae 236 #define SPI_DATASIZE_10BIT ((uint16_t)0x0900)
bogdanm 86:04dd9b1680ae 237 #define SPI_DATASIZE_11BIT ((uint16_t)0x0A00)
bogdanm 86:04dd9b1680ae 238 #define SPI_DATASIZE_12BIT ((uint16_t)0x0B00)
bogdanm 86:04dd9b1680ae 239 #define SPI_DATASIZE_13BIT ((uint16_t)0x0C00)
bogdanm 86:04dd9b1680ae 240 #define SPI_DATASIZE_14BIT ((uint16_t)0x0D00)
bogdanm 86:04dd9b1680ae 241 #define SPI_DATASIZE_15BIT ((uint16_t)0x0E00)
bogdanm 86:04dd9b1680ae 242 #define SPI_DATASIZE_16BIT ((uint16_t)0x0F00)
bogdanm 86:04dd9b1680ae 243 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
bogdanm 86:04dd9b1680ae 244 ((DATASIZE) == SPI_DATASIZE_15BIT) || \
bogdanm 86:04dd9b1680ae 245 ((DATASIZE) == SPI_DATASIZE_14BIT) || \
bogdanm 86:04dd9b1680ae 246 ((DATASIZE) == SPI_DATASIZE_13BIT) || \
bogdanm 86:04dd9b1680ae 247 ((DATASIZE) == SPI_DATASIZE_12BIT) || \
bogdanm 86:04dd9b1680ae 248 ((DATASIZE) == SPI_DATASIZE_11BIT) || \
bogdanm 86:04dd9b1680ae 249 ((DATASIZE) == SPI_DATASIZE_10BIT) || \
bogdanm 86:04dd9b1680ae 250 ((DATASIZE) == SPI_DATASIZE_9BIT) || \
bogdanm 86:04dd9b1680ae 251 ((DATASIZE) == SPI_DATASIZE_8BIT) || \
bogdanm 86:04dd9b1680ae 252 ((DATASIZE) == SPI_DATASIZE_7BIT) || \
bogdanm 86:04dd9b1680ae 253 ((DATASIZE) == SPI_DATASIZE_6BIT) || \
bogdanm 86:04dd9b1680ae 254 ((DATASIZE) == SPI_DATASIZE_5BIT) || \
bogdanm 86:04dd9b1680ae 255 ((DATASIZE) == SPI_DATASIZE_4BIT))
bogdanm 86:04dd9b1680ae 256
bogdanm 86:04dd9b1680ae 257 /**
bogdanm 86:04dd9b1680ae 258 * @}
bogdanm 86:04dd9b1680ae 259 */
bogdanm 86:04dd9b1680ae 260
bogdanm 92:4fc01daae5a5 261 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
bogdanm 86:04dd9b1680ae 262 * @{
bogdanm 86:04dd9b1680ae 263 */
bogdanm 86:04dd9b1680ae 264
bogdanm 86:04dd9b1680ae 265 #define SPI_POLARITY_LOW ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 266 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
bogdanm 86:04dd9b1680ae 267 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
bogdanm 86:04dd9b1680ae 268 ((CPOL) == SPI_POLARITY_HIGH))
bogdanm 86:04dd9b1680ae 269 /**
bogdanm 86:04dd9b1680ae 270 * @}
bogdanm 86:04dd9b1680ae 271 */
bogdanm 86:04dd9b1680ae 272
bogdanm 92:4fc01daae5a5 273 /** @defgroup SPI_Clock_Phase SPI Clock Phase
bogdanm 86:04dd9b1680ae 274 * @{
bogdanm 86:04dd9b1680ae 275 */
bogdanm 86:04dd9b1680ae 276
bogdanm 86:04dd9b1680ae 277 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 278 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
bogdanm 86:04dd9b1680ae 279 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
bogdanm 86:04dd9b1680ae 280 ((CPHA) == SPI_PHASE_2EDGE))
bogdanm 86:04dd9b1680ae 281 /**
bogdanm 86:04dd9b1680ae 282 * @}
bogdanm 86:04dd9b1680ae 283 */
bogdanm 86:04dd9b1680ae 284
bogdanm 92:4fc01daae5a5 285 /** @defgroup SPI_Slave_Select_management SPI Slave Select management
bogdanm 86:04dd9b1680ae 286 * @{
bogdanm 86:04dd9b1680ae 287 */
bogdanm 86:04dd9b1680ae 288
bogdanm 86:04dd9b1680ae 289 #define SPI_NSS_SOFT SPI_CR1_SSM
bogdanm 86:04dd9b1680ae 290 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 291 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
bogdanm 86:04dd9b1680ae 292 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
bogdanm 86:04dd9b1680ae 293 ((NSS) == SPI_NSS_HARD_INPUT) || \
bogdanm 86:04dd9b1680ae 294 ((NSS) == SPI_NSS_HARD_OUTPUT))
bogdanm 86:04dd9b1680ae 295
bogdanm 86:04dd9b1680ae 296 /**
bogdanm 86:04dd9b1680ae 297 * @}
bogdanm 86:04dd9b1680ae 298 */
bogdanm 86:04dd9b1680ae 299
bogdanm 86:04dd9b1680ae 300
bogdanm 92:4fc01daae5a5 301 /** @defgroup SPI_NSS SPI NSS pulse management
bogdanm 86:04dd9b1680ae 302 * @{
bogdanm 86:04dd9b1680ae 303 */
bogdanm 86:04dd9b1680ae 304 #define SPI_NSS_PULSE_ENABLED SPI_CR2_NSSP
bogdanm 86:04dd9b1680ae 305 #define SPI_NSS_PULSE_DISABLED ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 306
bogdanm 86:04dd9b1680ae 307 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLED) || \
bogdanm 86:04dd9b1680ae 308 ((NSSP) == SPI_NSS_PULSE_DISABLED))
bogdanm 86:04dd9b1680ae 309
bogdanm 86:04dd9b1680ae 310 /**
bogdanm 86:04dd9b1680ae 311 * @}
bogdanm 86:04dd9b1680ae 312 */
bogdanm 86:04dd9b1680ae 313
bogdanm 86:04dd9b1680ae 314
bogdanm 92:4fc01daae5a5 315 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
bogdanm 86:04dd9b1680ae 316 * @{
bogdanm 86:04dd9b1680ae 317 */
bogdanm 86:04dd9b1680ae 318
bogdanm 86:04dd9b1680ae 319 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 320 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
bogdanm 86:04dd9b1680ae 321 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
bogdanm 86:04dd9b1680ae 322 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
bogdanm 86:04dd9b1680ae 323 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
bogdanm 86:04dd9b1680ae 324 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
bogdanm 86:04dd9b1680ae 325 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
bogdanm 86:04dd9b1680ae 326 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
bogdanm 86:04dd9b1680ae 327 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
bogdanm 86:04dd9b1680ae 328 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
bogdanm 86:04dd9b1680ae 329 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
bogdanm 86:04dd9b1680ae 330 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
bogdanm 86:04dd9b1680ae 331 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
bogdanm 86:04dd9b1680ae 332 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
bogdanm 86:04dd9b1680ae 333 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
bogdanm 86:04dd9b1680ae 334 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
bogdanm 86:04dd9b1680ae 335 /**
bogdanm 86:04dd9b1680ae 336 * @}
bogdanm 86:04dd9b1680ae 337 */
bogdanm 86:04dd9b1680ae 338
bogdanm 92:4fc01daae5a5 339 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
bogdanm 86:04dd9b1680ae 340 * @{
bogdanm 86:04dd9b1680ae 341 */
bogdanm 86:04dd9b1680ae 342
bogdanm 86:04dd9b1680ae 343 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 344 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
bogdanm 86:04dd9b1680ae 345 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
bogdanm 86:04dd9b1680ae 346 ((BIT) == SPI_FIRSTBIT_LSB))
bogdanm 86:04dd9b1680ae 347 /**
bogdanm 86:04dd9b1680ae 348 * @}
bogdanm 86:04dd9b1680ae 349 */
bogdanm 86:04dd9b1680ae 350
bogdanm 92:4fc01daae5a5 351 /** @defgroup SPI_TI_mode SPI TI mode
bogdanm 86:04dd9b1680ae 352 * @{
bogdanm 86:04dd9b1680ae 353 */
bogdanm 86:04dd9b1680ae 354
bogdanm 86:04dd9b1680ae 355 #define SPI_TIMODE_DISABLED ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 356 #define SPI_TIMODE_ENABLED SPI_CR2_FRF
bogdanm 86:04dd9b1680ae 357 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLED) || \
bogdanm 86:04dd9b1680ae 358 ((MODE) == SPI_TIMODE_ENABLED))
bogdanm 86:04dd9b1680ae 359 /**
bogdanm 86:04dd9b1680ae 360 * @}
bogdanm 86:04dd9b1680ae 361 */
bogdanm 86:04dd9b1680ae 362
bogdanm 92:4fc01daae5a5 363 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
bogdanm 86:04dd9b1680ae 364 * @{
bogdanm 86:04dd9b1680ae 365 */
bogdanm 86:04dd9b1680ae 366
bogdanm 86:04dd9b1680ae 367 #define SPI_CRCCALCULATION_DISABLED ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 368 #define SPI_CRCCALCULATION_ENABLED SPI_CR1_CRCEN
bogdanm 86:04dd9b1680ae 369 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLED) || \
bogdanm 86:04dd9b1680ae 370 ((CALCULATION) == SPI_CRCCALCULATION_ENABLED))
bogdanm 86:04dd9b1680ae 371 /**
bogdanm 86:04dd9b1680ae 372 * @}
bogdanm 86:04dd9b1680ae 373 */
bogdanm 86:04dd9b1680ae 374
bogdanm 92:4fc01daae5a5 375 /** @defgroup SPI_CRC_length SPI CRC length
bogdanm 86:04dd9b1680ae 376 * @{
bogdanm 86:04dd9b1680ae 377 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 378 * SPI_CRC_LENGTH_DATASIZE: aligned with the data size
bogdanm 86:04dd9b1680ae 379 * SPI_CRC_LENGTH_8BIT : CRC 8bit
bogdanm 86:04dd9b1680ae 380 * SPI_CRC_LENGTH_16BIT : CRC 16bit
bogdanm 86:04dd9b1680ae 381 */
bogdanm 86:04dd9b1680ae 382 #define SPI_CRC_LENGTH_DATASIZE 0
bogdanm 86:04dd9b1680ae 383 #define SPI_CRC_LENGTH_8BIT 1
bogdanm 86:04dd9b1680ae 384 #define SPI_CRC_LENGTH_16BIT 2
bogdanm 86:04dd9b1680ae 385 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
bogdanm 86:04dd9b1680ae 386 ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
bogdanm 86:04dd9b1680ae 387 ((LENGTH) == SPI_CRC_LENGTH_16BIT))
bogdanm 86:04dd9b1680ae 388 /**
bogdanm 86:04dd9b1680ae 389 * @}
bogdanm 86:04dd9b1680ae 390 */
bogdanm 86:04dd9b1680ae 391
bogdanm 92:4fc01daae5a5 392 /** @defgroup SPI_FIFO_reception_threshold SPI FIFO reception threshold
bogdanm 86:04dd9b1680ae 393 * @{
bogdanm 86:04dd9b1680ae 394 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 395 * SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO
bogdanm 86:04dd9b1680ae 396 * level is greater or equal to 1/2(16-bits).
bogdanm 86:04dd9b1680ae 397 * SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO
bogdanm 86:04dd9b1680ae 398 * level is greater or equal to 1/4(8 bits).
bogdanm 86:04dd9b1680ae 399 */
bogdanm 86:04dd9b1680ae 400 #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
bogdanm 86:04dd9b1680ae 401 #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
bogdanm 86:04dd9b1680ae 402 #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x0)
bogdanm 86:04dd9b1680ae 403
bogdanm 86:04dd9b1680ae 404 /**
bogdanm 86:04dd9b1680ae 405 * @}
bogdanm 86:04dd9b1680ae 406 */
bogdanm 86:04dd9b1680ae 407
bogdanm 92:4fc01daae5a5 408 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
bogdanm 86:04dd9b1680ae 409 * @brief SPI Interrupt definition
bogdanm 86:04dd9b1680ae 410 * Elements values convention: 0xXXXXXXXX
bogdanm 86:04dd9b1680ae 411 * - XXXXXXXX : Interrupt control mask
bogdanm 86:04dd9b1680ae 412 * @{
bogdanm 86:04dd9b1680ae 413 */
bogdanm 86:04dd9b1680ae 414 #define SPI_IT_TXE SPI_CR2_TXEIE
bogdanm 86:04dd9b1680ae 415 #define SPI_IT_RXNE SPI_CR2_RXNEIE
bogdanm 86:04dd9b1680ae 416 #define SPI_IT_ERR SPI_CR2_ERRIE
bogdanm 86:04dd9b1680ae 417 #define IS_SPI_IT(IT) (((IT) == SPI_IT_TXE) || \
bogdanm 86:04dd9b1680ae 418 ((IT) == SPI_IT_RXNE) || \
bogdanm 86:04dd9b1680ae 419 ((IT) == SPI_IT_ERR))
bogdanm 86:04dd9b1680ae 420 /**
bogdanm 86:04dd9b1680ae 421 * @}
bogdanm 86:04dd9b1680ae 422 */
bogdanm 86:04dd9b1680ae 423
bogdanm 86:04dd9b1680ae 424
bogdanm 92:4fc01daae5a5 425 /** @defgroup SPI_Flag_definition SPI Flag definition
bogdanm 86:04dd9b1680ae 426 * @brief Flag definition
bogdanm 86:04dd9b1680ae 427 * Elements values convention: 0xXXXXYYYY
bogdanm 86:04dd9b1680ae 428 * - XXXX : Flag register Index
bogdanm 86:04dd9b1680ae 429 * - YYYY : Flag mask
bogdanm 92:4fc01daae5a5 430 * @{
bogdanm 86:04dd9b1680ae 431 */
bogdanm 86:04dd9b1680ae 432 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
bogdanm 86:04dd9b1680ae 433 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
bogdanm 86:04dd9b1680ae 434 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
bogdanm 86:04dd9b1680ae 435 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
bogdanm 86:04dd9b1680ae 436 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
bogdanm 86:04dd9b1680ae 437 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
bogdanm 86:04dd9b1680ae 438 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
bogdanm 86:04dd9b1680ae 439 #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
bogdanm 86:04dd9b1680ae 440 #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
bogdanm 86:04dd9b1680ae 441 #define IS_SPI_FLAG(FLAG) (((FLAG) == SPI_FLAG_RXNE) || \
bogdanm 86:04dd9b1680ae 442 ((FLAG) == SPI_FLAG_TXE) || \
bogdanm 86:04dd9b1680ae 443 ((FLAG) == SPI_FLAG_BSY) || \
bogdanm 86:04dd9b1680ae 444 ((FLAG) == SPI_FLAG_CRCERR)|| \
bogdanm 86:04dd9b1680ae 445 ((FLAG) == SPI_FLAG_MODF) || \
bogdanm 86:04dd9b1680ae 446 ((FLAG) == SPI_FLAG_OVR) || \
bogdanm 86:04dd9b1680ae 447 ((FLAG) == SPI_FLAG_FTLVL) || \
bogdanm 86:04dd9b1680ae 448 ((FLAG) == SPI_FLAG_FRLVL) || \
bogdanm 86:04dd9b1680ae 449 ((FLAG) == SPI_IT_FRE))
bogdanm 92:4fc01daae5a5 450 /**
bogdanm 92:4fc01daae5a5 451 * @}
bogdanm 92:4fc01daae5a5 452 */
bogdanm 86:04dd9b1680ae 453
bogdanm 86:04dd9b1680ae 454
bogdanm 92:4fc01daae5a5 455 /** @defgroup SPI_transmission_fifo_status_level SPI transmission fifo status level
bogdanm 86:04dd9b1680ae 456 * @{
bogdanm 86:04dd9b1680ae 457 */
bogdanm 86:04dd9b1680ae 458
bogdanm 86:04dd9b1680ae 459 #define SPI_FTLVL_EMPTY ((uint16_t)0x0000)
bogdanm 86:04dd9b1680ae 460 #define SPI_FTLVL_QUARTER_FULL ((uint16_t)0x0800)
bogdanm 86:04dd9b1680ae 461 #define SPI_FTLVL_HALF_FULL ((uint16_t)0x1000)
bogdanm 86:04dd9b1680ae 462 #define SPI_FTLVL_FULL ((uint16_t)0x1800)
bogdanm 86:04dd9b1680ae 463
bogdanm 86:04dd9b1680ae 464
bogdanm 86:04dd9b1680ae 465 /**
bogdanm 86:04dd9b1680ae 466 * @}
bogdanm 86:04dd9b1680ae 467 */
bogdanm 86:04dd9b1680ae 468
bogdanm 92:4fc01daae5a5 469 /** @defgroup SPI_reception_fifo_status_level SPI reception fifo status level
bogdanm 86:04dd9b1680ae 470 * @{
bogdanm 86:04dd9b1680ae 471 */
bogdanm 86:04dd9b1680ae 472 #define SPI_FRLVL_EMPTY ((uint16_t)0x0000)
bogdanm 86:04dd9b1680ae 473 #define SPI_FRLVL_QUARTER_FULL ((uint16_t)0x0200)
bogdanm 86:04dd9b1680ae 474 #define SPI_FRLVL_HALF_FULL ((uint16_t)0x0400)
bogdanm 86:04dd9b1680ae 475 #define SPI_FRLVL_FULL ((uint16_t)0x0600)
bogdanm 86:04dd9b1680ae 476
bogdanm 86:04dd9b1680ae 477 /**
bogdanm 86:04dd9b1680ae 478 * @}
bogdanm 86:04dd9b1680ae 479 */
bogdanm 86:04dd9b1680ae 480
bogdanm 86:04dd9b1680ae 481 /**
bogdanm 86:04dd9b1680ae 482 * @}
bogdanm 86:04dd9b1680ae 483 */
bogdanm 86:04dd9b1680ae 484
bogdanm 86:04dd9b1680ae 485
bogdanm 86:04dd9b1680ae 486 /* Exported macros ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 487 /** @defgroup SPI_Exported_Macros SPI Exported Macros
bogdanm 92:4fc01daae5a5 488 * @{
bogdanm 92:4fc01daae5a5 489 */
bogdanm 86:04dd9b1680ae 490
bogdanm 86:04dd9b1680ae 491 /** @brief Reset SPI handle state
bogdanm 86:04dd9b1680ae 492 * @param __HANDLE__: SPI handle.
bogdanm 86:04dd9b1680ae 493 * @retval None
bogdanm 86:04dd9b1680ae 494 */
bogdanm 86:04dd9b1680ae 495 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
bogdanm 86:04dd9b1680ae 496
bogdanm 86:04dd9b1680ae 497 /** @brief Enables or disables the specified SPI interrupts.
bogdanm 86:04dd9b1680ae 498 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 499 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 500 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 86:04dd9b1680ae 501 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 502 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 86:04dd9b1680ae 503 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 86:04dd9b1680ae 504 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 86:04dd9b1680ae 505 * @retval None
bogdanm 86:04dd9b1680ae 506 */
bogdanm 86:04dd9b1680ae 507
bogdanm 86:04dd9b1680ae 508 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 509 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
bogdanm 86:04dd9b1680ae 510
bogdanm 86:04dd9b1680ae 511 /** @brief Checks if the specified SPI interrupt source is enabled or disabled.
bogdanm 86:04dd9b1680ae 512 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 513 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 514 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
bogdanm 86:04dd9b1680ae 515 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 516 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 86:04dd9b1680ae 517 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 86:04dd9b1680ae 518 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 86:04dd9b1680ae 519 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 86:04dd9b1680ae 520 */
bogdanm 86:04dd9b1680ae 521 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 86:04dd9b1680ae 522
bogdanm 86:04dd9b1680ae 523 /** @brief Checks whether the specified SPI flag is set or not.
bogdanm 86:04dd9b1680ae 524 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 525 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 526 * @param __FLAG__: specifies the flag to check.
bogdanm 86:04dd9b1680ae 527 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 528 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
bogdanm 86:04dd9b1680ae 529 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
bogdanm 86:04dd9b1680ae 530 * @arg SPI_FLAG_CRCERR: CRC error flag
bogdanm 86:04dd9b1680ae 531 * @arg SPI_FLAG_MODF: Mode fault flag
bogdanm 86:04dd9b1680ae 532 * @arg SPI_FLAG_OVR: Overrun flag
bogdanm 86:04dd9b1680ae 533 * @arg SPI_FLAG_BSY: Busy flag
bogdanm 86:04dd9b1680ae 534 * @arg SPI_FLAG_FRE: Frame format error flag
bogdanm 86:04dd9b1680ae 535 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 86:04dd9b1680ae 536 */
bogdanm 86:04dd9b1680ae 537 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 86:04dd9b1680ae 538
bogdanm 86:04dd9b1680ae 539 /** @brief Clears the SPI CRCERR pending flag.
bogdanm 86:04dd9b1680ae 540 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 541 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 542 * @retval None
bogdanm 86:04dd9b1680ae 543 */
bogdanm 86:04dd9b1680ae 544 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
bogdanm 86:04dd9b1680ae 545
bogdanm 86:04dd9b1680ae 546 /** @brief Clears the SPI MODF pending flag.
bogdanm 86:04dd9b1680ae 547 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 548 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 549 *
bogdanm 86:04dd9b1680ae 550 * @retval None
bogdanm 86:04dd9b1680ae 551 */
bogdanm 86:04dd9b1680ae 552 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\
bogdanm 86:04dd9b1680ae 553 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE);}while(0)
bogdanm 86:04dd9b1680ae 554
bogdanm 86:04dd9b1680ae 555 /** @brief Clears the SPI OVR pending flag.
bogdanm 86:04dd9b1680ae 556 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 557 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 558 *
bogdanm 86:04dd9b1680ae 559 * @retval None
bogdanm 86:04dd9b1680ae 560 */
bogdanm 86:04dd9b1680ae 561 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
bogdanm 86:04dd9b1680ae 562 (__HANDLE__)->Instance->SR;}while(0)
bogdanm 86:04dd9b1680ae 563
bogdanm 86:04dd9b1680ae 564 /** @brief Clears the SPI FRE pending flag.
bogdanm 86:04dd9b1680ae 565 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 566 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 567 *
bogdanm 86:04dd9b1680ae 568 * @retval None
bogdanm 86:04dd9b1680ae 569 */
bogdanm 86:04dd9b1680ae 570 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR)
bogdanm 86:04dd9b1680ae 571
bogdanm 86:04dd9b1680ae 572 /** @brief Enables the SPI.
bogdanm 86:04dd9b1680ae 573 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 574 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 575 * @retval None
bogdanm 86:04dd9b1680ae 576 */
bogdanm 86:04dd9b1680ae 577 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
bogdanm 86:04dd9b1680ae 578
bogdanm 86:04dd9b1680ae 579 /** @brief Disables the SPI.
bogdanm 86:04dd9b1680ae 580 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 581 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 582 * @retval None
bogdanm 86:04dd9b1680ae 583 */
bogdanm 86:04dd9b1680ae 584 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE)
bogdanm 86:04dd9b1680ae 585
bogdanm 86:04dd9b1680ae 586 /** @brief Sets the SPI transmit-only mode.
bogdanm 86:04dd9b1680ae 587 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 588 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 589 * @retval None
bogdanm 86:04dd9b1680ae 590 */
bogdanm 86:04dd9b1680ae 591 #define __HAL_SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
bogdanm 86:04dd9b1680ae 592
bogdanm 86:04dd9b1680ae 593 /** @brief Sets the SPI receive-only mode.
bogdanm 86:04dd9b1680ae 594 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 595 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 596 * @retval None
bogdanm 86:04dd9b1680ae 597 */
bogdanm 86:04dd9b1680ae 598 #define __HAL_SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE)
bogdanm 86:04dd9b1680ae 599
bogdanm 86:04dd9b1680ae 600 /** @brief Resets the CRC calculation of the SPI.
bogdanm 86:04dd9b1680ae 601 * @param __HANDLE__: specifies the SPI Handle.
bogdanm 86:04dd9b1680ae 602 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 603 * @retval None
bogdanm 86:04dd9b1680ae 604 */
bogdanm 86:04dd9b1680ae 605 #define __HAL_SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\
bogdanm 86:04dd9b1680ae 606 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
bogdanm 86:04dd9b1680ae 607
bogdanm 86:04dd9b1680ae 608
bogdanm 86:04dd9b1680ae 609 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
bogdanm 92:4fc01daae5a5 610 /**
bogdanm 92:4fc01daae5a5 611 * @}
bogdanm 92:4fc01daae5a5 612 */
bogdanm 86:04dd9b1680ae 613
bogdanm 86:04dd9b1680ae 614 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 615 /** @addtogroup SPI_Exported_Functions SPI Exported Functions
bogdanm 92:4fc01daae5a5 616 * @{
bogdanm 92:4fc01daae5a5 617 */
bogdanm 92:4fc01daae5a5 618
bogdanm 92:4fc01daae5a5 619 /** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 92:4fc01daae5a5 620 * @{
bogdanm 92:4fc01daae5a5 621 */
bogdanm 86:04dd9b1680ae 622
bogdanm 86:04dd9b1680ae 623 /* Initialization and de-initialization functions ****************************/
bogdanm 86:04dd9b1680ae 624 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 625 HAL_StatusTypeDef HAL_SPI_InitExtended(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 626 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 627 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 628 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 629 /**
bogdanm 92:4fc01daae5a5 630 * @}
bogdanm 92:4fc01daae5a5 631 */
bogdanm 92:4fc01daae5a5 632
bogdanm 92:4fc01daae5a5 633 /** @addtogroup SPI_Exported_Functions_Group2 Input and Output operation functions
bogdanm 92:4fc01daae5a5 634 * @{
bogdanm 92:4fc01daae5a5 635 */
bogdanm 86:04dd9b1680ae 636
bogdanm 86:04dd9b1680ae 637 /* IO operation functions *****************************************************/
bogdanm 86:04dd9b1680ae 638 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 86:04dd9b1680ae 639 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 86:04dd9b1680ae 640 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
bogdanm 86:04dd9b1680ae 641 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 86:04dd9b1680ae 642 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 86:04dd9b1680ae 643 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 86:04dd9b1680ae 644 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 86:04dd9b1680ae 645 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 86:04dd9b1680ae 646 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 86:04dd9b1680ae 647 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 648 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 649 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 650 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 651 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 652 /**
bogdanm 92:4fc01daae5a5 653 * @}
bogdanm 92:4fc01daae5a5 654 */
bogdanm 92:4fc01daae5a5 655
bogdanm 92:4fc01daae5a5 656 /** @addtogroup SPI_Exported_Functions_Group3 Peripheral Control functions
bogdanm 92:4fc01daae5a5 657 * @{
bogdanm 92:4fc01daae5a5 658 */
bogdanm 86:04dd9b1680ae 659
bogdanm 86:04dd9b1680ae 660 /* Peripheral State and Error functions ***************************************/
bogdanm 86:04dd9b1680ae 661 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 662 /**
bogdanm 92:4fc01daae5a5 663 * @}
bogdanm 92:4fc01daae5a5 664 */
bogdanm 92:4fc01daae5a5 665
bogdanm 92:4fc01daae5a5 666 /**
bogdanm 92:4fc01daae5a5 667 * @}
bogdanm 92:4fc01daae5a5 668 */
bogdanm 86:04dd9b1680ae 669
bogdanm 86:04dd9b1680ae 670 /**
bogdanm 86:04dd9b1680ae 671 * @}
bogdanm 86:04dd9b1680ae 672 */
bogdanm 86:04dd9b1680ae 673
bogdanm 86:04dd9b1680ae 674 /**
bogdanm 86:04dd9b1680ae 675 * @}
bogdanm 86:04dd9b1680ae 676 */
bogdanm 86:04dd9b1680ae 677
bogdanm 86:04dd9b1680ae 678 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 679 }
bogdanm 86:04dd9b1680ae 680 #endif
bogdanm 86:04dd9b1680ae 681
bogdanm 86:04dd9b1680ae 682 #endif /* __STM32F3xx_HAL_SPI_H */
bogdanm 86:04dd9b1680ae 683
bogdanm 86:04dd9b1680ae 684 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/