/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }
Fork of mbed by
TARGET_NUCLEO_F072RB/stm32f0xx_hal_i2c.h@92:4fc01daae5a5, 2014-11-27 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Nov 27 13:33:22 2014 +0000
- Revision:
- 92:4fc01daae5a5
- Parent:
- 85:024bf7f99721
Release 92 of the mbed libray
Main changes:
- nRF51822: fixed pin assignment issues
- ST targets moving to the STM32Cube driver
- LPC1439: fixed serial interrupt issue
- first Cortex-A platform supported in mbed (RZ_A1H)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 85:024bf7f99721 | 1 | /** |
bogdanm | 85:024bf7f99721 | 2 | ****************************************************************************** |
bogdanm | 85:024bf7f99721 | 3 | * @file stm32f0xx_hal_i2c.h |
bogdanm | 85:024bf7f99721 | 4 | * @author MCD Application Team |
bogdanm | 92:4fc01daae5a5 | 5 | * @version V1.1.0 |
bogdanm | 92:4fc01daae5a5 | 6 | * @date 03-Oct-2014 |
bogdanm | 85:024bf7f99721 | 7 | * @brief Header file of I2C HAL module. |
bogdanm | 85:024bf7f99721 | 8 | ****************************************************************************** |
bogdanm | 85:024bf7f99721 | 9 | * @attention |
bogdanm | 85:024bf7f99721 | 10 | * |
bogdanm | 85:024bf7f99721 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 85:024bf7f99721 | 12 | * |
bogdanm | 85:024bf7f99721 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 85:024bf7f99721 | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 85:024bf7f99721 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 85:024bf7f99721 | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 85:024bf7f99721 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 85:024bf7f99721 | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 85:024bf7f99721 | 19 | * and/or other materials provided with the distribution. |
bogdanm | 85:024bf7f99721 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 85:024bf7f99721 | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 85:024bf7f99721 | 22 | * without specific prior written permission. |
bogdanm | 85:024bf7f99721 | 23 | * |
bogdanm | 85:024bf7f99721 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 85:024bf7f99721 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 85:024bf7f99721 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 85:024bf7f99721 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 85:024bf7f99721 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 85:024bf7f99721 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 85:024bf7f99721 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 85:024bf7f99721 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 85:024bf7f99721 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 85:024bf7f99721 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 85:024bf7f99721 | 34 | * |
bogdanm | 85:024bf7f99721 | 35 | ****************************************************************************** |
bogdanm | 85:024bf7f99721 | 36 | */ |
bogdanm | 85:024bf7f99721 | 37 | |
bogdanm | 85:024bf7f99721 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 85:024bf7f99721 | 39 | #ifndef __STM32F0xx_HAL_I2C_H |
bogdanm | 85:024bf7f99721 | 40 | #define __STM32F0xx_HAL_I2C_H |
bogdanm | 85:024bf7f99721 | 41 | |
bogdanm | 85:024bf7f99721 | 42 | #ifdef __cplusplus |
bogdanm | 85:024bf7f99721 | 43 | extern "C" { |
bogdanm | 85:024bf7f99721 | 44 | #endif |
bogdanm | 85:024bf7f99721 | 45 | |
bogdanm | 85:024bf7f99721 | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 85:024bf7f99721 | 47 | #include "stm32f0xx_hal_def.h" |
bogdanm | 85:024bf7f99721 | 48 | |
bogdanm | 85:024bf7f99721 | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
bogdanm | 85:024bf7f99721 | 50 | * @{ |
bogdanm | 85:024bf7f99721 | 51 | */ |
bogdanm | 85:024bf7f99721 | 52 | |
bogdanm | 85:024bf7f99721 | 53 | /** @addtogroup I2C |
bogdanm | 85:024bf7f99721 | 54 | * @{ |
bogdanm | 85:024bf7f99721 | 55 | */ |
bogdanm | 85:024bf7f99721 | 56 | |
bogdanm | 85:024bf7f99721 | 57 | /* Exported types ------------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 58 | /** @defgroup I2C_Exported_Types I2C Exported Types |
bogdanm | 92:4fc01daae5a5 | 59 | * @{ |
bogdanm | 92:4fc01daae5a5 | 60 | */ |
bogdanm | 85:024bf7f99721 | 61 | |
bogdanm | 92:4fc01daae5a5 | 62 | /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition |
bogdanm | 92:4fc01daae5a5 | 63 | * @brief I2C Configuration Structure definition |
bogdanm | 92:4fc01daae5a5 | 64 | * @{ |
bogdanm | 85:024bf7f99721 | 65 | */ |
bogdanm | 85:024bf7f99721 | 66 | typedef struct |
bogdanm | 85:024bf7f99721 | 67 | { |
bogdanm | 85:024bf7f99721 | 68 | uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. |
bogdanm | 85:024bf7f99721 | 69 | This parameter calculated by referring to I2C initialization |
bogdanm | 85:024bf7f99721 | 70 | section in Reference manual */ |
bogdanm | 85:024bf7f99721 | 71 | |
bogdanm | 85:024bf7f99721 | 72 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
bogdanm | 85:024bf7f99721 | 73 | This parameter can be a 7-bit or 10-bit address. */ |
bogdanm | 85:024bf7f99721 | 74 | |
bogdanm | 85:024bf7f99721 | 75 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
bogdanm | 85:024bf7f99721 | 76 | This parameter can be a value of @ref I2C_addressing_mode */ |
bogdanm | 85:024bf7f99721 | 77 | |
bogdanm | 85:024bf7f99721 | 78 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
bogdanm | 85:024bf7f99721 | 79 | This parameter can be a value of @ref I2C_dual_addressing_mode */ |
bogdanm | 85:024bf7f99721 | 80 | |
bogdanm | 85:024bf7f99721 | 81 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
bogdanm | 85:024bf7f99721 | 82 | This parameter can be a 7-bit address. */ |
bogdanm | 85:024bf7f99721 | 83 | |
bogdanm | 85:024bf7f99721 | 84 | uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected |
bogdanm | 85:024bf7f99721 | 85 | This parameter can be a value of @ref I2C_own_address2_masks. */ |
bogdanm | 85:024bf7f99721 | 86 | |
bogdanm | 85:024bf7f99721 | 87 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
bogdanm | 85:024bf7f99721 | 88 | This parameter can be a value of @ref I2C_general_call_addressing_mode. */ |
bogdanm | 85:024bf7f99721 | 89 | |
bogdanm | 85:024bf7f99721 | 90 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
bogdanm | 85:024bf7f99721 | 91 | This parameter can be a value of @ref I2C_nostretch_mode */ |
bogdanm | 85:024bf7f99721 | 92 | |
bogdanm | 85:024bf7f99721 | 93 | }I2C_InitTypeDef; |
bogdanm | 85:024bf7f99721 | 94 | |
bogdanm | 92:4fc01daae5a5 | 95 | /** |
bogdanm | 92:4fc01daae5a5 | 96 | * @} |
bogdanm | 92:4fc01daae5a5 | 97 | */ |
bogdanm | 92:4fc01daae5a5 | 98 | |
bogdanm | 92:4fc01daae5a5 | 99 | /** @defgroup HAL_state_structure_definition HAL state structure definition |
bogdanm | 92:4fc01daae5a5 | 100 | * @brief HAL State structure definition |
bogdanm | 92:4fc01daae5a5 | 101 | * @{ |
bogdanm | 92:4fc01daae5a5 | 102 | */ |
bogdanm | 92:4fc01daae5a5 | 103 | |
bogdanm | 85:024bf7f99721 | 104 | typedef enum |
bogdanm | 85:024bf7f99721 | 105 | { |
bogdanm | 85:024bf7f99721 | 106 | HAL_I2C_STATE_RESET = 0x00, /*!< I2C not yet initialized or disabled */ |
bogdanm | 85:024bf7f99721 | 107 | HAL_I2C_STATE_READY = 0x01, /*!< I2C initialized and ready for use */ |
bogdanm | 85:024bf7f99721 | 108 | HAL_I2C_STATE_BUSY = 0x02, /*!< I2C internal process is ongoing */ |
bogdanm | 85:024bf7f99721 | 109 | HAL_I2C_STATE_MASTER_BUSY_TX = 0x12, /*!< Master Data Transmission process is ongoing */ |
bogdanm | 85:024bf7f99721 | 110 | HAL_I2C_STATE_MASTER_BUSY_RX = 0x22, /*!< Master Data Reception process is ongoing */ |
bogdanm | 85:024bf7f99721 | 111 | HAL_I2C_STATE_SLAVE_BUSY_TX = 0x32, /*!< Slave Data Transmission process is ongoing */ |
bogdanm | 85:024bf7f99721 | 112 | HAL_I2C_STATE_SLAVE_BUSY_RX = 0x42, /*!< Slave Data Reception process is ongoing */ |
bogdanm | 85:024bf7f99721 | 113 | HAL_I2C_STATE_MEM_BUSY_TX = 0x52, /*!< Memory Data Transmission process is ongoing */ |
bogdanm | 85:024bf7f99721 | 114 | HAL_I2C_STATE_MEM_BUSY_RX = 0x62, /*!< Memory Data Reception process is ongoing */ |
bogdanm | 85:024bf7f99721 | 115 | HAL_I2C_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
bogdanm | 85:024bf7f99721 | 116 | HAL_I2C_STATE_ERROR = 0x04 /*!< Reception process is ongoing */ |
bogdanm | 85:024bf7f99721 | 117 | |
bogdanm | 85:024bf7f99721 | 118 | }HAL_I2C_StateTypeDef; |
bogdanm | 85:024bf7f99721 | 119 | |
bogdanm | 92:4fc01daae5a5 | 120 | /** |
bogdanm | 92:4fc01daae5a5 | 121 | * @} |
bogdanm | 92:4fc01daae5a5 | 122 | */ |
bogdanm | 92:4fc01daae5a5 | 123 | |
bogdanm | 92:4fc01daae5a5 | 124 | /** @defgroup I2C_Error_Code_structure_definition I2C Error Code structure definition |
bogdanm | 92:4fc01daae5a5 | 125 | * @brief I2C Error Code structure definition |
bogdanm | 92:4fc01daae5a5 | 126 | * @{ |
bogdanm | 92:4fc01daae5a5 | 127 | */ |
bogdanm | 92:4fc01daae5a5 | 128 | |
bogdanm | 85:024bf7f99721 | 129 | typedef enum |
bogdanm | 85:024bf7f99721 | 130 | { |
bogdanm | 85:024bf7f99721 | 131 | HAL_I2C_ERROR_NONE = 0x00, /*!< No error */ |
bogdanm | 85:024bf7f99721 | 132 | HAL_I2C_ERROR_BERR = 0x01, /*!< BERR error */ |
bogdanm | 85:024bf7f99721 | 133 | HAL_I2C_ERROR_ARLO = 0x02, /*!< ARLO error */ |
bogdanm | 85:024bf7f99721 | 134 | HAL_I2C_ERROR_AF = 0x04, /*!< AF error */ |
bogdanm | 85:024bf7f99721 | 135 | HAL_I2C_ERROR_OVR = 0x08, /*!< OVR error */ |
bogdanm | 85:024bf7f99721 | 136 | HAL_I2C_ERROR_DMA = 0x10, /*!< DMA transfer error */ |
bogdanm | 85:024bf7f99721 | 137 | HAL_I2C_ERROR_TIMEOUT = 0x20, /*!< Timeout error */ |
bogdanm | 85:024bf7f99721 | 138 | HAL_I2C_ERROR_SIZE = 0x40 /*!< Size Management error */ |
bogdanm | 85:024bf7f99721 | 139 | }HAL_I2C_ErrorTypeDef; |
bogdanm | 85:024bf7f99721 | 140 | |
bogdanm | 92:4fc01daae5a5 | 141 | /** |
bogdanm | 92:4fc01daae5a5 | 142 | * @} |
bogdanm | 85:024bf7f99721 | 143 | */ |
bogdanm | 92:4fc01daae5a5 | 144 | |
bogdanm | 92:4fc01daae5a5 | 145 | /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition |
bogdanm | 92:4fc01daae5a5 | 146 | * @brief I2C handle Structure definition |
bogdanm | 92:4fc01daae5a5 | 147 | * @{ |
bogdanm | 92:4fc01daae5a5 | 148 | */ |
bogdanm | 92:4fc01daae5a5 | 149 | |
bogdanm | 85:024bf7f99721 | 150 | typedef struct |
bogdanm | 85:024bf7f99721 | 151 | { |
bogdanm | 85:024bf7f99721 | 152 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
bogdanm | 85:024bf7f99721 | 153 | |
bogdanm | 85:024bf7f99721 | 154 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
bogdanm | 85:024bf7f99721 | 155 | |
bogdanm | 85:024bf7f99721 | 156 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
bogdanm | 85:024bf7f99721 | 157 | |
bogdanm | 85:024bf7f99721 | 158 | uint16_t XferSize; /*!< I2C transfer size */ |
bogdanm | 85:024bf7f99721 | 159 | |
bogdanm | 85:024bf7f99721 | 160 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
bogdanm | 85:024bf7f99721 | 161 | |
bogdanm | 85:024bf7f99721 | 162 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
bogdanm | 85:024bf7f99721 | 163 | |
bogdanm | 85:024bf7f99721 | 164 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
bogdanm | 85:024bf7f99721 | 165 | |
bogdanm | 85:024bf7f99721 | 166 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
bogdanm | 85:024bf7f99721 | 167 | |
bogdanm | 85:024bf7f99721 | 168 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
bogdanm | 85:024bf7f99721 | 169 | |
bogdanm | 85:024bf7f99721 | 170 | __IO HAL_I2C_ErrorTypeDef ErrorCode; /* I2C Error code */ |
bogdanm | 85:024bf7f99721 | 171 | |
bogdanm | 85:024bf7f99721 | 172 | }I2C_HandleTypeDef; |
bogdanm | 92:4fc01daae5a5 | 173 | /** |
bogdanm | 92:4fc01daae5a5 | 174 | * @} |
bogdanm | 92:4fc01daae5a5 | 175 | */ |
bogdanm | 85:024bf7f99721 | 176 | |
bogdanm | 92:4fc01daae5a5 | 177 | /** |
bogdanm | 92:4fc01daae5a5 | 178 | * @} |
bogdanm | 92:4fc01daae5a5 | 179 | */ |
bogdanm | 85:024bf7f99721 | 180 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 85:024bf7f99721 | 181 | |
bogdanm | 92:4fc01daae5a5 | 182 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
bogdanm | 85:024bf7f99721 | 183 | * @{ |
bogdanm | 85:024bf7f99721 | 184 | */ |
bogdanm | 85:024bf7f99721 | 185 | |
bogdanm | 92:4fc01daae5a5 | 186 | /** @defgroup I2C_addressing_mode I2C addressing mode |
bogdanm | 85:024bf7f99721 | 187 | * @{ |
bogdanm | 85:024bf7f99721 | 188 | */ |
bogdanm | 85:024bf7f99721 | 189 | #define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001) |
bogdanm | 85:024bf7f99721 | 190 | #define I2C_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002) |
bogdanm | 85:024bf7f99721 | 191 | |
bogdanm | 85:024bf7f99721 | 192 | #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ |
bogdanm | 85:024bf7f99721 | 193 | ((MODE) == I2C_ADDRESSINGMODE_10BIT)) |
bogdanm | 85:024bf7f99721 | 194 | /** |
bogdanm | 85:024bf7f99721 | 195 | * @} |
bogdanm | 85:024bf7f99721 | 196 | */ |
bogdanm | 85:024bf7f99721 | 197 | |
bogdanm | 92:4fc01daae5a5 | 198 | /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode |
bogdanm | 85:024bf7f99721 | 199 | * @{ |
bogdanm | 85:024bf7f99721 | 200 | */ |
bogdanm | 85:024bf7f99721 | 201 | |
bogdanm | 85:024bf7f99721 | 202 | #define I2C_DUALADDRESS_DISABLED ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 203 | #define I2C_DUALADDRESS_ENABLED I2C_OAR2_OA2EN |
bogdanm | 85:024bf7f99721 | 204 | |
bogdanm | 85:024bf7f99721 | 205 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLED) || \ |
bogdanm | 85:024bf7f99721 | 206 | ((ADDRESS) == I2C_DUALADDRESS_ENABLED)) |
bogdanm | 85:024bf7f99721 | 207 | /** |
bogdanm | 85:024bf7f99721 | 208 | * @} |
bogdanm | 85:024bf7f99721 | 209 | */ |
bogdanm | 85:024bf7f99721 | 210 | |
bogdanm | 92:4fc01daae5a5 | 211 | /** @defgroup I2C_own_address2_masks I2C own address2 masks |
bogdanm | 85:024bf7f99721 | 212 | * @{ |
bogdanm | 85:024bf7f99721 | 213 | */ |
bogdanm | 85:024bf7f99721 | 214 | |
bogdanm | 85:024bf7f99721 | 215 | #define I2C_OA2_NOMASK ((uint8_t)0x00) |
bogdanm | 85:024bf7f99721 | 216 | #define I2C_OA2_MASK01 ((uint8_t)0x01) |
bogdanm | 85:024bf7f99721 | 217 | #define I2C_OA2_MASK02 ((uint8_t)0x02) |
bogdanm | 85:024bf7f99721 | 218 | #define I2C_OA2_MASK03 ((uint8_t)0x03) |
bogdanm | 85:024bf7f99721 | 219 | #define I2C_OA2_MASK04 ((uint8_t)0x04) |
bogdanm | 85:024bf7f99721 | 220 | #define I2C_OA2_MASK05 ((uint8_t)0x05) |
bogdanm | 85:024bf7f99721 | 221 | #define I2C_OA2_MASK06 ((uint8_t)0x06) |
bogdanm | 85:024bf7f99721 | 222 | #define I2C_OA2_MASK07 ((uint8_t)0x07) |
bogdanm | 85:024bf7f99721 | 223 | |
bogdanm | 85:024bf7f99721 | 224 | #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ |
bogdanm | 85:024bf7f99721 | 225 | ((MASK) == I2C_OA2_MASK01) || \ |
bogdanm | 85:024bf7f99721 | 226 | ((MASK) == I2C_OA2_MASK02) || \ |
bogdanm | 85:024bf7f99721 | 227 | ((MASK) == I2C_OA2_MASK03) || \ |
bogdanm | 85:024bf7f99721 | 228 | ((MASK) == I2C_OA2_MASK04) || \ |
bogdanm | 85:024bf7f99721 | 229 | ((MASK) == I2C_OA2_MASK05) || \ |
bogdanm | 85:024bf7f99721 | 230 | ((MASK) == I2C_OA2_MASK06) || \ |
bogdanm | 85:024bf7f99721 | 231 | ((MASK) == I2C_OA2_MASK07)) |
bogdanm | 85:024bf7f99721 | 232 | /** |
bogdanm | 85:024bf7f99721 | 233 | * @} |
bogdanm | 85:024bf7f99721 | 234 | */ |
bogdanm | 85:024bf7f99721 | 235 | |
bogdanm | 92:4fc01daae5a5 | 236 | /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode |
bogdanm | 85:024bf7f99721 | 237 | * @{ |
bogdanm | 85:024bf7f99721 | 238 | */ |
bogdanm | 85:024bf7f99721 | 239 | #define I2C_GENERALCALL_DISABLED ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 240 | #define I2C_GENERALCALL_ENABLED I2C_CR1_GCEN |
bogdanm | 85:024bf7f99721 | 241 | |
bogdanm | 85:024bf7f99721 | 242 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLED) || \ |
bogdanm | 85:024bf7f99721 | 243 | ((CALL) == I2C_GENERALCALL_ENABLED)) |
bogdanm | 85:024bf7f99721 | 244 | /** |
bogdanm | 85:024bf7f99721 | 245 | * @} |
bogdanm | 85:024bf7f99721 | 246 | */ |
bogdanm | 85:024bf7f99721 | 247 | |
bogdanm | 92:4fc01daae5a5 | 248 | /** @defgroup I2C_nostretch_mode I2C nostretch mode |
bogdanm | 85:024bf7f99721 | 249 | * @{ |
bogdanm | 85:024bf7f99721 | 250 | */ |
bogdanm | 85:024bf7f99721 | 251 | #define I2C_NOSTRETCH_DISABLED ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 252 | #define I2C_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH |
bogdanm | 85:024bf7f99721 | 253 | |
bogdanm | 85:024bf7f99721 | 254 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLED) || \ |
bogdanm | 85:024bf7f99721 | 255 | ((STRETCH) == I2C_NOSTRETCH_ENABLED)) |
bogdanm | 85:024bf7f99721 | 256 | /** |
bogdanm | 85:024bf7f99721 | 257 | * @} |
bogdanm | 85:024bf7f99721 | 258 | */ |
bogdanm | 85:024bf7f99721 | 259 | |
bogdanm | 92:4fc01daae5a5 | 260 | /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size |
bogdanm | 85:024bf7f99721 | 261 | * @{ |
bogdanm | 85:024bf7f99721 | 262 | */ |
bogdanm | 85:024bf7f99721 | 263 | #define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001) |
bogdanm | 85:024bf7f99721 | 264 | #define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000002) |
bogdanm | 85:024bf7f99721 | 265 | |
bogdanm | 85:024bf7f99721 | 266 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
bogdanm | 85:024bf7f99721 | 267 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
bogdanm | 85:024bf7f99721 | 268 | /** |
bogdanm | 85:024bf7f99721 | 269 | * @} |
bogdanm | 85:024bf7f99721 | 270 | */ |
bogdanm | 85:024bf7f99721 | 271 | |
bogdanm | 92:4fc01daae5a5 | 272 | /** @defgroup I2C_ReloadEndMode_definition I2C ReloadEndMode definition |
bogdanm | 85:024bf7f99721 | 273 | * @{ |
bogdanm | 85:024bf7f99721 | 274 | */ |
bogdanm | 85:024bf7f99721 | 275 | |
bogdanm | 85:024bf7f99721 | 276 | #define I2C_RELOAD_MODE I2C_CR2_RELOAD |
bogdanm | 85:024bf7f99721 | 277 | #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND |
bogdanm | 85:024bf7f99721 | 278 | #define I2C_SOFTEND_MODE ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 279 | |
bogdanm | 85:024bf7f99721 | 280 | #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ |
bogdanm | 85:024bf7f99721 | 281 | ((MODE) == I2C_AUTOEND_MODE) || \ |
bogdanm | 85:024bf7f99721 | 282 | ((MODE) == I2C_SOFTEND_MODE)) |
bogdanm | 85:024bf7f99721 | 283 | /** |
bogdanm | 85:024bf7f99721 | 284 | * @} |
bogdanm | 85:024bf7f99721 | 285 | */ |
bogdanm | 85:024bf7f99721 | 286 | |
bogdanm | 92:4fc01daae5a5 | 287 | /** @defgroup I2C_StartStopMode_definition I2C StartStopMode definition |
bogdanm | 85:024bf7f99721 | 288 | * @{ |
bogdanm | 85:024bf7f99721 | 289 | */ |
bogdanm | 85:024bf7f99721 | 290 | |
bogdanm | 85:024bf7f99721 | 291 | #define I2C_NO_STARTSTOP ((uint32_t)0x00000000) |
bogdanm | 85:024bf7f99721 | 292 | #define I2C_GENERATE_STOP I2C_CR2_STOP |
bogdanm | 85:024bf7f99721 | 293 | #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) |
bogdanm | 85:024bf7f99721 | 294 | #define I2C_GENERATE_START_WRITE I2C_CR2_START |
bogdanm | 85:024bf7f99721 | 295 | |
bogdanm | 85:024bf7f99721 | 296 | #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ |
bogdanm | 85:024bf7f99721 | 297 | ((REQUEST) == I2C_GENERATE_START_READ) || \ |
bogdanm | 85:024bf7f99721 | 298 | ((REQUEST) == I2C_GENERATE_START_WRITE) || \ |
bogdanm | 85:024bf7f99721 | 299 | ((REQUEST) == I2C_NO_STARTSTOP)) |
bogdanm | 85:024bf7f99721 | 300 | |
bogdanm | 85:024bf7f99721 | 301 | /** |
bogdanm | 85:024bf7f99721 | 302 | * @} |
bogdanm | 85:024bf7f99721 | 303 | */ |
bogdanm | 85:024bf7f99721 | 304 | |
bogdanm | 92:4fc01daae5a5 | 305 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
bogdanm | 85:024bf7f99721 | 306 | * @brief I2C Interrupt definition |
bogdanm | 85:024bf7f99721 | 307 | * Elements values convention: 0xXXXXXXXX |
bogdanm | 85:024bf7f99721 | 308 | * - XXXXXXXX : Interrupt control mask |
bogdanm | 85:024bf7f99721 | 309 | * @{ |
bogdanm | 85:024bf7f99721 | 310 | */ |
bogdanm | 85:024bf7f99721 | 311 | #define I2C_IT_ERRI I2C_CR1_ERRIE |
bogdanm | 85:024bf7f99721 | 312 | #define I2C_IT_TCI I2C_CR1_TCIE |
bogdanm | 85:024bf7f99721 | 313 | #define I2C_IT_STOPI I2C_CR1_STOPIE |
bogdanm | 85:024bf7f99721 | 314 | #define I2C_IT_NACKI I2C_CR1_NACKIE |
bogdanm | 85:024bf7f99721 | 315 | #define I2C_IT_ADDRI I2C_CR1_ADDRIE |
bogdanm | 85:024bf7f99721 | 316 | #define I2C_IT_RXI I2C_CR1_RXIE |
bogdanm | 85:024bf7f99721 | 317 | #define I2C_IT_TXI I2C_CR1_TXIE |
bogdanm | 85:024bf7f99721 | 318 | |
bogdanm | 85:024bf7f99721 | 319 | /** |
bogdanm | 85:024bf7f99721 | 320 | * @} |
bogdanm | 85:024bf7f99721 | 321 | */ |
bogdanm | 85:024bf7f99721 | 322 | |
bogdanm | 85:024bf7f99721 | 323 | |
bogdanm | 92:4fc01daae5a5 | 324 | /** @defgroup I2C_Flag_definition I2C Flag definition |
bogdanm | 85:024bf7f99721 | 325 | * @{ |
bogdanm | 85:024bf7f99721 | 326 | */ |
bogdanm | 85:024bf7f99721 | 327 | |
bogdanm | 85:024bf7f99721 | 328 | #define I2C_FLAG_TXE I2C_ISR_TXE |
bogdanm | 85:024bf7f99721 | 329 | #define I2C_FLAG_TXIS I2C_ISR_TXIS |
bogdanm | 85:024bf7f99721 | 330 | #define I2C_FLAG_RXNE I2C_ISR_RXNE |
bogdanm | 85:024bf7f99721 | 331 | #define I2C_FLAG_ADDR I2C_ISR_ADDR |
bogdanm | 85:024bf7f99721 | 332 | #define I2C_FLAG_AF I2C_ISR_NACKF |
bogdanm | 85:024bf7f99721 | 333 | #define I2C_FLAG_STOPF I2C_ISR_STOPF |
bogdanm | 85:024bf7f99721 | 334 | #define I2C_FLAG_TC I2C_ISR_TC |
bogdanm | 85:024bf7f99721 | 335 | #define I2C_FLAG_TCR I2C_ISR_TCR |
bogdanm | 85:024bf7f99721 | 336 | #define I2C_FLAG_BERR I2C_ISR_BERR |
bogdanm | 85:024bf7f99721 | 337 | #define I2C_FLAG_ARLO I2C_ISR_ARLO |
bogdanm | 85:024bf7f99721 | 338 | #define I2C_FLAG_OVR I2C_ISR_OVR |
bogdanm | 85:024bf7f99721 | 339 | #define I2C_FLAG_PECERR I2C_ISR_PECERR |
bogdanm | 85:024bf7f99721 | 340 | #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
bogdanm | 85:024bf7f99721 | 341 | #define I2C_FLAG_ALERT I2C_ISR_ALERT |
bogdanm | 85:024bf7f99721 | 342 | #define I2C_FLAG_BUSY I2C_ISR_BUSY |
bogdanm | 85:024bf7f99721 | 343 | #define I2C_FLAG_DIR I2C_ISR_DIR |
bogdanm | 85:024bf7f99721 | 344 | /** |
bogdanm | 85:024bf7f99721 | 345 | * @} |
bogdanm | 85:024bf7f99721 | 346 | */ |
bogdanm | 85:024bf7f99721 | 347 | |
bogdanm | 85:024bf7f99721 | 348 | /** |
bogdanm | 85:024bf7f99721 | 349 | * @} |
bogdanm | 85:024bf7f99721 | 350 | */ |
bogdanm | 85:024bf7f99721 | 351 | |
bogdanm | 85:024bf7f99721 | 352 | /* Exported macros -----------------------------------------------------------*/ |
bogdanm | 85:024bf7f99721 | 353 | |
bogdanm | 92:4fc01daae5a5 | 354 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
bogdanm | 92:4fc01daae5a5 | 355 | * @{ |
bogdanm | 92:4fc01daae5a5 | 356 | */ |
bogdanm | 92:4fc01daae5a5 | 357 | |
bogdanm | 85:024bf7f99721 | 358 | /** @brief Reset I2C handle state |
bogdanm | 85:024bf7f99721 | 359 | * @param __HANDLE__: I2C handle. |
bogdanm | 85:024bf7f99721 | 360 | * @retval None |
bogdanm | 85:024bf7f99721 | 361 | */ |
bogdanm | 85:024bf7f99721 | 362 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
bogdanm | 85:024bf7f99721 | 363 | |
bogdanm | 85:024bf7f99721 | 364 | /** @brief Enables or disables the specified I2C interrupts. |
bogdanm | 85:024bf7f99721 | 365 | * @param __HANDLE__: specifies the I2C Handle. |
bogdanm | 92:4fc01daae5a5 | 366 | * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. |
bogdanm | 85:024bf7f99721 | 367 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
bogdanm | 85:024bf7f99721 | 368 | * This parameter can be one of the following values: |
bogdanm | 85:024bf7f99721 | 369 | * @arg I2C_IT_ERRI: Errors interrupt enable |
bogdanm | 85:024bf7f99721 | 370 | * @arg I2C_IT_TCI: Transfer complete interrupt enable |
bogdanm | 85:024bf7f99721 | 371 | * @arg I2C_IT_STOPI: STOP detection interrupt enable |
bogdanm | 85:024bf7f99721 | 372 | * @arg I2C_IT_NACKI: NACK received interrupt enable |
bogdanm | 85:024bf7f99721 | 373 | * @arg I2C_IT_ADDRI: Address match interrupt enable |
bogdanm | 85:024bf7f99721 | 374 | * @arg I2C_IT_RXI: RX interrupt enable |
bogdanm | 85:024bf7f99721 | 375 | * @arg I2C_IT_TXI: TX interrupt enable |
bogdanm | 85:024bf7f99721 | 376 | * |
bogdanm | 85:024bf7f99721 | 377 | * @retval None |
bogdanm | 85:024bf7f99721 | 378 | */ |
bogdanm | 85:024bf7f99721 | 379 | |
bogdanm | 85:024bf7f99721 | 380 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
bogdanm | 85:024bf7f99721 | 381 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
bogdanm | 85:024bf7f99721 | 382 | |
bogdanm | 85:024bf7f99721 | 383 | /** @brief Checks if the specified I2C interrupt source is enabled or disabled. |
bogdanm | 85:024bf7f99721 | 384 | * @param __HANDLE__: specifies the I2C Handle. |
bogdanm | 92:4fc01daae5a5 | 385 | * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. |
bogdanm | 85:024bf7f99721 | 386 | * @param __INTERRUPT__: specifies the I2C interrupt source to check. |
bogdanm | 85:024bf7f99721 | 387 | * This parameter can be one of the following values: |
bogdanm | 85:024bf7f99721 | 388 | * @arg I2C_IT_ERRI: Errors interrupt enable |
bogdanm | 85:024bf7f99721 | 389 | * @arg I2C_IT_TCI: Transfer complete interrupt enable |
bogdanm | 85:024bf7f99721 | 390 | * @arg I2C_IT_STOPI: STOP detection interrupt enable |
bogdanm | 85:024bf7f99721 | 391 | * @arg I2C_IT_NACKI: NACK received interrupt enable |
bogdanm | 85:024bf7f99721 | 392 | * @arg I2C_IT_ADDRI: Address match interrupt enable |
bogdanm | 85:024bf7f99721 | 393 | * @arg I2C_IT_RXI: RX interrupt enable |
bogdanm | 85:024bf7f99721 | 394 | * @arg I2C_IT_TXI: TX interrupt enable |
bogdanm | 85:024bf7f99721 | 395 | * |
bogdanm | 85:024bf7f99721 | 396 | * @retval The new state of __IT__ (TRUE or FALSE). |
bogdanm | 85:024bf7f99721 | 397 | */ |
bogdanm | 85:024bf7f99721 | 398 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
bogdanm | 85:024bf7f99721 | 399 | |
bogdanm | 85:024bf7f99721 | 400 | /** @brief Checks whether the specified I2C flag is set or not. |
bogdanm | 85:024bf7f99721 | 401 | * @param __HANDLE__: specifies the I2C Handle. |
bogdanm | 92:4fc01daae5a5 | 402 | * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. |
bogdanm | 85:024bf7f99721 | 403 | * @param __FLAG__: specifies the flag to check. |
bogdanm | 85:024bf7f99721 | 404 | * This parameter can be one of the following values: |
bogdanm | 85:024bf7f99721 | 405 | * @arg I2C_FLAG_TXE: Transmit data register empty |
bogdanm | 85:024bf7f99721 | 406 | * @arg I2C_FLAG_TXIS: Transmit interrupt status |
bogdanm | 85:024bf7f99721 | 407 | * @arg I2C_FLAG_RXNE: Receive data register not empty |
bogdanm | 85:024bf7f99721 | 408 | * @arg I2C_FLAG_ADDR: Address matched (slave mode) |
bogdanm | 85:024bf7f99721 | 409 | * @arg I2C_FLAG_AF: Acknowledge failure received flag |
bogdanm | 85:024bf7f99721 | 410 | * @arg I2C_FLAG_STOPF: STOP detection flag |
bogdanm | 85:024bf7f99721 | 411 | * @arg I2C_FLAG_TC: Transfer complete (master mode) |
bogdanm | 85:024bf7f99721 | 412 | * @arg I2C_FLAG_TCR: Transfer complete reload |
bogdanm | 85:024bf7f99721 | 413 | * @arg I2C_FLAG_BERR: Bus error |
bogdanm | 85:024bf7f99721 | 414 | * @arg I2C_FLAG_ARLO: Arbitration lost |
bogdanm | 85:024bf7f99721 | 415 | * @arg I2C_FLAG_OVR: Overrun/Underrun |
bogdanm | 85:024bf7f99721 | 416 | * @arg I2C_FLAG_PECERR: PEC error in reception |
bogdanm | 85:024bf7f99721 | 417 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag |
bogdanm | 85:024bf7f99721 | 418 | * @arg I2C_FLAG_ALERT: SMBus alert |
bogdanm | 85:024bf7f99721 | 419 | * @arg I2C_FLAG_BUSY: Bus busy |
bogdanm | 85:024bf7f99721 | 420 | * @arg I2C_FLAG_DIR: Transfer direction (slave mode) |
bogdanm | 85:024bf7f99721 | 421 | * |
bogdanm | 85:024bf7f99721 | 422 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
bogdanm | 85:024bf7f99721 | 423 | */ |
bogdanm | 92:4fc01daae5a5 | 424 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) |
bogdanm | 85:024bf7f99721 | 425 | |
bogdanm | 85:024bf7f99721 | 426 | /** @brief Clears the I2C pending flags which are cleared by writing 1 in a specific bit. |
bogdanm | 85:024bf7f99721 | 427 | * @param __HANDLE__: specifies the I2C Handle. |
bogdanm | 92:4fc01daae5a5 | 428 | * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral. |
bogdanm | 85:024bf7f99721 | 429 | * @param __FLAG__: specifies the flag to clear. |
bogdanm | 85:024bf7f99721 | 430 | * This parameter can be any combination of the following values: |
bogdanm | 85:024bf7f99721 | 431 | * @arg I2C_FLAG_ADDR: Address matched (slave mode) |
bogdanm | 85:024bf7f99721 | 432 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
bogdanm | 85:024bf7f99721 | 433 | * @arg I2C_FLAG_STOPF: STOP detection flag |
bogdanm | 85:024bf7f99721 | 434 | * @arg I2C_FLAG_BERR: Bus error |
bogdanm | 85:024bf7f99721 | 435 | * @arg I2C_FLAG_ARLO: Arbitration lost |
bogdanm | 85:024bf7f99721 | 436 | * @arg I2C_FLAG_OVR: Overrun/Underrun |
bogdanm | 85:024bf7f99721 | 437 | * @arg I2C_FLAG_PECERR: PEC error in reception |
bogdanm | 85:024bf7f99721 | 438 | * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag |
bogdanm | 85:024bf7f99721 | 439 | * @arg I2C_FLAG_ALERT: SMBus alert |
bogdanm | 85:024bf7f99721 | 440 | * |
bogdanm | 85:024bf7f99721 | 441 | * @retval None |
bogdanm | 85:024bf7f99721 | 442 | */ |
bogdanm | 92:4fc01daae5a5 | 443 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
bogdanm | 85:024bf7f99721 | 444 | |
bogdanm | 85:024bf7f99721 | 445 | |
bogdanm | 85:024bf7f99721 | 446 | #define __HAL_I2C_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) |
bogdanm | 85:024bf7f99721 | 447 | #define __HAL_I2C_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) |
bogdanm | 85:024bf7f99721 | 448 | |
bogdanm | 85:024bf7f99721 | 449 | #define __HAL_I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
bogdanm | 85:024bf7f99721 | 450 | |
bogdanm | 92:4fc01daae5a5 | 451 | #define __HAL_I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8))) |
bogdanm | 92:4fc01daae5a5 | 452 | #define __HAL_I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF)))) |
bogdanm | 85:024bf7f99721 | 453 | |
bogdanm | 85:024bf7f99721 | 454 | #define __HAL_I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
bogdanm | 85:024bf7f99721 | 455 | (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
bogdanm | 85:024bf7f99721 | 456 | |
bogdanm | 85:024bf7f99721 | 457 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF) |
bogdanm | 85:024bf7f99721 | 458 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF) |
bogdanm | 92:4fc01daae5a5 | 459 | /** |
bogdanm | 92:4fc01daae5a5 | 460 | * @} |
bogdanm | 92:4fc01daae5a5 | 461 | */ |
bogdanm | 92:4fc01daae5a5 | 462 | |
bogdanm | 92:4fc01daae5a5 | 463 | /* Include I2C HAL Extended module */ |
bogdanm | 85:024bf7f99721 | 464 | #include "stm32f0xx_hal_i2c_ex.h" |
bogdanm | 85:024bf7f99721 | 465 | |
bogdanm | 85:024bf7f99721 | 466 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 467 | /** @addtogroup I2C_Exported_Functions |
bogdanm | 92:4fc01daae5a5 | 468 | * @{ |
bogdanm | 92:4fc01daae5a5 | 469 | */ |
bogdanm | 92:4fc01daae5a5 | 470 | |
bogdanm | 92:4fc01daae5a5 | 471 | /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 92:4fc01daae5a5 | 472 | * @{ |
bogdanm | 92:4fc01daae5a5 | 473 | */ |
bogdanm | 92:4fc01daae5a5 | 474 | |
bogdanm | 85:024bf7f99721 | 475 | /* Initialization/de-initialization functions **********************************/ |
bogdanm | 85:024bf7f99721 | 476 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 477 | HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 478 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 479 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 480 | |
bogdanm | 92:4fc01daae5a5 | 481 | /** |
bogdanm | 92:4fc01daae5a5 | 482 | * @} |
bogdanm | 92:4fc01daae5a5 | 483 | */ |
bogdanm | 92:4fc01daae5a5 | 484 | |
bogdanm | 92:4fc01daae5a5 | 485 | /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions |
bogdanm | 92:4fc01daae5a5 | 486 | * @{ |
bogdanm | 92:4fc01daae5a5 | 487 | */ |
bogdanm | 92:4fc01daae5a5 | 488 | |
bogdanm | 85:024bf7f99721 | 489 | /* IO operation functions *****************************************************/ |
bogdanm | 92:4fc01daae5a5 | 490 | |
bogdanm | 85:024bf7f99721 | 491 | /******* Blocking mode: Polling */ |
bogdanm | 85:024bf7f99721 | 492 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
bogdanm | 85:024bf7f99721 | 493 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
bogdanm | 85:024bf7f99721 | 494 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
bogdanm | 85:024bf7f99721 | 495 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
bogdanm | 85:024bf7f99721 | 496 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
bogdanm | 85:024bf7f99721 | 497 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
bogdanm | 85:024bf7f99721 | 498 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
bogdanm | 85:024bf7f99721 | 499 | |
bogdanm | 85:024bf7f99721 | 500 | /******* Non-Blocking mode: Interrupt */ |
bogdanm | 85:024bf7f99721 | 501 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 502 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 503 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 504 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 505 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 506 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 507 | |
bogdanm | 85:024bf7f99721 | 508 | /******* Non-Blocking mode: DMA */ |
bogdanm | 85:024bf7f99721 | 509 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 510 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 511 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 512 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 513 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 514 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
bogdanm | 85:024bf7f99721 | 515 | |
bogdanm | 85:024bf7f99721 | 516 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
bogdanm | 85:024bf7f99721 | 517 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 518 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 519 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 520 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 521 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 522 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 523 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 524 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 525 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 526 | |
bogdanm | 92:4fc01daae5a5 | 527 | /** |
bogdanm | 92:4fc01daae5a5 | 528 | * @} |
bogdanm | 92:4fc01daae5a5 | 529 | */ |
bogdanm | 92:4fc01daae5a5 | 530 | |
bogdanm | 92:4fc01daae5a5 | 531 | /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions |
bogdanm | 92:4fc01daae5a5 | 532 | * @{ |
bogdanm | 92:4fc01daae5a5 | 533 | */ |
bogdanm | 92:4fc01daae5a5 | 534 | |
bogdanm | 92:4fc01daae5a5 | 535 | /* Peripheral State and Errors functions **************************************/ |
bogdanm | 85:024bf7f99721 | 536 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 537 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
bogdanm | 85:024bf7f99721 | 538 | |
bogdanm | 85:024bf7f99721 | 539 | /** |
bogdanm | 85:024bf7f99721 | 540 | * @} |
bogdanm | 85:024bf7f99721 | 541 | */ |
bogdanm | 85:024bf7f99721 | 542 | |
bogdanm | 85:024bf7f99721 | 543 | /** |
bogdanm | 85:024bf7f99721 | 544 | * @} |
bogdanm | 85:024bf7f99721 | 545 | */ |
bogdanm | 92:4fc01daae5a5 | 546 | |
bogdanm | 92:4fc01daae5a5 | 547 | /** |
bogdanm | 92:4fc01daae5a5 | 548 | * @} |
bogdanm | 92:4fc01daae5a5 | 549 | */ |
bogdanm | 92:4fc01daae5a5 | 550 | |
bogdanm | 92:4fc01daae5a5 | 551 | /** |
bogdanm | 92:4fc01daae5a5 | 552 | * @} |
bogdanm | 92:4fc01daae5a5 | 553 | */ |
bogdanm | 85:024bf7f99721 | 554 | |
bogdanm | 85:024bf7f99721 | 555 | #ifdef __cplusplus |
bogdanm | 85:024bf7f99721 | 556 | } |
bogdanm | 85:024bf7f99721 | 557 | #endif |
bogdanm | 85:024bf7f99721 | 558 | |
bogdanm | 85:024bf7f99721 | 559 | |
bogdanm | 85:024bf7f99721 | 560 | #endif /* __STM32F0xx_HAL_I2C_H */ |
bogdanm | 85:024bf7f99721 | 561 | |
bogdanm | 85:024bf7f99721 | 562 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
bogdanm | 92:4fc01daae5a5 | 563 |