frederic blanc / AnalogIn_Diff_ok

differential input adc board K64F Compatible hal freescale K64F

Dependents:   trms_helloworld AnalogIn_Diff_helloworld

Fork of AnalogIn_Diff by frederic blanc

AnalogIn_Diff.cpp@6:f39be15f056c, 2016-01-07 (annotated)

Committer:
fblanc
Date:
Thu Jan 07 08:34:27 2016 +0000
Revision:
6:f39be15f056c
Parent:
5:c24df4d64aa1 
clean code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
fblanc 2:ea5a4c22bd53 1 /* mbed Microcontroller Library
fblanc 2:ea5a4c22bd53 2 * Copyright (c) 2006-2013 ARM Limited
fblanc 2:ea5a4c22bd53 3 *
fblanc 2:ea5a4c22bd53 4 * Licensed under the Apache License, Version 2.0 (the "License");
fblanc 2:ea5a4c22bd53 5 * you may not use this file except in compliance with the License.
fblanc 2:ea5a4c22bd53 6 * You may obtain a copy of the License at
fblanc 2:ea5a4c22bd53 7 *
fblanc 2:ea5a4c22bd53 8 * http://www.apache.org/licenses/LICENSE-2.0
fblanc 2:ea5a4c22bd53 9 *
fblanc 2:ea5a4c22bd53 10 * Unless required by applicable law or agreed to in writing, software
fblanc 2:ea5a4c22bd53 11 * distributed under the License is distributed on an "AS IS" BASIS,
fblanc 2:ea5a4c22bd53 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
fblanc 2:ea5a4c22bd53 13 * See the License for the specific language governing permissions and
fblanc 2:ea5a4c22bd53 14 * limitations under the License.
fblanc 2:ea5a4c22bd53 15 */
fblanc 2:ea5a4c22bd53 16
JimCarver 0:0f6f4be28e21 17 #include "AnalogIn_Diff.h"
JimCarver 0:0f6f4be28e21 18
fblanc 2:ea5a4c22bd53 19 #if FSL_FEATURE_ADC_HAS_DIFF_MODE
JimCarver 0:0f6f4be28e21 20
fblanc 3:d17541ceae12 21
JimCarver 0:0f6f4be28e21 22
fblanc 2:ea5a4c22bd53 23 AnalogIn_Diff::AnalogIn_Diff(int adc_ch)
fblanc 2:ea5a4c22bd53 24 {
fblanc 3:d17541ceae12 25
fblanc 2:ea5a4c22bd53 26 const uint32_t temp[] = ADC_BASE_ADDRS;
fblanc 2:ea5a4c22bd53 27 for (int i = 0; i < sizeof(temp) / sizeof(temp[0]); i++)
fblanc 2:ea5a4c22bd53 28 adc_addrs[i] = temp[i];
fblanc 2:ea5a4c22bd53 29
fblanc 2:ea5a4c22bd53 30
fblanc 2:ea5a4c22bd53 31 instance=(adc_ch>>1)&1;
fblanc 2:ea5a4c22bd53 32 chnNum=(adc_ch>>0)&1;
fblanc 4:a833fa5cce1e 33
fblanc 2:ea5a4c22bd53 34
fblanc 2:ea5a4c22bd53 35 CLOCK_SYS_EnableAdcClock(instance);
fblanc 2:ea5a4c22bd53 36
fblanc 2:ea5a4c22bd53 37 uint32_t bus_clock;
fblanc 2:ea5a4c22bd53 38 CLOCK_SYS_GetFreq(kBusClock, &bus_clock);
fblanc 2:ea5a4c22bd53 39 uint32_t clkdiv;
fblanc 2:ea5a4c22bd53 40 for (clkdiv = 0; clkdiv < 4; clkdiv++) {
fblanc 2:ea5a4c22bd53 41 if ((bus_clock >> clkdiv) <= MAX_FADC)
fblanc 2:ea5a4c22bd53 42 break;
fblanc 2:ea5a4c22bd53 43 }
fblanc 2:ea5a4c22bd53 44 if (clkdiv == 4) {
fblanc 2:ea5a4c22bd53 45 clkdiv = 0x3; //Set max div
fblanc 2:ea5a4c22bd53 46 }
fblanc 2:ea5a4c22bd53 47
fblanc 2:ea5a4c22bd53 48 /* adc is enabled/triggered when reading. */
fblanc 2:ea5a4c22bd53 49
fblanc 2:ea5a4c22bd53 50 ADC_HAL_Init(adc_addrs[instance]);
fblanc 2:ea5a4c22bd53 51 ADC_HAL_SetClkSrcMode(adc_addrs[instance], kAdcClkSrcOfBusClk);
fblanc 2:ea5a4c22bd53 52 ADC_HAL_SetClkDividerMode(adc_addrs[instance], (adc_clk_divider_mode_t)(clkdiv & 0x3));
fblanc 2:ea5a4c22bd53 53 ADC_HAL_SetRefVoltSrcMode(adc_addrs[instance], kAdcRefVoltSrcOfVref);
fblanc 2:ea5a4c22bd53 54 ADC_HAL_SetResolutionMode(adc_addrs[instance], kAdcResolutionBitOfDiffModeAs16);
fblanc 3:d17541ceae12 55 ADC_HAL_SetContinuousConvCmd(adc_addrs[instance], false);//false
fblanc 2:ea5a4c22bd53 56 ADC_HAL_SetHwTriggerCmd(adc_addrs[instance], false); /* sw trigger */
fblanc 4:a833fa5cce1e 57 ADC_HAL_SetHwAverageCmd(adc_addrs[instance], false); /*Average*/
fblanc 4:a833fa5cce1e 58 //ADC_HAL_SetHwAverageCmd(adc_addrs[instance], true);
fblanc 4:a833fa5cce1e 59 //ADC_HAL_SetHwAverageMode(adc_addrs[instance], kAdcHwAverageCountOf32);
fblanc 2:ea5a4c22bd53 60 ADC_HAL_SetChnMuxMode(adc_addrs[instance], kAdcChnMuxOfB); /* only B channels are avail */
fblanc 5:c24df4d64aa1 61
fblanc 6:f39be15f056c 62
fblanc 2:ea5a4c22bd53 63
JimCarver 0:0f6f4be28e21 64 }
JimCarver 0:0f6f4be28e21 65
fblanc 3:d17541ceae12 66 AnalogIn_Diff::~AnalogIn_Diff() { }
fblanc 2:ea5a4c22bd53 67
fblanc 2:ea5a4c22bd53 68
fblanc 2:ea5a4c22bd53 69
fblanc 6:f39be15f056c 70
fblanc 5:c24df4d64aa1 71 int16_t AnalogIn_Diff::read_raws16() // Returns a 16bit signed integer
fblanc 5:c24df4d64aa1 72 {
fblanc 5:c24df4d64aa1 73 /* sw trigger (SC1A) */
fblanc 5:c24df4d64aa1 74 ADC_HAL_ConfigChn(adc_addrs[instance], 0, false, true, chnNum); //baseAddr, chnGroup, intEnable, diffEnable, chnNum
fblanc 5:c24df4d64aa1 75 while (!ADC_HAL_GetChnConvCompletedCmd(adc_addrs[instance], 0));
fblanc 5:c24df4d64aa1 76 return ADC_HAL_GetChnConvValueRAW(adc_addrs[instance], 0);
fblanc 5:c24df4d64aa1 77
fblanc 5:c24df4d64aa1 78 }
fblanc 5:c24df4d64aa1 79
fblanc 5:c24df4d64aa1 80
fblanc 2:ea5a4c22bd53 81 float AnalogIn_Diff::read()
fblanc 2:ea5a4c22bd53 82 {
fblanc 2:ea5a4c22bd53 83 int16_t value = read_raws16();
fblanc 2:ea5a4c22bd53 84 return (float)value * (1.0f / (float)0xFFFF);
fblanc 2:ea5a4c22bd53 85 }
fblanc 2:ea5a4c22bd53 86
fblanc 2:ea5a4c22bd53 87 #endif // FSL_FEATURE_ADC_HAS_DIFF_MODE