differential input adc board K64F Compatible hal freescale K64F
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Diff: AnalohIn_Diff.cpp
- Revision:
- 2:ea5a4c22bd53
- Parent:
- 1:7b36e4381d83
--- a/AnalohIn_Diff.cpp Thu May 22 17:40:21 2014 +0000 +++ b/AnalohIn_Diff.cpp Fri Dec 05 14:06:38 2014 +0000 @@ -1,33 +1,80 @@ -#include "mbed.h" +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + #include "AnalogIn_Diff.h" - -AnalogIn_Diff::AnalogIn_Diff(int a2d_number) : ch(a2d_number) { - if(ch) BW_SIM_SCGC3_ADC1(1); // Turn on clock as needed - else BW_SIM_SCGC6_ADC0(1); - BW_ADC_SC1n_DIFF(ch, 0, 1); // Differential Mode - BW_ADC_CFG1_ADICLK(ch, 0); // Bus Clock - BW_ADC_CFG1_MODE(ch, 3); // 16Bit differential mode - BW_ADC_CFG1_ADLSMP(ch, 0); // Short Sample Window - BW_ADC_CFG1_ADIV(ch, 3); // Clock / 8 - BW_ADC_CFG1_ADLPC(ch, 0); // Normal Power Mode -} +#if FSL_FEATURE_ADC_HAS_DIFF_MODE AnalogIn_Diff::~AnalogIn_Diff() { } -int16_t AnalogIn_Diff::read_16(int channel) { // Returns a 16bit signed integer - BW_ADC_SC1n_ADCH(ch, 0, channel); // Trigger Conversion - while(!BR_ADC_SC1n_COCO(ch, 0)); // Wait for conversion to finish - return(BR_ADC_Rn_D(ch, 0)); // Return the result +AnalogIn_Diff::AnalogIn_Diff(int adc_ch) +{ + const uint32_t temp[] = ADC_BASE_ADDRS; + for (int i = 0; i < sizeof(temp) / sizeof(temp[0]); i++) + adc_addrs[i] = temp[i]; + + + instance=(adc_ch>>1)&1; + chnNum=(adc_ch>>0)&1; + + + CLOCK_SYS_EnableAdcClock(instance); + + uint32_t bus_clock; + CLOCK_SYS_GetFreq(kBusClock, &bus_clock); + uint32_t clkdiv; + for (clkdiv = 0; clkdiv < 4; clkdiv++) { + if ((bus_clock >> clkdiv) <= MAX_FADC) + break; + } + if (clkdiv == 4) { + clkdiv = 0x3; //Set max div + } + + /* adc is enabled/triggered when reading. */ + + ADC_HAL_Init(adc_addrs[instance]); + ADC_HAL_SetClkSrcMode(adc_addrs[instance], kAdcClkSrcOfBusClk); + ADC_HAL_SetClkDividerMode(adc_addrs[instance], (adc_clk_divider_mode_t)(clkdiv & 0x3)); + ADC_HAL_SetRefVoltSrcMode(adc_addrs[instance], kAdcRefVoltSrcOfVref); + ADC_HAL_SetResolutionMode(adc_addrs[instance], kAdcResolutionBitOfDiffModeAs16); + ADC_HAL_SetContinuousConvCmd(adc_addrs[instance], false); + ADC_HAL_SetHwTriggerCmd(adc_addrs[instance], false); /* sw trigger */ + ADC_HAL_SetHwAverageCmd(adc_addrs[instance], false); + //ADC_HAL_SetHwAverageMode(adc_addrs[instance], kAdcHwAverageCountOf4); + ADC_HAL_SetChnMuxMode(adc_addrs[instance], kAdcChnMuxOfB); /* only B channels are avail */ + + } -float AnalogIn_Diff::read(int channel) { - int16_t i; - float t; - BW_ADC_SC1n_ADCH(ch, 0, channel); - while(!BR_ADC_SC1n_COCO(ch, 0)); - i = BR_ADC_Rn_D(ch, 0); - t = ((float) i); - t = t / 32768.0f; - return(t); + + + +int16_t AnalogIn_Diff::read_raws16() // Returns a 16bit signed integer +{ + /* sw trigger (SC1A) */ + ADC_HAL_ConfigChn(adc_addrs[instance], 0, false, true, chnNum); + while (!ADC_HAL_GetChnConvCompletedCmd(adc_addrs[instance], 0)); + return ADC_HAL_GetChnConvValueRAW(adc_addrs[instance], 0); } + +float AnalogIn_Diff::read() +{ + int16_t value = read_raws16(); + return (float)value * (1.0f / (float)0xFFFF); +} + +#endif // FSL_FEATURE_ADC_HAS_DIFF_MODE