frederic blanc / ADC128D818

12-Bit, 8-Channel, ADC System Monitor w/ Temp Sensor, Internal/External Reference, & I2C Interface

Dependents:   ADC128D818_HelloWorld

ADC128D818.cpp@3:816284ff2a09, 2013-09-06 (annotated)

Committer:
fblanc
Date:
Fri Sep 06 07:19:25 2013 +0000
Revision:
3:816284ff2a09
Parent:
1:5f9dbbbc34c5 
doc classes

Who changed what in which revision?

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fblanc 1:5f9dbbbc34c5 1 /**
fblanc 1:5f9dbbbc34c5 2 * @brief ADC128D818 12-Bit, 8-Channel, ADC System Monitor w/ Temp Sensor, Internal/External Reference, & I2C Interfac
fblanc 1:5f9dbbbc34c5 3 * http://www.ti.com/product/adc128d818/
fblanc 1:5f9dbbbc34c5 4 * @date 02/09/2013
fblanc 1:5f9dbbbc34c5 5 * @author F.BLANC LAAS-CNRS
fblanc 1:5f9dbbbc34c5 6 * http://homepages.laas.fr/fblanc/
fblanc 1:5f9dbbbc34c5 7 */
fblanc 1:5f9dbbbc34c5 8
fblanc 0:9cc68ef524da 9 #include "ADC128D818.h"
fblanc 0:9cc68ef524da 10
fblanc 1:5f9dbbbc34c5 11 /**
fblanc 1:5f9dbbbc34c5 12 * @brief Constructor.
fblanc 1:5f9dbbbc34c5 13 *
fblanc 1:5f9dbbbc34c5 14 * @param sda I2C
fblanc 1:5f9dbbbc34c5 15 * @param scl I2C
fblanc 1:5f9dbbbc34c5 16 * @param adc_int
fblanc 1:5f9dbbbc34c5 17 */
fblanc 0:9cc68ef524da 18 ADC128D818::ADC128D818(PinName sda, PinName scl, PinName adc_int) : _i2c(sda, scl), _Adc_Int (adc_int)
fblanc 0:9cc68ef524da 19 {
fblanc 0:9cc68ef524da 20 }
fblanc 0:9cc68ef524da 21
fblanc 1:5f9dbbbc34c5 22 /**
fblanc 1:5f9dbbbc34c5 23 * @brief Destructor.
fblanc 1:5f9dbbbc34c5 24 */
fblanc 0:9cc68ef524da 25 ADC128D818::~ADC128D818()
fblanc 0:9cc68ef524da 26 {
fblanc 0:9cc68ef524da 27 }
fblanc 0:9cc68ef524da 28
fblanc 1:5f9dbbbc34c5 29 /**
fblanc 1:5f9dbbbc34c5 30 * @brief init
fblanc 1:5f9dbbbc34c5 31 *
fblanc 1:5f9dbbbc34c5 32 * @param address I2C (7bits)
fblanc 1:5f9dbbbc34c5 33 ADC_ADDRESS_LOW_LOW
fblanc 1:5f9dbbbc34c5 34 ADC_ADDRESS_LOW_MID
fblanc 1:5f9dbbbc34c5 35 ADC_ADDRESS_LOW_HIGH
fblanc 1:5f9dbbbc34c5 36 ADC_ADDRESS_MID_LOW
fblanc 1:5f9dbbbc34c5 37 ADC_ADDRESS_MID_MID
fblanc 1:5f9dbbbc34c5 38 ADC_ADDRESS_MID_HIGH
fblanc 1:5f9dbbbc34c5 39 ADC_ADDRESS_HIGH_LOW
fblanc 1:5f9dbbbc34c5 40 ADC_ADDRESS_HIGH_MID
fblanc 1:5f9dbbbc34c5 41 ADC_ADDRESS_HIGH_HIGH
fblanc 1:5f9dbbbc34c5 42 * @param mode :
fblanc 1:5f9dbbbc34c5 43 ADC_MODE_0
fblanc 1:5f9dbbbc34c5 44 ADC_MODE_1
fblanc 1:5f9dbbbc34c5 45 ADC_MODE_2
fblanc 1:5f9dbbbc34c5 46 ADC_MODE_3
fblanc 1:5f9dbbbc34c5 47 * @param vref
fblanc 1:5f9dbbbc34c5 48 ADC_VREF_INT
fblanc 1:5f9dbbbc34c5 49 ADC_VREF_EXT
fblanc 1:5f9dbbbc34c5 50 * @param rate
fblanc 1:5f9dbbbc34c5 51 ADC_RATE_LOW_POWER
fblanc 1:5f9dbbbc34c5 52 ADC_RATE_CONTINUOUS
fblanc 1:5f9dbbbc34c5 53 * @param mask_channel
fblanc 1:5f9dbbbc34c5 54 * @param mask_int
fblanc 1:5f9dbbbc34c5 55 * @return error 0 OK, -1 NO DEVICE, -2 ADC is BUSY
fblanc 1:5f9dbbbc34c5 56 * @date 02/09/2013
fblanc 1:5f9dbbbc34c5 57 */
fblanc 0:9cc68ef524da 58 int ADC128D818::init(char address, char mode, char vref, char rate, char mask_channel, char mask_int)
fblanc 0:9cc68ef524da 59 {
fblanc 0:9cc68ef524da 60
fblanc 0:9cc68ef524da 61 char data;
fblanc 0:9cc68ef524da 62 char cmd_data[2];
fblanc 0:9cc68ef524da 63
fblanc 0:9cc68ef524da 64 _address=address << 1; //bug ?
fblanc 0:9cc68ef524da 65
fblanc 0:9cc68ef524da 66 //2 test Busy_Status_Register
fblanc 0:9cc68ef524da 67 cmd_data[0]= ADC_REG_Busy_Status_Register;
fblanc 0:9cc68ef524da 68
fblanc 0:9cc68ef524da 69 if(_i2c.write(_address, cmd_data, 1))
fblanc 0:9cc68ef524da 70 return -1; //NO DEVICE
fblanc 0:9cc68ef524da 71 _i2c.read(_address,&data,1); //read a byte
fblanc 0:9cc68ef524da 72
fblanc 0:9cc68ef524da 73 if ((data & Busy_Status_Register_Not_Ready) == 1)
fblanc 0:9cc68ef524da 74 return -2; //ADC is BUSY
fblanc 0:9cc68ef524da 75
fblanc 0:9cc68ef524da 76 ADC128D818::stop();
fblanc 0:9cc68ef524da 77 //3 Program the Advanced Configuration Register
fblanc 0:9cc68ef524da 78 data=0;
fblanc 0:9cc68ef524da 79 switch (vref)
fblanc 0:9cc68ef524da 80 {
fblanc 0:9cc68ef524da 81 case ADC_VREF_INT:
fblanc 0:9cc68ef524da 82 data&=~Advanced_Configuration_Register_External_Reference_Enable; //0
fblanc 0:9cc68ef524da 83 break;
fblanc 0:9cc68ef524da 84 case ADC_VREF_EXT:
fblanc 0:9cc68ef524da 85 data|=Advanced_Configuration_Register_External_Reference_Enable; //1
fblanc 0:9cc68ef524da 86 break;
fblanc 0:9cc68ef524da 87 }
fblanc 0:9cc68ef524da 88 switch (mode)
fblanc 0:9cc68ef524da 89 {
fblanc 0:9cc68ef524da 90 case ADC_MODE_0:
fblanc 0:9cc68ef524da 91 data&=~Advanced_Configuration_Register_Mode_Select_0; //0
fblanc 0:9cc68ef524da 92 data&=~Advanced_Configuration_Register_Mode_Select_1; //0
fblanc 0:9cc68ef524da 93 break;
fblanc 0:9cc68ef524da 94 case ADC_MODE_1:
fblanc 0:9cc68ef524da 95 data&=~Advanced_Configuration_Register_Mode_Select_0; //0
fblanc 0:9cc68ef524da 96 data|=Advanced_Configuration_Register_Mode_Select_1; //1
fblanc 0:9cc68ef524da 97 break;
fblanc 0:9cc68ef524da 98 case ADC_MODE_2:
fblanc 0:9cc68ef524da 99 data|=~Advanced_Configuration_Register_Mode_Select_0; //1
fblanc 0:9cc68ef524da 100 data&=Advanced_Configuration_Register_Mode_Select_1; //0
fblanc 0:9cc68ef524da 101 break;
fblanc 0:9cc68ef524da 102 case ADC_MODE_3:
fblanc 0:9cc68ef524da 103 data|=~Advanced_Configuration_Register_Mode_Select_0; //1
fblanc 0:9cc68ef524da 104 data|=Advanced_Configuration_Register_Mode_Select_1; //1
fblanc 0:9cc68ef524da 105 break;
fblanc 0:9cc68ef524da 106 }
fblanc 0:9cc68ef524da 107
fblanc 0:9cc68ef524da 108 cmd_data[0]=ADC_REG_Advanced_Configuration_Register;
fblanc 0:9cc68ef524da 109 cmd_data[1]=data;
fblanc 0:9cc68ef524da 110
fblanc 0:9cc68ef524da 111 _i2c.write(_address, cmd_data, 2); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 112
fblanc 0:9cc68ef524da 113 //4 Program the Conversion Rate Register
fblanc 0:9cc68ef524da 114 data=0;
fblanc 0:9cc68ef524da 115 switch (rate)
fblanc 0:9cc68ef524da 116 {
fblanc 0:9cc68ef524da 117 case ADC_RATE_LOW_POWER:
fblanc 0:9cc68ef524da 118 data&=~Advanced_Configuration_Register_External_Reference_Enable; //0
fblanc 0:9cc68ef524da 119 break;
fblanc 0:9cc68ef524da 120 case ADC_RATE_CONTINUOUS:
fblanc 0:9cc68ef524da 121 data|=Advanced_Configuration_Register_External_Reference_Enable; //1
fblanc 0:9cc68ef524da 122 break;
fblanc 0:9cc68ef524da 123 }
fblanc 0:9cc68ef524da 124
fblanc 0:9cc68ef524da 125 cmd_data[0]=ADC_REG_Conversion_Rate_Register;
fblanc 0:9cc68ef524da 126 cmd_data[1]=data;
fblanc 0:9cc68ef524da 127
fblanc 0:9cc68ef524da 128 _i2c.write(_address, cmd_data, 2); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 129
fblanc 0:9cc68ef524da 130 //5 Choose to enable or disable the channels using the Channel Disable Register
fblanc 0:9cc68ef524da 131
fblanc 0:9cc68ef524da 132 cmd_data[0]=ADC_REG_Channel_Disable_Register;
fblanc 0:9cc68ef524da 133 cmd_data[1]=mask_channel;
fblanc 0:9cc68ef524da 134
fblanc 0:9cc68ef524da 135 _i2c.write(_address, cmd_data, 2); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 136
fblanc 0:9cc68ef524da 137 //6 Using the Interrupt Mask Register
fblanc 0:9cc68ef524da 138
fblanc 0:9cc68ef524da 139 cmd_data[0]=ADC_REG_Interrupt_Mask_Register;
fblanc 0:9cc68ef524da 140 cmd_data[1]=mask_int;
fblanc 0:9cc68ef524da 141
fblanc 0:9cc68ef524da 142 _i2c.write(_address, cmd_data, 2); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 143
fblanc 0:9cc68ef524da 144 return 0;
fblanc 0:9cc68ef524da 145 }
fblanc 0:9cc68ef524da 146
fblanc 1:5f9dbbbc34c5 147 /**
fblanc 1:5f9dbbbc34c5 148 * @brief init_limit
fblanc 1:5f9dbbbc34c5 149 *
fblanc 1:5f9dbbbc34c5 150 * @param limit
fblanc 1:5f9dbbbc34c5 151 * @param high_low
fblanc 1:5f9dbbbc34c5 152 ADC_LIMIT_HIGH
fblanc 1:5f9dbbbc34c5 153 ADC_LIMIT_LOW
fblanc 1:5f9dbbbc34c5 154 * @return error 0 OK
fblanc 1:5f9dbbbc34c5 155 * @date 02/09/2013
fblanc 1:5f9dbbbc34c5 156 */
fblanc 1:5f9dbbbc34c5 157 int ADC128D818::init_limit(char channel, char limit, char high_low)
fblanc 0:9cc68ef524da 158 {
fblanc 1:5f9dbbbc34c5 159 char cmd_data[2];
fblanc 1:5f9dbbbc34c5 160
fblanc 1:5f9dbbbc34c5 161 cmd_data[0]=ADC_REG_Limit_Registers + channel * 2 + high_low;
fblanc 0:9cc68ef524da 162
fblanc 1:5f9dbbbc34c5 163 cmd_data[1]=limit;
fblanc 1:5f9dbbbc34c5 164
fblanc 1:5f9dbbbc34c5 165
fblanc 1:5f9dbbbc34c5 166 _i2c.write(_address, cmd_data, 2); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 167
fblanc 0:9cc68ef524da 168 return 0;
fblanc 0:9cc68ef524da 169 }
fblanc 1:5f9dbbbc34c5 170 /**
fblanc 1:5f9dbbbc34c5 171 * @brief read_channel
fblanc 1:5f9dbbbc34c5 172 * @param channel
fblanc 1:5f9dbbbc34c5 173 * @return u32_data
fblanc 1:5f9dbbbc34c5 174 * @date 02/09/2013
fblanc 1:5f9dbbbc34c5 175 */
fblanc 0:9cc68ef524da 176 int ADC128D818::read_channel(char channel)
fblanc 0:9cc68ef524da 177 {
fblanc 1:5f9dbbbc34c5 178 int u32_data=0;
fblanc 0:9cc68ef524da 179 char data[2];
fblanc 1:5f9dbbbc34c5 180 char *ptr;
fblanc 0:9cc68ef524da 181 char cmd[1] ;
fblanc 0:9cc68ef524da 182 cmd[0] = ADC_REG_Channel_Readings_Registers + channel;
fblanc 0:9cc68ef524da 183 _i2c.write(_address, cmd, 1); //send a byte & wait acknowledged
fblanc 1:5f9dbbbc34c5 184
fblanc 0:9cc68ef524da 185 _i2c.read(_address,data,2); //read a byte
fblanc 1:5f9dbbbc34c5 186 ptr=(char *) & u32_data;
fblanc 1:5f9dbbbc34c5 187 ptr[0]=data[1];
fblanc 1:5f9dbbbc34c5 188 ptr[1]=data[0];
fblanc 1:5f9dbbbc34c5 189 return u32_data;
fblanc 0:9cc68ef524da 190 }
fblanc 0:9cc68ef524da 191
fblanc 1:5f9dbbbc34c5 192 /**
fblanc 1:5f9dbbbc34c5 193 * @brief read_register
fblanc 1:5f9dbbbc34c5 194 * @param Register
fblanc 1:5f9dbbbc34c5 195 * @return u8_data
fblanc 1:5f9dbbbc34c5 196 * @date 02/09/2013
fblanc 1:5f9dbbbc34c5 197 */
fblanc 0:9cc68ef524da 198
fblanc 0:9cc68ef524da 199 char ADC128D818::read_register(char Register)
fblanc 0:9cc68ef524da 200 {
fblanc 0:9cc68ef524da 201 char cmd ;
fblanc 0:9cc68ef524da 202 cmd = Register;
fblanc 0:9cc68ef524da 203
fblanc 0:9cc68ef524da 204 _i2c.write(_address, &cmd, 1); //send a byte
fblanc 0:9cc68ef524da 205 _i2c.read(_address,&cmd,1); //read a byte
fblanc 0:9cc68ef524da 206
fblanc 0:9cc68ef524da 207 return cmd;
fblanc 0:9cc68ef524da 208 }
fblanc 1:5f9dbbbc34c5 209 /**
fblanc 1:5f9dbbbc34c5 210 * @brief start
fblanc 1:5f9dbbbc34c5 211 * @date 02/09/2013
fblanc 1:5f9dbbbc34c5 212 */
fblanc 0:9cc68ef524da 213 void ADC128D818::start()
fblanc 0:9cc68ef524da 214 {
fblanc 0:9cc68ef524da 215 char cmd_data[2];
fblanc 0:9cc68ef524da 216 cmd_data[0]= ADC_REG_Configuration_Register;
fblanc 0:9cc68ef524da 217 cmd_data[1]= Configuration_Register_Start | Configuration_Register_INT_Enable ;
fblanc 0:9cc68ef524da 218
fblanc 0:9cc68ef524da 219 _i2c.write(_address, cmd_data, 2); //send a 2 byte
fblanc 0:9cc68ef524da 220
fblanc 0:9cc68ef524da 221 }
fblanc 1:5f9dbbbc34c5 222 /**
fblanc 1:5f9dbbbc34c5 223 * @brief stop
fblanc 1:5f9dbbbc34c5 224 * @date 02/09/2013
fblanc 1:5f9dbbbc34c5 225 */
fblanc 0:9cc68ef524da 226 void ADC128D818::stop()
fblanc 0:9cc68ef524da 227 {
fblanc 0:9cc68ef524da 228 char cmd_data[2];
fblanc 0:9cc68ef524da 229 cmd_data[0]= ADC_REG_Configuration_Register;
fblanc 0:9cc68ef524da 230 cmd_data[1]= 0 ;
fblanc 0:9cc68ef524da 231
fblanc 0:9cc68ef524da 232 _i2c.write(_address, cmd_data, 2); //send a byte
fblanc 0:9cc68ef524da 233
fblanc 0:9cc68ef524da 234 }