frederic blanc / ADC128D818

12-Bit, 8-Channel, ADC System Monitor w/ Temp Sensor, Internal/External Reference, & I2C Interface

Dependents:   ADC128D818_HelloWorld

ADC128D818.h@0:9cc68ef524da, 2013-08-27 (annotated)

Committer:
fblanc
Date:
Tue Aug 27 11:38:38 2013 +0000
Revision:
0:9cc68ef524da
Child:
1:5f9dbbbc34c5
OK;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
fblanc 0:9cc68ef524da 1
fblanc 0:9cc68ef524da 2
fblanc 0:9cc68ef524da 3 #ifndef ADC128D818_H
fblanc 0:9cc68ef524da 4
fblanc 0:9cc68ef524da 5 #define ADC128D818_H
fblanc 0:9cc68ef524da 6
fblanc 0:9cc68ef524da 7 #include "mbed.h"
fblanc 0:9cc68ef524da 8
fblanc 0:9cc68ef524da 9
fblanc 0:9cc68ef524da 10 //Library for the ADC128D818 12 BIT ADC.
fblanc 0:9cc68ef524da 11 enum ADC_MODE {
fblanc 0:9cc68ef524da 12 ADC_MODE_0 = 0x00,
fblanc 0:9cc68ef524da 13 ADC_MODE_1 = 0x01,
fblanc 0:9cc68ef524da 14 ADC_MODE_2 = 0x02,
fblanc 0:9cc68ef524da 15 ADC_MODE_3 = 0x03
fblanc 0:9cc68ef524da 16 };
fblanc 0:9cc68ef524da 17 enum ADC_ADDRESS {
fblanc 0:9cc68ef524da 18 ADC_ADDRESS_LOW_LOW = 0x1D,
fblanc 0:9cc68ef524da 19 ADC_ADDRESS_LOW_MID = 0x1E,
fblanc 0:9cc68ef524da 20 ADC_ADDRESS_LOW_HIGH = 0x1F,
fblanc 0:9cc68ef524da 21 ADC_ADDRESS_MID_LOW = 0x2D,
fblanc 0:9cc68ef524da 22 ADC_ADDRESS_MID_MID = 0x2E,
fblanc 0:9cc68ef524da 23 ADC_ADDRESS_MID_HIGH = 0x2F,
fblanc 0:9cc68ef524da 24 ADC_ADDRESS_HIGH_LOW = 0x35,
fblanc 0:9cc68ef524da 25 ADC_ADDRESS_HIGH_MID = 0x36,
fblanc 0:9cc68ef524da 26 ADC_ADDRESS_HIGH_HIGH = 0x37
fblanc 0:9cc68ef524da 27 };
fblanc 0:9cc68ef524da 28 enum ADC_VREF {
fblanc 0:9cc68ef524da 29 ADC_VREF_INT = 0x00,
fblanc 0:9cc68ef524da 30 ADC_VREF_EXT = 0x01
fblanc 0:9cc68ef524da 31 };
fblanc 0:9cc68ef524da 32 enum ADC_RATE {
fblanc 0:9cc68ef524da 33 ADC_RATE_LOW_POWER = 0x00,
fblanc 0:9cc68ef524da 34 ADC_RATE_CONTINUOUS = 0x01
fblanc 0:9cc68ef524da 35 };
fblanc 0:9cc68ef524da 36 enum ADC_LIMIT {
fblanc 0:9cc68ef524da 37 ADC_LIMIT_HIGH = 0x00,
fblanc 0:9cc68ef524da 38 ADC_LIMIT_LOW = 0x01
fblanc 0:9cc68ef524da 39 };
fblanc 0:9cc68ef524da 40 enum ADC_CHANNEL {
fblanc 0:9cc68ef524da 41 ADC_CHANNEL_IN0 = 0x00,
fblanc 0:9cc68ef524da 42 ADC_CHANNEL_IN1 = 0x01,
fblanc 0:9cc68ef524da 43 ADC_CHANNEL_IN2 = 0x02,
fblanc 0:9cc68ef524da 44 ADC_CHANNEL_IN3 = 0x03,
fblanc 0:9cc68ef524da 45 ADC_CHANNEL_IN4 = 0x04,
fblanc 0:9cc68ef524da 46 ADC_CHANNEL_IN5 = 0x05,
fblanc 0:9cc68ef524da 47 ADC_CHANNEL_IN6 = 0x06,
fblanc 0:9cc68ef524da 48 ADC_CHANNEL_IN7 = 0x07,
fblanc 0:9cc68ef524da 49 ADC_CHANNEL_TEMP = 0x07
fblanc 0:9cc68ef524da 50 };
fblanc 0:9cc68ef524da 51 enum ADC_REG {
fblanc 0:9cc68ef524da 52 ADC_REG_Configuration_Register = 0x00,
fblanc 0:9cc68ef524da 53 ADC_REG_Interrupt_Status_Register = 0x01,
fblanc 0:9cc68ef524da 54 ADC_REG_Interrupt_Mask_Register = 0x03,
fblanc 0:9cc68ef524da 55 ADC_REG_Conversion_Rate_Register = 0x07,
fblanc 0:9cc68ef524da 56 ADC_REG_Channel_Disable_Register = 0x08,
fblanc 0:9cc68ef524da 57 ADC_REG_One_Shot_Register = 0x09,
fblanc 0:9cc68ef524da 58 ADC_REG_Deep_Shutdown_Register = 0x0A,
fblanc 0:9cc68ef524da 59 ADC_REG_Advanced_Configuration_Register = 0x0B,
fblanc 0:9cc68ef524da 60 ADC_REG_Busy_Status_Register = 0x0C,
fblanc 0:9cc68ef524da 61 ADC_REG_Channel_Readings_Registers = 0x20,
fblanc 0:9cc68ef524da 62 ADC_REG_Limit_Registers = 0x2A,
fblanc 0:9cc68ef524da 63 ADC_REG_Manufacturer_ID_Register = 0x3E,
fblanc 0:9cc68ef524da 64 ADC_REG_Revision_ID_Register = 0x3F
fblanc 0:9cc68ef524da 65 };
fblanc 0:9cc68ef524da 66 class ADC128D818
fblanc 0:9cc68ef524da 67 {
fblanc 0:9cc68ef524da 68 protected:
fblanc 0:9cc68ef524da 69
fblanc 0:9cc68ef524da 70
fblanc 0:9cc68ef524da 71 enum Configuration_Register {
fblanc 0:9cc68ef524da 72 Configuration_Register_Start = 1<<0,
fblanc 0:9cc68ef524da 73 Configuration_Register_INT_Enable = 1<<1,
fblanc 0:9cc68ef524da 74 Configuration_Register_INT_Clear = 1<<3,
fblanc 0:9cc68ef524da 75 Configuration_Register_Initialization = 1<<7
fblanc 0:9cc68ef524da 76 };
fblanc 0:9cc68ef524da 77
fblanc 0:9cc68ef524da 78 enum Busy_Status_Register {
fblanc 0:9cc68ef524da 79 Busy_Status_Register_Busy = 1<<0,
fblanc 0:9cc68ef524da 80 Busy_Status_Register_Not_Ready = 1<<1
fblanc 0:9cc68ef524da 81 };
fblanc 0:9cc68ef524da 82
fblanc 0:9cc68ef524da 83 enum Advanced_Configuration_Register {
fblanc 0:9cc68ef524da 84 Advanced_Configuration_Register_External_Reference_Enable = 1<<0,
fblanc 0:9cc68ef524da 85 Advanced_Configuration_Register_Mode_Select_0 = 1<<1,
fblanc 0:9cc68ef524da 86 Advanced_Configuration_Register_Mode_Select_1 = 1<<2
fblanc 0:9cc68ef524da 87 };
fblanc 0:9cc68ef524da 88
fblanc 0:9cc68ef524da 89 enum Conversion_Rate_Register {
fblanc 0:9cc68ef524da 90 Conversion_Rate_Register_Rate_Register = 1<<0
fblanc 0:9cc68ef524da 91 };
fblanc 0:9cc68ef524da 92
fblanc 0:9cc68ef524da 93
fblanc 0:9cc68ef524da 94 private:
fblanc 0:9cc68ef524da 95 I2C _i2c;
fblanc 0:9cc68ef524da 96 char _data[2];
fblanc 0:9cc68ef524da 97 char _address;
fblanc 0:9cc68ef524da 98 char _mode;
fblanc 0:9cc68ef524da 99
fblanc 0:9cc68ef524da 100 public:
fblanc 0:9cc68ef524da 101
fblanc 0:9cc68ef524da 102 ADC128D818(PinName sda, PinName scl, PinName adc_int );
fblanc 0:9cc68ef524da 103 ~ADC128D818();
fblanc 0:9cc68ef524da 104
fblanc 0:9cc68ef524da 105 InterruptIn _Adc_Int;
fblanc 0:9cc68ef524da 106 int read_channel(char channel);
fblanc 0:9cc68ef524da 107 char read_register(char Register);
fblanc 0:9cc68ef524da 108 int init(char address, char mode, char vref, char rate, char mask_channel, char mask_int);
fblanc 0:9cc68ef524da 109 int init_limit(char channel, int limit, char high_low);
fblanc 0:9cc68ef524da 110 void start();
fblanc 0:9cc68ef524da 111 void stop();
fblanc 0:9cc68ef524da 112 };
fblanc 0:9cc68ef524da 113
fblanc 0:9cc68ef524da 114 #endif
fblanc 0:9cc68ef524da 115