Diff: peripherals/nv_settings.cpp

Revision:

14:900adc64ed43

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/peripherals/nv_settings.cpp	Fri Sep 28 13:28:09 2018 +0000
@@ -0,0 +1,41 @@
+#include "mbed.h"
+
+#define EEPROM_INIT_WORD 0xDEADBEEF
+typedef struct {
+    uint32_t init_word;
+    uint32_t freq;
+    uint8_t sf;
+    uint32_t bw;
+    uint8_t cr;
+    int8_t pow;
+} nv_cfg_t;
+
+
+#define NV_FLASH_BASEADDR 0x8001E000
+static FlashIAP flash_iap;
+static nv_cfg_t nv_cfg;
+nv_cfg_t *readNVCfg(void) {
+    flash_iap.read((void *) &nv_cfg, NV_FLASH_BASEADDR, sizeof(nv_cfg_t));
+    return &nv_cfg;
+}
+
+
+void writeNVCfg(nv_cfg_t *new_nv_cfg) {
+    uint32_t sector_size = flash_iap.get_sector_size(NV_FLASH_BASEADDR);
+    flash_iap.erase(NV_FLASH_BASEADDR, sector_size);
+    flash_iap.program((void *) new_nv_cfg, NV_FLASH_BASEADDR, sector_size);
+}
+
+
+void initNVCfg(void) {
+    nv_cfg_t *nv_cfg = readNVCfg();
+    if(nv_cfg->init_word != EEPROM_INIT_WORD) {
+        nv_cfg->init_word = EEPROM_INIT_WORD;
+        nv_cfg->freq = 433000000;
+        nv_cfg->sf = 12;
+        nv_cfg->bw = 500000;
+        nv_cfg->cr = 1;
+        nv_cfg->pow = 14;   
+    }   
+    writeNVCfg(nv_cfg);
+}