Fahad Mirza
/
Nucleo_HXC900
A demo application for HXC900 LoRaWAN module using Nucleo-L053R8.
main.cpp@39:cb0e5a76ab15, 2019-01-24 (annotated)
- Committer:
- fahadmirza
- Date:
- Thu Jan 24 23:45:12 2019 +0000
- Revision:
- 39:cb0e5a76ab15
- Parent:
- 32:2d0678039a09
Doxygen style header
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
fahadmirza | 7:3c5d342068dd | 1 | /* |
fahadmirza | 7:3c5d342068dd | 2 | _ _ _____ _______ |
fahadmirza | 7:3c5d342068dd | 3 | | | | | |_ _| |__ __| |
fahadmirza | 7:3c5d342068dd | 4 | | |__| | __ ___ __ | | ___ | | |
fahadmirza | 7:3c5d342068dd | 5 | | __ |/ _` \ \/ / | | / _ \| | |
fahadmirza | 7:3c5d342068dd | 6 | | | | | (_| |> < _| || (_) | | |
fahadmirza | 7:3c5d342068dd | 7 | |_| |_|\__,_/_/\_\_____\___/|_| |
fahadmirza | 7:3c5d342068dd | 8 | (C)2017 HaxIoT |
fahadmirza | 7:3c5d342068dd | 9 | */ |
fahadmirza | 7:3c5d342068dd | 10 | /******************************************************************************* |
fahadmirza | 22:5b77cf59d630 | 11 | * @File : main.cpp |
fahadmirza | 22:5b77cf59d630 | 12 | * @Author : Fahad Mirza (Haxiot) |
fahadmirza | 22:5b77cf59d630 | 13 | * @Version : V1.0.0 |
fahadmirza | 22:5b77cf59d630 | 14 | * @Modified: 18 October, 2018 |
fahadmirza | 22:5b77cf59d630 | 15 | * @Brief : Main file |
fahadmirza | 7:3c5d342068dd | 16 | ****************************************************************************** |
fahadmirza | 7:3c5d342068dd | 17 | * @attention |
fahadmirza | 7:3c5d342068dd | 18 | * |
fahadmirza | 7:3c5d342068dd | 19 | * <h2><center>© COPYRIGHT(c) 2017 Haxiot</center></h2> |
fahadmirza | 7:3c5d342068dd | 20 | * |
fahadmirza | 7:3c5d342068dd | 21 | * Redistribution and use in source and binary forms, with or without modification, |
fahadmirza | 7:3c5d342068dd | 22 | * are permitted provided that the following conditions are met: |
fahadmirza | 7:3c5d342068dd | 23 | * 1. Redistributions of source code must retain the above copyright notice, |
fahadmirza | 7:3c5d342068dd | 24 | * this list of conditions and the following disclaimer. |
fahadmirza | 7:3c5d342068dd | 25 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
fahadmirza | 7:3c5d342068dd | 26 | * this list of conditions and the following disclaimer in the documentation |
fahadmirza | 7:3c5d342068dd | 27 | * and/or other materials provided with the distribution. |
fahadmirza | 7:3c5d342068dd | 28 | * 3. Neither the name of Haxiot nor the names of its contributors |
fahadmirza | 7:3c5d342068dd | 29 | * may be used to endorse or promote products derived from this software |
fahadmirza | 7:3c5d342068dd | 30 | * without specific prior written permission. |
fahadmirza | 7:3c5d342068dd | 31 | * |
fahadmirza | 7:3c5d342068dd | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
fahadmirza | 7:3c5d342068dd | 33 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
fahadmirza | 7:3c5d342068dd | 34 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
fahadmirza | 7:3c5d342068dd | 35 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
fahadmirza | 7:3c5d342068dd | 36 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
fahadmirza | 7:3c5d342068dd | 37 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
fahadmirza | 7:3c5d342068dd | 38 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
fahadmirza | 7:3c5d342068dd | 39 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
fahadmirza | 7:3c5d342068dd | 40 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
fahadmirza | 7:3c5d342068dd | 41 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
fahadmirza | 7:3c5d342068dd | 42 | * |
fahadmirza | 7:3c5d342068dd | 43 | ****************************************************************************** |
fahadmirza | 7:3c5d342068dd | 44 | */ |
fahadmirza | 0:a0c5877bd360 | 45 | #include "mbed.h" |
fahadmirza | 32:2d0678039a09 | 46 | #include "hw.h" |
fahadmirza | 32:2d0678039a09 | 47 | #include "hxcclient_bsp.h" |
fahadmirza | 14:05245fe1a7a0 | 48 | #include "lora_conf.h" |
fahadmirza | 0:a0c5877bd360 | 49 | |
fahadmirza | 32:2d0678039a09 | 50 | /* Variables -----------------------------------------------------------------*/ |
fahadmirza | 32:2d0678039a09 | 51 | //Flag to indicate if the MCU is Initialized |
fahadmirza | 32:2d0678039a09 | 52 | static bool McuInitialized = false; |
fahadmirza | 32:2d0678039a09 | 53 | |
fahadmirza | 32:2d0678039a09 | 54 | /* Function Declarations -----------------------------------------------------*/ |
fahadmirza | 32:2d0678039a09 | 55 | void SystemClock_Config(void); |
fahadmirza | 32:2d0678039a09 | 56 | void HW_Init(void); |
fahadmirza | 0:a0c5877bd360 | 57 | |
fahadmirza | 0:a0c5877bd360 | 58 | int main() |
fahadmirza | 0:a0c5877bd360 | 59 | { |
fahadmirza | 0:a0c5877bd360 | 60 | HW_Init(); |
fahadmirza | 11:f4346bbaa872 | 61 | |
fahadmirza | 1:168a6afffbff | 62 | DBG_PRINTF("HXC900-NucleoL053R8 Demo Application\r\n"); |
fahadmirza | 0:a0c5877bd360 | 63 | Lora_init(&LoraConfigParam, &LoraDriverParam); |
fahadmirza | 0:a0c5877bd360 | 64 | |
fahadmirza | 0:a0c5877bd360 | 65 | while(1) |
fahadmirza | 0:a0c5877bd360 | 66 | { |
fahadmirza | 0:a0c5877bd360 | 67 | Lora_fsm(); |
fahadmirza | 0:a0c5877bd360 | 68 | } |
fahadmirza | 0:a0c5877bd360 | 69 | } |
fahadmirza | 0:a0c5877bd360 | 70 | |
fahadmirza | 32:2d0678039a09 | 71 | /****************************************************************************** |
fahadmirza | 32:2d0678039a09 | 72 | * @Brief : This function initializes the hardware |
fahadmirza | 32:2d0678039a09 | 73 | * @Param : None |
fahadmirza | 32:2d0678039a09 | 74 | * @Return: None |
fahadmirza | 32:2d0678039a09 | 75 | ******************************************************************************/ |
fahadmirza | 32:2d0678039a09 | 76 | void HW_Init(void) |
fahadmirza | 32:2d0678039a09 | 77 | { |
fahadmirza | 32:2d0678039a09 | 78 | if(McuInitialized == false) |
fahadmirza | 32:2d0678039a09 | 79 | { |
fahadmirza | 32:2d0678039a09 | 80 | // Reset of all peripherals, Initializes the Flash interface and the Systick. |
fahadmirza | 32:2d0678039a09 | 81 | HAL_Init(); |
fahadmirza | 32:2d0678039a09 | 82 | SystemClock_Config(); |
fahadmirza | 32:2d0678039a09 | 83 | Debug_UART_Init(); |
fahadmirza | 32:2d0678039a09 | 84 | HW_RTC_Init(); |
fahadmirza | 32:2d0678039a09 | 85 | BSP_LED_Init(LED_GREEN);// LED on Nucleo board |
fahadmirza | 32:2d0678039a09 | 86 | HXC_BSP_Init(); |
fahadmirza | 32:2d0678039a09 | 87 | McuInitialized = true; |
fahadmirza | 32:2d0678039a09 | 88 | } |
fahadmirza | 32:2d0678039a09 | 89 | } |
fahadmirza | 32:2d0678039a09 | 90 | |
fahadmirza | 32:2d0678039a09 | 91 | /****************************************************************************** |
fahadmirza | 32:2d0678039a09 | 92 | * @Brief : System Clock Configuration |
fahadmirza | 32:2d0678039a09 | 93 | * The system Clock is configured as follow : |
fahadmirza | 32:2d0678039a09 | 94 | * System Clock source = PLL (HSI) |
fahadmirza | 32:2d0678039a09 | 95 | * SYSCLK(Hz) = 32000000 |
fahadmirza | 32:2d0678039a09 | 96 | * HCLK(Hz) = 32000000 |
fahadmirza | 32:2d0678039a09 | 97 | * AHB Prescaler = 1 |
fahadmirza | 32:2d0678039a09 | 98 | * APB1 Prescaler = 1 |
fahadmirza | 32:2d0678039a09 | 99 | * APB2 Prescaler = 1 |
fahadmirza | 32:2d0678039a09 | 100 | * HSI Frequency(Hz) = 16000000 |
fahadmirza | 32:2d0678039a09 | 101 | * PLLMUL = 6 |
fahadmirza | 32:2d0678039a09 | 102 | * PLLDIV = 3 |
fahadmirza | 32:2d0678039a09 | 103 | * Flash Latency(WS) = 1 |
fahadmirza | 32:2d0678039a09 | 104 | * @Return: None |
fahadmirza | 32:2d0678039a09 | 105 | * @Note : This function enables all the clock necessary for the demo |
fahadmirza | 32:2d0678039a09 | 106 | * including UARTs |
fahadmirza | 32:2d0678039a09 | 107 | ******************************************************************************/ |
fahadmirza | 32:2d0678039a09 | 108 | void SystemClock_Config(void) |
fahadmirza | 32:2d0678039a09 | 109 | { |
fahadmirza | 32:2d0678039a09 | 110 | RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; |
fahadmirza | 32:2d0678039a09 | 111 | RCC_OscInitTypeDef RCC_OscInitStruct = {0}; |
fahadmirza | 32:2d0678039a09 | 112 | |
fahadmirza | 32:2d0678039a09 | 113 | // Enable HSI48 Oscillator for RNG analog part |
fahadmirza | 32:2d0678039a09 | 114 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48; |
fahadmirza | 32:2d0678039a09 | 115 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; |
fahadmirza | 32:2d0678039a09 | 116 | RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; |
fahadmirza | 32:2d0678039a09 | 117 | if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) |
fahadmirza | 32:2d0678039a09 | 118 | { |
fahadmirza | 32:2d0678039a09 | 119 | // Initialization Error |
fahadmirza | 32:2d0678039a09 | 120 | Error_Handler(); |
fahadmirza | 32:2d0678039a09 | 121 | } |
fahadmirza | 32:2d0678039a09 | 122 | |
fahadmirza | 32:2d0678039a09 | 123 | // Set Voltage scale1 as MCU will run at 32MHz |
fahadmirza | 32:2d0678039a09 | 124 | __HAL_RCC_PWR_CLK_ENABLE(); |
fahadmirza | 32:2d0678039a09 | 125 | __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); |
fahadmirza | 32:2d0678039a09 | 126 | |
fahadmirza | 32:2d0678039a09 | 127 | // Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 |
fahadmirza | 32:2d0678039a09 | 128 | while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) != RESET) {}; |
fahadmirza | 32:2d0678039a09 | 129 | |
fahadmirza | 32:2d0678039a09 | 130 | // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers |
fahadmirza | 32:2d0678039a09 | 131 | RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
fahadmirza | 32:2d0678039a09 | 132 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
fahadmirza | 32:2d0678039a09 | 133 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; |
fahadmirza | 32:2d0678039a09 | 134 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; |
fahadmirza | 32:2d0678039a09 | 135 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; |
fahadmirza | 32:2d0678039a09 | 136 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) |
fahadmirza | 32:2d0678039a09 | 137 | { |
fahadmirza | 32:2d0678039a09 | 138 | Error_Handler(); |
fahadmirza | 32:2d0678039a09 | 139 | } |
fahadmirza | 32:2d0678039a09 | 140 | |
fahadmirza | 32:2d0678039a09 | 141 | HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); |
fahadmirza | 32:2d0678039a09 | 142 | HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); |
fahadmirza | 32:2d0678039a09 | 143 | |
fahadmirza | 32:2d0678039a09 | 144 | // SysTick_IRQn interrupt configuration |
fahadmirza | 32:2d0678039a09 | 145 | HAL_NVIC_SetPriority(SysTick_IRQn, 1, 0); |
fahadmirza | 32:2d0678039a09 | 146 | } |
fahadmirza | 32:2d0678039a09 | 147 | |
fahadmirza | 32:2d0678039a09 | 148 | /****************************************************************************** |
fahadmirza | 32:2d0678039a09 | 149 | * @Brief : Initializes the MSP. |
fahadmirza | 32:2d0678039a09 | 150 | * @Param : None |
fahadmirza | 32:2d0678039a09 | 151 | * @Return: None |
fahadmirza | 32:2d0678039a09 | 152 | ******************************************************************************/ |
fahadmirza | 32:2d0678039a09 | 153 | void HAL_MspInit(void) |
fahadmirza | 32:2d0678039a09 | 154 | { |
fahadmirza | 32:2d0678039a09 | 155 | __HAL_RCC_PWR_CLK_ENABLE(); |
fahadmirza | 32:2d0678039a09 | 156 | |
fahadmirza | 32:2d0678039a09 | 157 | // Disable the Power Voltage Detector |
fahadmirza | 32:2d0678039a09 | 158 | HAL_PWR_DisablePVD(); |
fahadmirza | 32:2d0678039a09 | 159 | |
fahadmirza | 32:2d0678039a09 | 160 | // Enables the Ultra Low Power mode |
fahadmirza | 32:2d0678039a09 | 161 | HAL_PWREx_EnableUltraLowPower(); |
fahadmirza | 32:2d0678039a09 | 162 | |
fahadmirza | 32:2d0678039a09 | 163 | __HAL_FLASH_SLEEP_POWERDOWN_ENABLE(); |
fahadmirza | 32:2d0678039a09 | 164 | |
fahadmirza | 32:2d0678039a09 | 165 | /* In debug mode, e.g. when DBGMCU is activated, Arm core has always clocks |
fahadmirza | 32:2d0678039a09 | 166 | * And will not wait that the FLACH is ready to be read. It can miss in this |
fahadmirza | 32:2d0678039a09 | 167 | * case the first instruction. To overcome this issue, the flash remain clocked during sleep mode |
fahadmirza | 32:2d0678039a09 | 168 | */ |
fahadmirza | 32:2d0678039a09 | 169 | DBG( __HAL_FLASH_SLEEP_POWERDOWN_DISABLE(); ); |
fahadmirza | 32:2d0678039a09 | 170 | /*Enable fast wakeUp*/ |
fahadmirza | 32:2d0678039a09 | 171 | HAL_PWREx_EnableFastWakeUp( ); |
fahadmirza | 32:2d0678039a09 | 172 | } |
fahadmirza | 32:2d0678039a09 | 173 | |
fahadmirza | 32:2d0678039a09 | 174 | #ifdef USE_FULL_ASSERT |
fahadmirza | 32:2d0678039a09 | 175 | |
fahadmirza | 32:2d0678039a09 | 176 | /****************************************************************************** |
fahadmirza | 32:2d0678039a09 | 177 | * @Brief : Reports the name of the source file and the source line number |
fahadmirza | 32:2d0678039a09 | 178 | * where the assert_param error has occurred. |
fahadmirza | 32:2d0678039a09 | 179 | * @Param : file: pointer to the source file name |
fahadmirza | 32:2d0678039a09 | 180 | * line: assert_param error line source number |
fahadmirza | 32:2d0678039a09 | 181 | * @Return: None |
fahadmirza | 32:2d0678039a09 | 182 | ******************************************************************************/ |
fahadmirza | 32:2d0678039a09 | 183 | void assert_failed(uint8_t* file, uint32_t line) |
fahadmirza | 32:2d0678039a09 | 184 | { |
fahadmirza | 32:2d0678039a09 | 185 | /* User can add his own implementation to report the file name and line number, |
fahadmirza | 32:2d0678039a09 | 186 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ |
fahadmirza | 32:2d0678039a09 | 187 | } |
fahadmirza | 32:2d0678039a09 | 188 | |
fahadmirza | 32:2d0678039a09 | 189 | #endif |
fahadmirza | 32:2d0678039a09 | 190 | |
fahadmirza | 0:a0c5877bd360 | 191 | /************************ (C) COPYRIGHT Haxiot ***** END OF FILE ****/ |
fahadmirza | 0:a0c5877bd360 | 192 |