den syu / Mbed 2 deprecated prgUSB2

esemi00

Dependencies:   mbed FatFileSystemCpp

USBHostLite/usbhost_lpc17xx.cpp@0:cfcd0d010286, 2021-01-20 (annotated)

Committer:
esemi00
Date:
Wed Jan 20 05:26:12 2021 +0000
Revision:
0:cfcd0d010286
esemi00

Who changed what in which revision?

UserRevisionLine numberNew contents of line
esemi00 0:cfcd0d010286 1 /*
esemi00 0:cfcd0d010286 2 **************************************************************************************************************
esemi00 0:cfcd0d010286 3 * NXP USB Host Stack
esemi00 0:cfcd0d010286 4 *
esemi00 0:cfcd0d010286 5 * (c) Copyright 2008, NXP SemiConductors
esemi00 0:cfcd0d010286 6 * (c) Copyright 2008, OnChip Technologies LLC
esemi00 0:cfcd0d010286 7 * All Rights Reserved
esemi00 0:cfcd0d010286 8 *
esemi00 0:cfcd0d010286 9 * www.nxp.com
esemi00 0:cfcd0d010286 10 * www.onchiptech.com
esemi00 0:cfcd0d010286 11 *
esemi00 0:cfcd0d010286 12 * File : usbhost_lpc17xx.c
esemi00 0:cfcd0d010286 13 * Programmer(s) : Ravikanth.P
esemi00 0:cfcd0d010286 14 * Version :
esemi00 0:cfcd0d010286 15 *
esemi00 0:cfcd0d010286 16 **************************************************************************************************************
esemi00 0:cfcd0d010286 17 */
esemi00 0:cfcd0d010286 18
esemi00 0:cfcd0d010286 19 /*
esemi00 0:cfcd0d010286 20 **************************************************************************************************************
esemi00 0:cfcd0d010286 21 * INCLUDE HEADER FILES
esemi00 0:cfcd0d010286 22 **************************************************************************************************************
esemi00 0:cfcd0d010286 23 */
esemi00 0:cfcd0d010286 24
esemi00 0:cfcd0d010286 25 #include "usbhost_lpc17xx.h"
esemi00 0:cfcd0d010286 26
esemi00 0:cfcd0d010286 27 /*
esemi00 0:cfcd0d010286 28 **************************************************************************************************************
esemi00 0:cfcd0d010286 29 * GLOBAL VARIABLES
esemi00 0:cfcd0d010286 30 **************************************************************************************************************
esemi00 0:cfcd0d010286 31 */
esemi00 0:cfcd0d010286 32 int gUSBConnected;
esemi00 0:cfcd0d010286 33
esemi00 0:cfcd0d010286 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
esemi00 0:cfcd0d010286 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
esemi00 0:cfcd0d010286 36 volatile USB_INT08U HOST_TDControlStatus = 0;
esemi00 0:cfcd0d010286 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
esemi00 0:cfcd0d010286 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
esemi00 0:cfcd0d010286 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
esemi00 0:cfcd0d010286 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
esemi00 0:cfcd0d010286 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
esemi00 0:cfcd0d010286 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
esemi00 0:cfcd0d010286 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
esemi00 0:cfcd0d010286 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
esemi00 0:cfcd0d010286 45
esemi00 0:cfcd0d010286 46 // USB host structures
esemi00 0:cfcd0d010286 47 // AHB SRAM block 1
esemi00 0:cfcd0d010286 48 #define HOSTBASEADDR 0x2007C000
esemi00 0:cfcd0d010286 49 // reserve memory for the linker
esemi00 0:cfcd0d010286 50 static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
esemi00 0:cfcd0d010286 51 /*
esemi00 0:cfcd0d010286 52 **************************************************************************************************************
esemi00 0:cfcd0d010286 53 * DELAY IN MILLI SECONDS
esemi00 0:cfcd0d010286 54 *
esemi00 0:cfcd0d010286 55 * Description: This function provides a delay in milli seconds
esemi00 0:cfcd0d010286 56 *
esemi00 0:cfcd0d010286 57 * Arguments : delay The delay required
esemi00 0:cfcd0d010286 58 *
esemi00 0:cfcd0d010286 59 * Returns : None
esemi00 0:cfcd0d010286 60 *
esemi00 0:cfcd0d010286 61 **************************************************************************************************************
esemi00 0:cfcd0d010286 62 */
esemi00 0:cfcd0d010286 63
esemi00 0:cfcd0d010286 64 void Host_DelayMS (USB_INT32U delay)
esemi00 0:cfcd0d010286 65 {
esemi00 0:cfcd0d010286 66 volatile USB_INT32U i;
esemi00 0:cfcd0d010286 67
esemi00 0:cfcd0d010286 68
esemi00 0:cfcd0d010286 69 for (i = 0; i < delay; i++) {
esemi00 0:cfcd0d010286 70 Host_DelayUS(1000);
esemi00 0:cfcd0d010286 71 }
esemi00 0:cfcd0d010286 72 }
esemi00 0:cfcd0d010286 73
esemi00 0:cfcd0d010286 74 /*
esemi00 0:cfcd0d010286 75 **************************************************************************************************************
esemi00 0:cfcd0d010286 76 * DELAY IN MICRO SECONDS
esemi00 0:cfcd0d010286 77 *
esemi00 0:cfcd0d010286 78 * Description: This function provides a delay in micro seconds
esemi00 0:cfcd0d010286 79 *
esemi00 0:cfcd0d010286 80 * Arguments : delay The delay required
esemi00 0:cfcd0d010286 81 *
esemi00 0:cfcd0d010286 82 * Returns : None
esemi00 0:cfcd0d010286 83 *
esemi00 0:cfcd0d010286 84 **************************************************************************************************************
esemi00 0:cfcd0d010286 85 */
esemi00 0:cfcd0d010286 86
esemi00 0:cfcd0d010286 87 void Host_DelayUS (USB_INT32U delay)
esemi00 0:cfcd0d010286 88 {
esemi00 0:cfcd0d010286 89 volatile USB_INT32U i;
esemi00 0:cfcd0d010286 90
esemi00 0:cfcd0d010286 91
esemi00 0:cfcd0d010286 92 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
esemi00 0:cfcd0d010286 93 ;
esemi00 0:cfcd0d010286 94 }
esemi00 0:cfcd0d010286 95 }
esemi00 0:cfcd0d010286 96
esemi00 0:cfcd0d010286 97 // bits of the USB/OTG clock control register
esemi00 0:cfcd0d010286 98 #define HOST_CLK_EN (1<<0)
esemi00 0:cfcd0d010286 99 #define DEV_CLK_EN (1<<1)
esemi00 0:cfcd0d010286 100 #define PORTSEL_CLK_EN (1<<3)
esemi00 0:cfcd0d010286 101 #define AHB_CLK_EN (1<<4)
esemi00 0:cfcd0d010286 102
esemi00 0:cfcd0d010286 103 // bits of the USB/OTG clock status register
esemi00 0:cfcd0d010286 104 #define HOST_CLK_ON (1<<0)
esemi00 0:cfcd0d010286 105 #define DEV_CLK_ON (1<<1)
esemi00 0:cfcd0d010286 106 #define PORTSEL_CLK_ON (1<<3)
esemi00 0:cfcd0d010286 107 #define AHB_CLK_ON (1<<4)
esemi00 0:cfcd0d010286 108
esemi00 0:cfcd0d010286 109 // we need host clock, OTG/portsel clock and AHB clock
esemi00 0:cfcd0d010286 110 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
esemi00 0:cfcd0d010286 111
esemi00 0:cfcd0d010286 112 /*
esemi00 0:cfcd0d010286 113 **************************************************************************************************************
esemi00 0:cfcd0d010286 114 * INITIALIZE THE HOST CONTROLLER
esemi00 0:cfcd0d010286 115 *
esemi00 0:cfcd0d010286 116 * Description: This function initializes lpc17xx host controller
esemi00 0:cfcd0d010286 117 *
esemi00 0:cfcd0d010286 118 * Arguments : None
esemi00 0:cfcd0d010286 119 *
esemi00 0:cfcd0d010286 120 * Returns :
esemi00 0:cfcd0d010286 121 *
esemi00 0:cfcd0d010286 122 **************************************************************************************************************
esemi00 0:cfcd0d010286 123 */
esemi00 0:cfcd0d010286 124 void Host_Init (void)
esemi00 0:cfcd0d010286 125 {
esemi00 0:cfcd0d010286 126 PRINT_Log("In Host_Init\n");
esemi00 0:cfcd0d010286 127 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
esemi00 0:cfcd0d010286 128
esemi00 0:cfcd0d010286 129 // turn on power for USB
esemi00 0:cfcd0d010286 130 LPC_SC->PCONP |= (1UL<<31);
esemi00 0:cfcd0d010286 131 // Enable USB host clock, port selection and AHB clock
esemi00 0:cfcd0d010286 132 LPC_USB->USBClkCtrl |= CLOCK_MASK;
esemi00 0:cfcd0d010286 133 // Wait for clocks to become available
esemi00 0:cfcd0d010286 134 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
esemi00 0:cfcd0d010286 135 ;
esemi00 0:cfcd0d010286 136
esemi00 0:cfcd0d010286 137 // it seems the bits[0:1] mean the following
esemi00 0:cfcd0d010286 138 // 0: U1=device, U2=host
esemi00 0:cfcd0d010286 139 // 1: U1=host, U2=host
esemi00 0:cfcd0d010286 140 // 2: reserved
esemi00 0:cfcd0d010286 141 // 3: U1=host, U2=device
esemi00 0:cfcd0d010286 142 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
esemi00 0:cfcd0d010286 143 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
esemi00 0:cfcd0d010286 144 LPC_USB->OTGStCtrl |= 1;
esemi00 0:cfcd0d010286 145
esemi00 0:cfcd0d010286 146 // now that we've configured the ports, we can turn off the portsel clock
esemi00 0:cfcd0d010286 147 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
esemi00 0:cfcd0d010286 148
esemi00 0:cfcd0d010286 149 // power pins are not connected on mbed, so we can skip them
esemi00 0:cfcd0d010286 150 /* P1[18] = USB_UP_LED, 01 */
esemi00 0:cfcd0d010286 151 /* P1[19] = /USB_PPWR, 10 */
esemi00 0:cfcd0d010286 152 /* P1[22] = USB_PWRD, 10 */
esemi00 0:cfcd0d010286 153 /* P1[27] = /USB_OVRCR, 10 */
esemi00 0:cfcd0d010286 154 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
esemi00 0:cfcd0d010286 155 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
esemi00 0:cfcd0d010286 156 */
esemi00 0:cfcd0d010286 157
esemi00 0:cfcd0d010286 158 // configure USB D+/D- pins
esemi00 0:cfcd0d010286 159 /* P0[29] = USB_D+, 01 */
esemi00 0:cfcd0d010286 160 /* P0[30] = USB_D-, 01 */
esemi00 0:cfcd0d010286 161 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
esemi00 0:cfcd0d010286 162 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
esemi00 0:cfcd0d010286 163
esemi00 0:cfcd0d010286 164 PRINT_Log("Initializing Host Stack\n");
esemi00 0:cfcd0d010286 165
esemi00 0:cfcd0d010286 166 Hcca = (volatile HCCA *)(HostBuf+0x000);
esemi00 0:cfcd0d010286 167 TDHead = (volatile HCTD *)(HostBuf+0x100);
esemi00 0:cfcd0d010286 168 TDTail = (volatile HCTD *)(HostBuf+0x110);
esemi00 0:cfcd0d010286 169 EDCtrl = (volatile HCED *)(HostBuf+0x120);
esemi00 0:cfcd0d010286 170 EDBulkIn = (volatile HCED *)(HostBuf+0x130);
esemi00 0:cfcd0d010286 171 EDBulkOut = (volatile HCED *)(HostBuf+0x140);
esemi00 0:cfcd0d010286 172 TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
esemi00 0:cfcd0d010286 173
esemi00 0:cfcd0d010286 174 /* Initialize all the TDs, EDs and HCCA to 0 */
esemi00 0:cfcd0d010286 175 Host_EDInit(EDCtrl);
esemi00 0:cfcd0d010286 176 Host_EDInit(EDBulkIn);
esemi00 0:cfcd0d010286 177 Host_EDInit(EDBulkOut);
esemi00 0:cfcd0d010286 178 Host_TDInit(TDHead);
esemi00 0:cfcd0d010286 179 Host_TDInit(TDTail);
esemi00 0:cfcd0d010286 180 Host_HCCAInit(Hcca);
esemi00 0:cfcd0d010286 181
esemi00 0:cfcd0d010286 182 Host_DelayMS(50); /* Wait 50 ms before apply reset */
esemi00 0:cfcd0d010286 183 LPC_USB->HcControl = 0; /* HARDWARE RESET */
esemi00 0:cfcd0d010286 184 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
esemi00 0:cfcd0d010286 185 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
esemi00 0:cfcd0d010286 186
esemi00 0:cfcd0d010286 187 /* SOFTWARE RESET */
esemi00 0:cfcd0d010286 188 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
esemi00 0:cfcd0d010286 189 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
esemi00 0:cfcd0d010286 190
esemi00 0:cfcd0d010286 191 /* Put HC in operational state */
esemi00 0:cfcd0d010286 192 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
esemi00 0:cfcd0d010286 193 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
esemi00 0:cfcd0d010286 194
esemi00 0:cfcd0d010286 195 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
esemi00 0:cfcd0d010286 196 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
esemi00 0:cfcd0d010286 197
esemi00 0:cfcd0d010286 198
esemi00 0:cfcd0d010286 199 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
esemi00 0:cfcd0d010286 200 OR_INTR_ENABLE_WDH |
esemi00 0:cfcd0d010286 201 OR_INTR_ENABLE_RHSC;
esemi00 0:cfcd0d010286 202
esemi00 0:cfcd0d010286 203 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
esemi00 0:cfcd0d010286 204 /* Enable the USB Interrupt */
esemi00 0:cfcd0d010286 205 NVIC_EnableIRQ(USB_IRQn);
esemi00 0:cfcd0d010286 206 PRINT_Log("Host Initialized\n");
esemi00 0:cfcd0d010286 207 }
esemi00 0:cfcd0d010286 208
esemi00 0:cfcd0d010286 209 /*
esemi00 0:cfcd0d010286 210 **************************************************************************************************************
esemi00 0:cfcd0d010286 211 * INTERRUPT SERVICE ROUTINE
esemi00 0:cfcd0d010286 212 *
esemi00 0:cfcd0d010286 213 * Description: This function services the interrupt caused by host controller
esemi00 0:cfcd0d010286 214 *
esemi00 0:cfcd0d010286 215 * Arguments : None
esemi00 0:cfcd0d010286 216 *
esemi00 0:cfcd0d010286 217 * Returns : None
esemi00 0:cfcd0d010286 218 *
esemi00 0:cfcd0d010286 219 **************************************************************************************************************
esemi00 0:cfcd0d010286 220 */
esemi00 0:cfcd0d010286 221
esemi00 0:cfcd0d010286 222 void USB_IRQHandler (void) __irq
esemi00 0:cfcd0d010286 223 {
esemi00 0:cfcd0d010286 224 USB_INT32U int_status;
esemi00 0:cfcd0d010286 225 USB_INT32U ie_status;
esemi00 0:cfcd0d010286 226
esemi00 0:cfcd0d010286 227 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
esemi00 0:cfcd0d010286 228 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
esemi00 0:cfcd0d010286 229
esemi00 0:cfcd0d010286 230 if (!(int_status & ie_status)) {
esemi00 0:cfcd0d010286 231 return;
esemi00 0:cfcd0d010286 232 } else {
esemi00 0:cfcd0d010286 233
esemi00 0:cfcd0d010286 234 int_status = int_status & ie_status;
esemi00 0:cfcd0d010286 235 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
esemi00 0:cfcd0d010286 236 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
esemi00 0:cfcd0d010286 237 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
esemi00 0:cfcd0d010286 238 /*
esemi00 0:cfcd0d010286 239 * When DRWE is on, Connect Status Change
esemi00 0:cfcd0d010286 240 * means a remote wakeup event.
esemi00 0:cfcd0d010286 241 */
esemi00 0:cfcd0d010286 242 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
esemi00 0:cfcd0d010286 243 }
esemi00 0:cfcd0d010286 244 else {
esemi00 0:cfcd0d010286 245 /*
esemi00 0:cfcd0d010286 246 * When DRWE is off, Connect Status Change
esemi00 0:cfcd0d010286 247 * is NOT a remote wakeup event
esemi00 0:cfcd0d010286 248 */
esemi00 0:cfcd0d010286 249 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
esemi00 0:cfcd0d010286 250 if (!gUSBConnected) {
esemi00 0:cfcd0d010286 251 HOST_TDControlStatus = 0;
esemi00 0:cfcd0d010286 252 HOST_WdhIntr = 0;
esemi00 0:cfcd0d010286 253 HOST_RhscIntr = 1;
esemi00 0:cfcd0d010286 254 gUSBConnected = 1;
esemi00 0:cfcd0d010286 255 }
esemi00 0:cfcd0d010286 256 else
esemi00 0:cfcd0d010286 257 PRINT_Log("Spurious status change (connected)?\n");
esemi00 0:cfcd0d010286 258 } else {
esemi00 0:cfcd0d010286 259 if (gUSBConnected) {
esemi00 0:cfcd0d010286 260 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
esemi00 0:cfcd0d010286 261 HOST_RhscIntr = 0;
esemi00 0:cfcd0d010286 262 gUSBConnected = 0;
esemi00 0:cfcd0d010286 263 }
esemi00 0:cfcd0d010286 264 else
esemi00 0:cfcd0d010286 265 PRINT_Log("Spurious status change (disconnected)?\n");
esemi00 0:cfcd0d010286 266 }
esemi00 0:cfcd0d010286 267 }
esemi00 0:cfcd0d010286 268 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
esemi00 0:cfcd0d010286 269 }
esemi00 0:cfcd0d010286 270 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
esemi00 0:cfcd0d010286 271 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
esemi00 0:cfcd0d010286 272 }
esemi00 0:cfcd0d010286 273 }
esemi00 0:cfcd0d010286 274 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
esemi00 0:cfcd0d010286 275 HOST_WdhIntr = 1;
esemi00 0:cfcd0d010286 276 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
esemi00 0:cfcd0d010286 277 }
esemi00 0:cfcd0d010286 278 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
esemi00 0:cfcd0d010286 279 }
esemi00 0:cfcd0d010286 280 return;
esemi00 0:cfcd0d010286 281 }
esemi00 0:cfcd0d010286 282
esemi00 0:cfcd0d010286 283 /*
esemi00 0:cfcd0d010286 284 **************************************************************************************************************
esemi00 0:cfcd0d010286 285 * PROCESS TRANSFER DESCRIPTOR
esemi00 0:cfcd0d010286 286 *
esemi00 0:cfcd0d010286 287 * Description: This function processes the transfer descriptor
esemi00 0:cfcd0d010286 288 *
esemi00 0:cfcd0d010286 289 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
esemi00 0:cfcd0d010286 290 * token SETUP, IN, OUT
esemi00 0:cfcd0d010286 291 * buffer Current Buffer Pointer of the transfer descriptor
esemi00 0:cfcd0d010286 292 * buffer_len Length of the buffer
esemi00 0:cfcd0d010286 293 *
esemi00 0:cfcd0d010286 294 * Returns : OK if TD submission is successful
esemi00 0:cfcd0d010286 295 * ERROR if TD submission fails
esemi00 0:cfcd0d010286 296 *
esemi00 0:cfcd0d010286 297 **************************************************************************************************************
esemi00 0:cfcd0d010286 298 */
esemi00 0:cfcd0d010286 299
esemi00 0:cfcd0d010286 300 USB_INT32S Host_ProcessTD (volatile HCED *ed,
esemi00 0:cfcd0d010286 301 volatile USB_INT32U token,
esemi00 0:cfcd0d010286 302 volatile USB_INT08U *buffer,
esemi00 0:cfcd0d010286 303 USB_INT32U buffer_len)
esemi00 0:cfcd0d010286 304 {
esemi00 0:cfcd0d010286 305 volatile USB_INT32U td_toggle;
esemi00 0:cfcd0d010286 306
esemi00 0:cfcd0d010286 307
esemi00 0:cfcd0d010286 308 if (ed == EDCtrl) {
esemi00 0:cfcd0d010286 309 if (token == TD_SETUP) {
esemi00 0:cfcd0d010286 310 td_toggle = TD_TOGGLE_0;
esemi00 0:cfcd0d010286 311 } else {
esemi00 0:cfcd0d010286 312 td_toggle = TD_TOGGLE_1;
esemi00 0:cfcd0d010286 313 }
esemi00 0:cfcd0d010286 314 } else {
esemi00 0:cfcd0d010286 315 td_toggle = 0;
esemi00 0:cfcd0d010286 316 }
esemi00 0:cfcd0d010286 317 TDHead->Control = (TD_ROUNDING |
esemi00 0:cfcd0d010286 318 token |
esemi00 0:cfcd0d010286 319 TD_DELAY_INT(0) |
esemi00 0:cfcd0d010286 320 td_toggle |
esemi00 0:cfcd0d010286 321 TD_CC);
esemi00 0:cfcd0d010286 322 TDTail->Control = 0;
esemi00 0:cfcd0d010286 323 TDHead->CurrBufPtr = (USB_INT32U) buffer;
esemi00 0:cfcd0d010286 324 TDTail->CurrBufPtr = 0;
esemi00 0:cfcd0d010286 325 TDHead->Next = (USB_INT32U) TDTail;
esemi00 0:cfcd0d010286 326 TDTail->Next = 0;
esemi00 0:cfcd0d010286 327 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
esemi00 0:cfcd0d010286 328 TDTail->BufEnd = 0;
esemi00 0:cfcd0d010286 329
esemi00 0:cfcd0d010286 330 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
esemi00 0:cfcd0d010286 331 ed->TailTd = (USB_INT32U)TDTail;
esemi00 0:cfcd0d010286 332 ed->Next = 0;
esemi00 0:cfcd0d010286 333
esemi00 0:cfcd0d010286 334 if (ed == EDCtrl) {
esemi00 0:cfcd0d010286 335 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
esemi00 0:cfcd0d010286 336 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
esemi00 0:cfcd0d010286 337 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
esemi00 0:cfcd0d010286 338 } else {
esemi00 0:cfcd0d010286 339 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
esemi00 0:cfcd0d010286 340 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
esemi00 0:cfcd0d010286 341 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
esemi00 0:cfcd0d010286 342 }
esemi00 0:cfcd0d010286 343
esemi00 0:cfcd0d010286 344 Host_WDHWait();
esemi00 0:cfcd0d010286 345
esemi00 0:cfcd0d010286 346 // if (!(TDHead->Control & 0xF0000000)) {
esemi00 0:cfcd0d010286 347 if (!HOST_TDControlStatus) {
esemi00 0:cfcd0d010286 348 return (OK);
esemi00 0:cfcd0d010286 349 } else {
esemi00 0:cfcd0d010286 350 return (ERR_TD_FAIL);
esemi00 0:cfcd0d010286 351 }
esemi00 0:cfcd0d010286 352 }
esemi00 0:cfcd0d010286 353
esemi00 0:cfcd0d010286 354 /*
esemi00 0:cfcd0d010286 355 **************************************************************************************************************
esemi00 0:cfcd0d010286 356 * ENUMERATE THE DEVICE
esemi00 0:cfcd0d010286 357 *
esemi00 0:cfcd0d010286 358 * Description: This function is used to enumerate the device connected
esemi00 0:cfcd0d010286 359 *
esemi00 0:cfcd0d010286 360 * Arguments : None
esemi00 0:cfcd0d010286 361 *
esemi00 0:cfcd0d010286 362 * Returns : None
esemi00 0:cfcd0d010286 363 *
esemi00 0:cfcd0d010286 364 **************************************************************************************************************
esemi00 0:cfcd0d010286 365 */
esemi00 0:cfcd0d010286 366
esemi00 0:cfcd0d010286 367 USB_INT32S Host_EnumDev (void)
esemi00 0:cfcd0d010286 368 {
esemi00 0:cfcd0d010286 369 USB_INT32S rc;
esemi00 0:cfcd0d010286 370
esemi00 0:cfcd0d010286 371 PRINT_Log("Connect a Mass Storage device\n");
esemi00 0:cfcd0d010286 372 while (!HOST_RhscIntr)
esemi00 0:cfcd0d010286 373 __WFI();
esemi00 0:cfcd0d010286 374 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
esemi00 0:cfcd0d010286 375 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
esemi00 0:cfcd0d010286 376 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
esemi00 0:cfcd0d010286 377 __WFI(); // Wait for port reset to complete...
esemi00 0:cfcd0d010286 378 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
esemi00 0:cfcd0d010286 379 Host_DelayMS(200); /* Wait for 100 MS after port reset */
esemi00 0:cfcd0d010286 380
esemi00 0:cfcd0d010286 381 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
esemi00 0:cfcd0d010286 382 /* Read first 8 bytes of device desc */
esemi00 0:cfcd0d010286 383 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
esemi00 0:cfcd0d010286 384 if (rc != OK) {
esemi00 0:cfcd0d010286 385 PRINT_Err(rc);
esemi00 0:cfcd0d010286 386 return (rc);
esemi00 0:cfcd0d010286 387 }
esemi00 0:cfcd0d010286 388 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
esemi00 0:cfcd0d010286 389 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
esemi00 0:cfcd0d010286 390 if (rc != OK) {
esemi00 0:cfcd0d010286 391 PRINT_Err(rc);
esemi00 0:cfcd0d010286 392 return (rc);
esemi00 0:cfcd0d010286 393 }
esemi00 0:cfcd0d010286 394 Host_DelayMS(2);
esemi00 0:cfcd0d010286 395 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
esemi00 0:cfcd0d010286 396 /* Get the configuration descriptor */
esemi00 0:cfcd0d010286 397 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
esemi00 0:cfcd0d010286 398 if (rc != OK) {
esemi00 0:cfcd0d010286 399 PRINT_Err(rc);
esemi00 0:cfcd0d010286 400 return (rc);
esemi00 0:cfcd0d010286 401 }
esemi00 0:cfcd0d010286 402 /* Get the first configuration data */
esemi00 0:cfcd0d010286 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
esemi00 0:cfcd0d010286 404 if (rc != OK) {
esemi00 0:cfcd0d010286 405 PRINT_Err(rc);
esemi00 0:cfcd0d010286 406 return (rc);
esemi00 0:cfcd0d010286 407 }
esemi00 0:cfcd0d010286 408 rc = MS_ParseConfiguration(); /* Parse the configuration */
esemi00 0:cfcd0d010286 409 if (rc != OK) {
esemi00 0:cfcd0d010286 410 PRINT_Err(rc);
esemi00 0:cfcd0d010286 411 return (rc);
esemi00 0:cfcd0d010286 412 }
esemi00 0:cfcd0d010286 413 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
esemi00 0:cfcd0d010286 414 if (rc != OK) {
esemi00 0:cfcd0d010286 415 PRINT_Err(rc);
esemi00 0:cfcd0d010286 416 }
esemi00 0:cfcd0d010286 417 Host_DelayMS(100); /* Some devices may require this delay */
esemi00 0:cfcd0d010286 418 return (rc);
esemi00 0:cfcd0d010286 419 }
esemi00 0:cfcd0d010286 420
esemi00 0:cfcd0d010286 421 /*
esemi00 0:cfcd0d010286 422 **************************************************************************************************************
esemi00 0:cfcd0d010286 423 * RECEIVE THE CONTROL INFORMATION
esemi00 0:cfcd0d010286 424 *
esemi00 0:cfcd0d010286 425 * Description: This function is used to receive the control information
esemi00 0:cfcd0d010286 426 *
esemi00 0:cfcd0d010286 427 * Arguments : bm_request_type
esemi00 0:cfcd0d010286 428 * b_request
esemi00 0:cfcd0d010286 429 * w_value
esemi00 0:cfcd0d010286 430 * w_index
esemi00 0:cfcd0d010286 431 * w_length
esemi00 0:cfcd0d010286 432 * buffer
esemi00 0:cfcd0d010286 433 *
esemi00 0:cfcd0d010286 434 * Returns : OK if Success
esemi00 0:cfcd0d010286 435 * ERROR if Failed
esemi00 0:cfcd0d010286 436 *
esemi00 0:cfcd0d010286 437 **************************************************************************************************************
esemi00 0:cfcd0d010286 438 */
esemi00 0:cfcd0d010286 439
esemi00 0:cfcd0d010286 440 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
esemi00 0:cfcd0d010286 441 USB_INT08U b_request,
esemi00 0:cfcd0d010286 442 USB_INT16U w_value,
esemi00 0:cfcd0d010286 443 USB_INT16U w_index,
esemi00 0:cfcd0d010286 444 USB_INT16U w_length,
esemi00 0:cfcd0d010286 445 volatile USB_INT08U *buffer)
esemi00 0:cfcd0d010286 446 {
esemi00 0:cfcd0d010286 447 USB_INT32S rc;
esemi00 0:cfcd0d010286 448
esemi00 0:cfcd0d010286 449
esemi00 0:cfcd0d010286 450 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
esemi00 0:cfcd0d010286 451 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
esemi00 0:cfcd0d010286 452 if (rc == OK) {
esemi00 0:cfcd0d010286 453 if (w_length) {
esemi00 0:cfcd0d010286 454 rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
esemi00 0:cfcd0d010286 455 }
esemi00 0:cfcd0d010286 456 if (rc == OK) {
esemi00 0:cfcd0d010286 457 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
esemi00 0:cfcd0d010286 458 }
esemi00 0:cfcd0d010286 459 }
esemi00 0:cfcd0d010286 460 return (rc);
esemi00 0:cfcd0d010286 461 }
esemi00 0:cfcd0d010286 462
esemi00 0:cfcd0d010286 463 /*
esemi00 0:cfcd0d010286 464 **************************************************************************************************************
esemi00 0:cfcd0d010286 465 * SEND THE CONTROL INFORMATION
esemi00 0:cfcd0d010286 466 *
esemi00 0:cfcd0d010286 467 * Description: This function is used to send the control information
esemi00 0:cfcd0d010286 468 *
esemi00 0:cfcd0d010286 469 * Arguments : None
esemi00 0:cfcd0d010286 470 *
esemi00 0:cfcd0d010286 471 * Returns : OK if Success
esemi00 0:cfcd0d010286 472 * ERR_INVALID_BOOTSIG if Failed
esemi00 0:cfcd0d010286 473 *
esemi00 0:cfcd0d010286 474 **************************************************************************************************************
esemi00 0:cfcd0d010286 475 */
esemi00 0:cfcd0d010286 476
esemi00 0:cfcd0d010286 477 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
esemi00 0:cfcd0d010286 478 USB_INT08U b_request,
esemi00 0:cfcd0d010286 479 USB_INT16U w_value,
esemi00 0:cfcd0d010286 480 USB_INT16U w_index,
esemi00 0:cfcd0d010286 481 USB_INT16U w_length,
esemi00 0:cfcd0d010286 482 volatile USB_INT08U *buffer)
esemi00 0:cfcd0d010286 483 {
esemi00 0:cfcd0d010286 484 USB_INT32S rc;
esemi00 0:cfcd0d010286 485
esemi00 0:cfcd0d010286 486
esemi00 0:cfcd0d010286 487 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
esemi00 0:cfcd0d010286 488
esemi00 0:cfcd0d010286 489 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
esemi00 0:cfcd0d010286 490 if (rc == OK) {
esemi00 0:cfcd0d010286 491 if (w_length) {
esemi00 0:cfcd0d010286 492 rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
esemi00 0:cfcd0d010286 493 }
esemi00 0:cfcd0d010286 494 if (rc == OK) {
esemi00 0:cfcd0d010286 495 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
esemi00 0:cfcd0d010286 496 }
esemi00 0:cfcd0d010286 497 }
esemi00 0:cfcd0d010286 498 return (rc);
esemi00 0:cfcd0d010286 499 }
esemi00 0:cfcd0d010286 500
esemi00 0:cfcd0d010286 501 /*
esemi00 0:cfcd0d010286 502 **************************************************************************************************************
esemi00 0:cfcd0d010286 503 * FILL SETUP PACKET
esemi00 0:cfcd0d010286 504 *
esemi00 0:cfcd0d010286 505 * Description: This function is used to fill the setup packet
esemi00 0:cfcd0d010286 506 *
esemi00 0:cfcd0d010286 507 * Arguments : None
esemi00 0:cfcd0d010286 508 *
esemi00 0:cfcd0d010286 509 * Returns : OK if Success
esemi00 0:cfcd0d010286 510 * ERR_INVALID_BOOTSIG if Failed
esemi00 0:cfcd0d010286 511 *
esemi00 0:cfcd0d010286 512 **************************************************************************************************************
esemi00 0:cfcd0d010286 513 */
esemi00 0:cfcd0d010286 514
esemi00 0:cfcd0d010286 515 void Host_FillSetup (USB_INT08U bm_request_type,
esemi00 0:cfcd0d010286 516 USB_INT08U b_request,
esemi00 0:cfcd0d010286 517 USB_INT16U w_value,
esemi00 0:cfcd0d010286 518 USB_INT16U w_index,
esemi00 0:cfcd0d010286 519 USB_INT16U w_length)
esemi00 0:cfcd0d010286 520 {
esemi00 0:cfcd0d010286 521 int i;
esemi00 0:cfcd0d010286 522 for (i=0;i<w_length;i++)
esemi00 0:cfcd0d010286 523 TDBuffer[i] = 0;
esemi00 0:cfcd0d010286 524
esemi00 0:cfcd0d010286 525 TDBuffer[0] = bm_request_type;
esemi00 0:cfcd0d010286 526 TDBuffer[1] = b_request;
esemi00 0:cfcd0d010286 527 WriteLE16U(&TDBuffer[2], w_value);
esemi00 0:cfcd0d010286 528 WriteLE16U(&TDBuffer[4], w_index);
esemi00 0:cfcd0d010286 529 WriteLE16U(&TDBuffer[6], w_length);
esemi00 0:cfcd0d010286 530 }
esemi00 0:cfcd0d010286 531
esemi00 0:cfcd0d010286 532
esemi00 0:cfcd0d010286 533
esemi00 0:cfcd0d010286 534 /*
esemi00 0:cfcd0d010286 535 **************************************************************************************************************
esemi00 0:cfcd0d010286 536 * INITIALIZE THE TRANSFER DESCRIPTOR
esemi00 0:cfcd0d010286 537 *
esemi00 0:cfcd0d010286 538 * Description: This function initializes transfer descriptor
esemi00 0:cfcd0d010286 539 *
esemi00 0:cfcd0d010286 540 * Arguments : Pointer to TD structure
esemi00 0:cfcd0d010286 541 *
esemi00 0:cfcd0d010286 542 * Returns : None
esemi00 0:cfcd0d010286 543 *
esemi00 0:cfcd0d010286 544 **************************************************************************************************************
esemi00 0:cfcd0d010286 545 */
esemi00 0:cfcd0d010286 546
esemi00 0:cfcd0d010286 547 void Host_TDInit (volatile HCTD *td)
esemi00 0:cfcd0d010286 548 {
esemi00 0:cfcd0d010286 549
esemi00 0:cfcd0d010286 550 td->Control = 0;
esemi00 0:cfcd0d010286 551 td->CurrBufPtr = 0;
esemi00 0:cfcd0d010286 552 td->Next = 0;
esemi00 0:cfcd0d010286 553 td->BufEnd = 0;
esemi00 0:cfcd0d010286 554 }
esemi00 0:cfcd0d010286 555
esemi00 0:cfcd0d010286 556 /*
esemi00 0:cfcd0d010286 557 **************************************************************************************************************
esemi00 0:cfcd0d010286 558 * INITIALIZE THE ENDPOINT DESCRIPTOR
esemi00 0:cfcd0d010286 559 *
esemi00 0:cfcd0d010286 560 * Description: This function initializes endpoint descriptor
esemi00 0:cfcd0d010286 561 *
esemi00 0:cfcd0d010286 562 * Arguments : Pointer to ED strcuture
esemi00 0:cfcd0d010286 563 *
esemi00 0:cfcd0d010286 564 * Returns : None
esemi00 0:cfcd0d010286 565 *
esemi00 0:cfcd0d010286 566 **************************************************************************************************************
esemi00 0:cfcd0d010286 567 */
esemi00 0:cfcd0d010286 568
esemi00 0:cfcd0d010286 569 void Host_EDInit (volatile HCED *ed)
esemi00 0:cfcd0d010286 570 {
esemi00 0:cfcd0d010286 571
esemi00 0:cfcd0d010286 572 ed->Control = 0;
esemi00 0:cfcd0d010286 573 ed->TailTd = 0;
esemi00 0:cfcd0d010286 574 ed->HeadTd = 0;
esemi00 0:cfcd0d010286 575 ed->Next = 0;
esemi00 0:cfcd0d010286 576 }
esemi00 0:cfcd0d010286 577
esemi00 0:cfcd0d010286 578 /*
esemi00 0:cfcd0d010286 579 **************************************************************************************************************
esemi00 0:cfcd0d010286 580 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
esemi00 0:cfcd0d010286 581 *
esemi00 0:cfcd0d010286 582 * Description: This function initializes host controller communications area
esemi00 0:cfcd0d010286 583 *
esemi00 0:cfcd0d010286 584 * Arguments : Pointer to HCCA
esemi00 0:cfcd0d010286 585 *
esemi00 0:cfcd0d010286 586 * Returns :
esemi00 0:cfcd0d010286 587 *
esemi00 0:cfcd0d010286 588 **************************************************************************************************************
esemi00 0:cfcd0d010286 589 */
esemi00 0:cfcd0d010286 590
esemi00 0:cfcd0d010286 591 void Host_HCCAInit (volatile HCCA *hcca)
esemi00 0:cfcd0d010286 592 {
esemi00 0:cfcd0d010286 593 USB_INT32U i;
esemi00 0:cfcd0d010286 594
esemi00 0:cfcd0d010286 595
esemi00 0:cfcd0d010286 596 for (i = 0; i < 32; i++) {
esemi00 0:cfcd0d010286 597
esemi00 0:cfcd0d010286 598 hcca->IntTable[i] = 0;
esemi00 0:cfcd0d010286 599 hcca->FrameNumber = 0;
esemi00 0:cfcd0d010286 600 hcca->DoneHead = 0;
esemi00 0:cfcd0d010286 601 }
esemi00 0:cfcd0d010286 602
esemi00 0:cfcd0d010286 603 }
esemi00 0:cfcd0d010286 604
esemi00 0:cfcd0d010286 605 /*
esemi00 0:cfcd0d010286 606 **************************************************************************************************************
esemi00 0:cfcd0d010286 607 * WAIT FOR WDH INTERRUPT
esemi00 0:cfcd0d010286 608 *
esemi00 0:cfcd0d010286 609 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
esemi00 0:cfcd0d010286 610 *
esemi00 0:cfcd0d010286 611 * Arguments : None
esemi00 0:cfcd0d010286 612 *
esemi00 0:cfcd0d010286 613 * Returns : None
esemi00 0:cfcd0d010286 614 *
esemi00 0:cfcd0d010286 615 **************************************************************************************************************
esemi00 0:cfcd0d010286 616 */
esemi00 0:cfcd0d010286 617
esemi00 0:cfcd0d010286 618 void Host_WDHWait (void)
esemi00 0:cfcd0d010286 619 {
esemi00 0:cfcd0d010286 620 while (!HOST_WdhIntr)
esemi00 0:cfcd0d010286 621 __WFI();
esemi00 0:cfcd0d010286 622
esemi00 0:cfcd0d010286 623 HOST_WdhIntr = 0;
esemi00 0:cfcd0d010286 624 }
esemi00 0:cfcd0d010286 625
esemi00 0:cfcd0d010286 626 /*
esemi00 0:cfcd0d010286 627 **************************************************************************************************************
esemi00 0:cfcd0d010286 628 * READ LE 32U
esemi00 0:cfcd0d010286 629 *
esemi00 0:cfcd0d010286 630 * Description: This function is used to read an unsigned integer from a character buffer in the platform
esemi00 0:cfcd0d010286 631 * containing little endian processor
esemi00 0:cfcd0d010286 632 *
esemi00 0:cfcd0d010286 633 * Arguments : pmem Pointer to the character buffer
esemi00 0:cfcd0d010286 634 *
esemi00 0:cfcd0d010286 635 * Returns : val Unsigned integer
esemi00 0:cfcd0d010286 636 *
esemi00 0:cfcd0d010286 637 **************************************************************************************************************
esemi00 0:cfcd0d010286 638 */
esemi00 0:cfcd0d010286 639
esemi00 0:cfcd0d010286 640 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
esemi00 0:cfcd0d010286 641 {
esemi00 0:cfcd0d010286 642 USB_INT32U val = *(USB_INT32U*)pmem;
esemi00 0:cfcd0d010286 643 #ifdef __BIG_ENDIAN
esemi00 0:cfcd0d010286 644 return __REV(val);
esemi00 0:cfcd0d010286 645 #else
esemi00 0:cfcd0d010286 646 return val;
esemi00 0:cfcd0d010286 647 #endif
esemi00 0:cfcd0d010286 648 }
esemi00 0:cfcd0d010286 649
esemi00 0:cfcd0d010286 650 /*
esemi00 0:cfcd0d010286 651 **************************************************************************************************************
esemi00 0:cfcd0d010286 652 * WRITE LE 32U
esemi00 0:cfcd0d010286 653 *
esemi00 0:cfcd0d010286 654 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
esemi00 0:cfcd0d010286 655 * containing little endian processor.
esemi00 0:cfcd0d010286 656 *
esemi00 0:cfcd0d010286 657 * Arguments : pmem Pointer to the charecter buffer
esemi00 0:cfcd0d010286 658 * val Integer value to be placed in the charecter buffer
esemi00 0:cfcd0d010286 659 *
esemi00 0:cfcd0d010286 660 * Returns : None
esemi00 0:cfcd0d010286 661 *
esemi00 0:cfcd0d010286 662 **************************************************************************************************************
esemi00 0:cfcd0d010286 663 */
esemi00 0:cfcd0d010286 664
esemi00 0:cfcd0d010286 665 void WriteLE32U (volatile USB_INT08U *pmem,
esemi00 0:cfcd0d010286 666 USB_INT32U val)
esemi00 0:cfcd0d010286 667 {
esemi00 0:cfcd0d010286 668 #ifdef __BIG_ENDIAN
esemi00 0:cfcd0d010286 669 *(USB_INT32U*)pmem = __REV(val);
esemi00 0:cfcd0d010286 670 #else
esemi00 0:cfcd0d010286 671 *(USB_INT32U*)pmem = val;
esemi00 0:cfcd0d010286 672 #endif
esemi00 0:cfcd0d010286 673 }
esemi00 0:cfcd0d010286 674
esemi00 0:cfcd0d010286 675 /*
esemi00 0:cfcd0d010286 676 **************************************************************************************************************
esemi00 0:cfcd0d010286 677 * READ LE 16U
esemi00 0:cfcd0d010286 678 *
esemi00 0:cfcd0d010286 679 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
esemi00 0:cfcd0d010286 680 * containing little endian processor
esemi00 0:cfcd0d010286 681 *
esemi00 0:cfcd0d010286 682 * Arguments : pmem Pointer to the charecter buffer
esemi00 0:cfcd0d010286 683 *
esemi00 0:cfcd0d010286 684 * Returns : val Unsigned short integer
esemi00 0:cfcd0d010286 685 *
esemi00 0:cfcd0d010286 686 **************************************************************************************************************
esemi00 0:cfcd0d010286 687 */
esemi00 0:cfcd0d010286 688
esemi00 0:cfcd0d010286 689 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
esemi00 0:cfcd0d010286 690 {
esemi00 0:cfcd0d010286 691 USB_INT16U val = *(USB_INT16U*)pmem;
esemi00 0:cfcd0d010286 692 #ifdef __BIG_ENDIAN
esemi00 0:cfcd0d010286 693 return __REV16(val);
esemi00 0:cfcd0d010286 694 #else
esemi00 0:cfcd0d010286 695 return val;
esemi00 0:cfcd0d010286 696 #endif
esemi00 0:cfcd0d010286 697 }
esemi00 0:cfcd0d010286 698
esemi00 0:cfcd0d010286 699 /*
esemi00 0:cfcd0d010286 700 **************************************************************************************************************
esemi00 0:cfcd0d010286 701 * WRITE LE 16U
esemi00 0:cfcd0d010286 702 *
esemi00 0:cfcd0d010286 703 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
esemi00 0:cfcd0d010286 704 * platform containing little endian processor
esemi00 0:cfcd0d010286 705 *
esemi00 0:cfcd0d010286 706 * Arguments : pmem Pointer to the charecter buffer
esemi00 0:cfcd0d010286 707 * val Value to be placed in the charecter buffer
esemi00 0:cfcd0d010286 708 *
esemi00 0:cfcd0d010286 709 * Returns : None
esemi00 0:cfcd0d010286 710 *
esemi00 0:cfcd0d010286 711 **************************************************************************************************************
esemi00 0:cfcd0d010286 712 */
esemi00 0:cfcd0d010286 713
esemi00 0:cfcd0d010286 714 void WriteLE16U (volatile USB_INT08U *pmem,
esemi00 0:cfcd0d010286 715 USB_INT16U val)
esemi00 0:cfcd0d010286 716 {
esemi00 0:cfcd0d010286 717 #ifdef __BIG_ENDIAN
esemi00 0:cfcd0d010286 718 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
esemi00 0:cfcd0d010286 719 #else
esemi00 0:cfcd0d010286 720 *(USB_INT16U*)pmem = val;
esemi00 0:cfcd0d010286 721 #endif
esemi00 0:cfcd0d010286 722 }
esemi00 0:cfcd0d010286 723
esemi00 0:cfcd0d010286 724 /*
esemi00 0:cfcd0d010286 725 **************************************************************************************************************
esemi00 0:cfcd0d010286 726 * READ BE 32U
esemi00 0:cfcd0d010286 727 *
esemi00 0:cfcd0d010286 728 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
esemi00 0:cfcd0d010286 729 * containing big endian processor
esemi00 0:cfcd0d010286 730 *
esemi00 0:cfcd0d010286 731 * Arguments : pmem Pointer to the charecter buffer
esemi00 0:cfcd0d010286 732 *
esemi00 0:cfcd0d010286 733 * Returns : val Unsigned integer
esemi00 0:cfcd0d010286 734 *
esemi00 0:cfcd0d010286 735 **************************************************************************************************************
esemi00 0:cfcd0d010286 736 */
esemi00 0:cfcd0d010286 737
esemi00 0:cfcd0d010286 738 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
esemi00 0:cfcd0d010286 739 {
esemi00 0:cfcd0d010286 740 USB_INT32U val = *(USB_INT32U*)pmem;
esemi00 0:cfcd0d010286 741 #ifdef __BIG_ENDIAN
esemi00 0:cfcd0d010286 742 return val;
esemi00 0:cfcd0d010286 743 #else
esemi00 0:cfcd0d010286 744 return __REV(val);
esemi00 0:cfcd0d010286 745 #endif
esemi00 0:cfcd0d010286 746 }
esemi00 0:cfcd0d010286 747
esemi00 0:cfcd0d010286 748 /*
esemi00 0:cfcd0d010286 749 **************************************************************************************************************
esemi00 0:cfcd0d010286 750 * WRITE BE 32U
esemi00 0:cfcd0d010286 751 *
esemi00 0:cfcd0d010286 752 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
esemi00 0:cfcd0d010286 753 * containing big endian processor
esemi00 0:cfcd0d010286 754 *
esemi00 0:cfcd0d010286 755 * Arguments : pmem Pointer to the charecter buffer
esemi00 0:cfcd0d010286 756 * val Value to be placed in the charecter buffer
esemi00 0:cfcd0d010286 757 *
esemi00 0:cfcd0d010286 758 * Returns : None
esemi00 0:cfcd0d010286 759 *
esemi00 0:cfcd0d010286 760 **************************************************************************************************************
esemi00 0:cfcd0d010286 761 */
esemi00 0:cfcd0d010286 762
esemi00 0:cfcd0d010286 763 void WriteBE32U (volatile USB_INT08U *pmem,
esemi00 0:cfcd0d010286 764 USB_INT32U val)
esemi00 0:cfcd0d010286 765 {
esemi00 0:cfcd0d010286 766 #ifdef __BIG_ENDIAN
esemi00 0:cfcd0d010286 767 *(USB_INT32U*)pmem = val;
esemi00 0:cfcd0d010286 768 #else
esemi00 0:cfcd0d010286 769 *(USB_INT32U*)pmem = __REV(val);
esemi00 0:cfcd0d010286 770 #endif
esemi00 0:cfcd0d010286 771 }
esemi00 0:cfcd0d010286 772
esemi00 0:cfcd0d010286 773 /*
esemi00 0:cfcd0d010286 774 **************************************************************************************************************
esemi00 0:cfcd0d010286 775 * READ BE 16U
esemi00 0:cfcd0d010286 776 *
esemi00 0:cfcd0d010286 777 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
esemi00 0:cfcd0d010286 778 * containing big endian processor
esemi00 0:cfcd0d010286 779 *
esemi00 0:cfcd0d010286 780 * Arguments : pmem Pointer to the charecter buffer
esemi00 0:cfcd0d010286 781 *
esemi00 0:cfcd0d010286 782 * Returns : val Unsigned short integer
esemi00 0:cfcd0d010286 783 *
esemi00 0:cfcd0d010286 784 **************************************************************************************************************
esemi00 0:cfcd0d010286 785 */
esemi00 0:cfcd0d010286 786
esemi00 0:cfcd0d010286 787 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
esemi00 0:cfcd0d010286 788 {
esemi00 0:cfcd0d010286 789 USB_INT16U val = *(USB_INT16U*)pmem;
esemi00 0:cfcd0d010286 790 #ifdef __BIG_ENDIAN
esemi00 0:cfcd0d010286 791 return val;
esemi00 0:cfcd0d010286 792 #else
esemi00 0:cfcd0d010286 793 return __REV16(val);
esemi00 0:cfcd0d010286 794 #endif
esemi00 0:cfcd0d010286 795 }
esemi00 0:cfcd0d010286 796
esemi00 0:cfcd0d010286 797 /*
esemi00 0:cfcd0d010286 798 **************************************************************************************************************
esemi00 0:cfcd0d010286 799 * WRITE BE 16U
esemi00 0:cfcd0d010286 800 *
esemi00 0:cfcd0d010286 801 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
esemi00 0:cfcd0d010286 802 * platform containing big endian processor
esemi00 0:cfcd0d010286 803 *
esemi00 0:cfcd0d010286 804 * Arguments : pmem Pointer to the charecter buffer
esemi00 0:cfcd0d010286 805 * val Value to be placed in the charecter buffer
esemi00 0:cfcd0d010286 806 *
esemi00 0:cfcd0d010286 807 * Returns : None
esemi00 0:cfcd0d010286 808 *
esemi00 0:cfcd0d010286 809 **************************************************************************************************************
esemi00 0:cfcd0d010286 810 */
esemi00 0:cfcd0d010286 811
esemi00 0:cfcd0d010286 812 void WriteBE16U (volatile USB_INT08U *pmem,
esemi00 0:cfcd0d010286 813 USB_INT16U val)
esemi00 0:cfcd0d010286 814 {
esemi00 0:cfcd0d010286 815 #ifdef __BIG_ENDIAN
esemi00 0:cfcd0d010286 816 *(USB_INT16U*)pmem = val;
esemi00 0:cfcd0d010286 817 #else
esemi00 0:cfcd0d010286 818 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
esemi00 0:cfcd0d010286 819 #endif
esemi00 0:cfcd0d010286 820 }