Preston Ernst / Mbed OS mirror_actuator_VT

-data logging revision

Dependencies:   FastPWM

Lib_Misc/EncoderCounter.cpp@2:92c25cb669f4, 2021-08-24 (annotated)

Committer:
ernstpre
Date:
Tue Aug 24 08:51:13 2021 +0000
Revision:
2:92c25cb669f4
Parent:
0:d2e117716219 
Publish Commit 24/8/21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
altb2 0:d2e117716219 1 /*
altb2 0:d2e117716219 2 * EncoderCounter.cpp
altb2 0:d2e117716219 3 * Copyright (c) 2017, ZHAW
altb2 0:d2e117716219 4 * All rights reserved.
altb2 0:d2e117716219 5 */
altb2 0:d2e117716219 6
altb2 0:d2e117716219 7 #include "EncoderCounter.h"
altb2 0:d2e117716219 8
altb2 0:d2e117716219 9
altb2 0:d2e117716219 10 using namespace std;
altb2 0:d2e117716219 11
altb2 0:d2e117716219 12 /**
altb2 0:d2e117716219 13 * Creates and initializes the driver to read the quadrature
altb2 0:d2e117716219 14 * encoder counter of the STM32 microcontroller.
altb2 0:d2e117716219 15 * @param a the input pin for the channel A.
altb2 0:d2e117716219 16 * @param b the input pin for the channel B.
altb2 0:d2e117716219 17 */
altb2 0:d2e117716219 18 EncoderCounter::EncoderCounter(PinName a, PinName b) {
altb2 0:d2e117716219 19
altb2 0:d2e117716219 20 // check pins
altb2 0:d2e117716219 21
altb2 0:d2e117716219 22 if ((a == PA_6) && (b == PC_7)) {
altb2 0:d2e117716219 23
altb2 0:d2e117716219 24 // pinmap OK for TIM3 CH1 and CH2
altb2 0:d2e117716219 25
altb2 0:d2e117716219 26 TIM = TIM3;
altb2 0:d2e117716219 27
altb2 0:d2e117716219 28 // configure reset and clock control registers
altb2 0:d2e117716219 29
altb2 0:d2e117716219 30 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
altb2 0:d2e117716219 31
altb2 0:d2e117716219 32 // configure general purpose I/O registers
altb2 0:d2e117716219 33
altb2 0:d2e117716219 34 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
altb2 0:d2e117716219 35 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
altb2 0:d2e117716219 36 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
altb2 0:d2e117716219 37 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
altb2 0:d2e117716219 38 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
altb2 0:d2e117716219 39 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
altb2 0:d2e117716219 40
altb2 0:d2e117716219 41 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
altb2 0:d2e117716219 42 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
altb2 0:d2e117716219 43 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
altb2 0:d2e117716219 44 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
altb2 0:d2e117716219 45 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
altb2 0:d2e117716219 46 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
altb2 0:d2e117716219 47
altb2 0:d2e117716219 48 // configure reset and clock control registers
altb2 0:d2e117716219 49
altb2 0:d2e117716219 50 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
altb2 0:d2e117716219 51 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
altb2 0:d2e117716219 52
altb2 0:d2e117716219 53 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
altb2 0:d2e117716219 54
altb2 0:d2e117716219 55 } else if ((a == PB_6) && (b == PB_7)) {
altb2 0:d2e117716219 56
altb2 0:d2e117716219 57 // pinmap OK for TIM4 CH1 and CH2
altb2 0:d2e117716219 58
altb2 0:d2e117716219 59 TIM = TIM4;
altb2 0:d2e117716219 60
altb2 0:d2e117716219 61 // configure reset and clock control registers
altb2 0:d2e117716219 62
altb2 0:d2e117716219 63 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
altb2 0:d2e117716219 64
altb2 0:d2e117716219 65 // configure general purpose I/O registers
altb2 0:d2e117716219 66
altb2 0:d2e117716219 67 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
altb2 0:d2e117716219 68 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
altb2 0:d2e117716219 69 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
altb2 0:d2e117716219 70 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
altb2 0:d2e117716219 71 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
altb2 0:d2e117716219 72 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
altb2 0:d2e117716219 73
altb2 0:d2e117716219 74 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
altb2 0:d2e117716219 75 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
altb2 0:d2e117716219 76 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
altb2 0:d2e117716219 77 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
altb2 0:d2e117716219 78 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
altb2 0:d2e117716219 79 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
altb2 0:d2e117716219 80
altb2 0:d2e117716219 81 // configure reset and clock control registers
altb2 0:d2e117716219 82
altb2 0:d2e117716219 83 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
altb2 0:d2e117716219 84 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
altb2 0:d2e117716219 85
altb2 0:d2e117716219 86 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
altb2 0:d2e117716219 87
altb2 0:d2e117716219 88 } else {
altb2 0:d2e117716219 89
altb2 0:d2e117716219 90 printf("pinmap not found for peripheral\n");
altb2 0:d2e117716219 91 }
altb2 0:d2e117716219 92
altb2 0:d2e117716219 93 // configure general purpose timer 3 or 4
altb2 0:d2e117716219 94
altb2 0:d2e117716219 95 TIM->CR1 = 0x0000; // counter disable
altb2 0:d2e117716219 96 TIM->CR2 = 0x0000; // reset master mode selection
altb2 0:d2e117716219 97 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
altb2 0:d2e117716219 98 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
altb2 0:d2e117716219 99 TIM->CCMR2 = 0x0000; // reset capture mode register 2
altb2 0:d2e117716219 100 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
altb2 0:d2e117716219 101 TIM->CNT = 0x0000; // reset counter value
altb2 0:d2e117716219 102 TIM->ARR = 0xFFFF; // auto reload register
altb2 0:d2e117716219 103 TIM->CR1 = TIM_CR1_CEN; // counter enable
altb2 0:d2e117716219 104 }
altb2 0:d2e117716219 105
altb2 0:d2e117716219 106 EncoderCounter::~EncoderCounter() {}
altb2 0:d2e117716219 107
altb2 0:d2e117716219 108 /**
altb2 0:d2e117716219 109 * Resets the counter value to zero.
altb2 0:d2e117716219 110 */
altb2 0:d2e117716219 111 void EncoderCounter::reset() {
altb2 0:d2e117716219 112
altb2 0:d2e117716219 113 TIM->CNT = 0x0000;
altb2 0:d2e117716219 114 }
altb2 0:d2e117716219 115
altb2 0:d2e117716219 116 /**
altb2 0:d2e117716219 117 * Resets the counter value to a given offset value.
altb2 0:d2e117716219 118 * @param offset the offset value to reset the counter to.
altb2 0:d2e117716219 119 */
altb2 0:d2e117716219 120 void EncoderCounter::reset(short offset) {
altb2 0:d2e117716219 121
altb2 0:d2e117716219 122 TIM->CNT = -offset;
altb2 0:d2e117716219 123 }
altb2 0:d2e117716219 124
altb2 0:d2e117716219 125 /**
altb2 0:d2e117716219 126 * Reads the quadrature encoder counter value.
altb2 0:d2e117716219 127 * @return the quadrature encoder counter as a signed 16-bit integer value.
altb2 0:d2e117716219 128 */
altb2 0:d2e117716219 129 short EncoderCounter::read() {
altb2 0:d2e117716219 130
altb2 0:d2e117716219 131 return (short)(-TIM->CNT);
altb2 0:d2e117716219 132 }
altb2 0:d2e117716219 133
altb2 0:d2e117716219 134 /**
altb2 0:d2e117716219 135 * The empty operator is a shorthand notation of the <code>read()</code> method.
altb2 0:d2e117716219 136 */
altb2 0:d2e117716219 137 EncoderCounter::operator short() {
altb2 0:d2e117716219 138
altb2 0:d2e117716219 139 return read();
altb2 0:d2e117716219 140 }