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TARGET_NUCLEO_L152RE/stm32l1xx_flash.h@81:7d30d6019079, 2014-03-19 (annotated)
- Committer:
- bogdanm
- Date:
- Wed Mar 19 18:28:32 2014 +0000
- Revision:
- 81:7d30d6019079
- Parent:
- 77:869cf507173a
Release 81 of the mbed library
Main changes:
- Updates and fixes for many targets
- LPC1768: serial interface code fixes
- nRF51822 targets now output a .hex file
- More exporters
- More flexible GPIO API
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 77:869cf507173a | 1 | /** |
| emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 3 | * @file stm32l1xx_flash.h |
| emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
| emilmont | 77:869cf507173a | 5 | * @version V1.3.0 |
| emilmont | 77:869cf507173a | 6 | * @date 31-January-2014 |
| emilmont | 77:869cf507173a | 7 | * @brief This file contains all the functions prototypes for the FLASH |
| emilmont | 77:869cf507173a | 8 | * firmware library. |
| emilmont | 77:869cf507173a | 9 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 10 | * @attention |
| emilmont | 77:869cf507173a | 11 | * |
| bogdanm | 81:7d30d6019079 | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| emilmont | 77:869cf507173a | 13 | * |
| bogdanm | 81:7d30d6019079 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 81:7d30d6019079 | 15 | * are permitted provided that the following conditions are met: |
| bogdanm | 81:7d30d6019079 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 81:7d30d6019079 | 17 | * this list of conditions and the following disclaimer. |
| bogdanm | 81:7d30d6019079 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 81:7d30d6019079 | 19 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 81:7d30d6019079 | 20 | * and/or other materials provided with the distribution. |
| bogdanm | 81:7d30d6019079 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 81:7d30d6019079 | 22 | * may be used to endorse or promote products derived from this software |
| bogdanm | 81:7d30d6019079 | 23 | * without specific prior written permission. |
| emilmont | 77:869cf507173a | 24 | * |
| bogdanm | 81:7d30d6019079 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 81:7d30d6019079 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 81:7d30d6019079 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 81:7d30d6019079 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 81:7d30d6019079 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 81:7d30d6019079 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 81:7d30d6019079 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 81:7d30d6019079 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 81:7d30d6019079 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 81:7d30d6019079 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| emilmont | 77:869cf507173a | 35 | * |
| emilmont | 77:869cf507173a | 36 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 37 | */ |
| emilmont | 77:869cf507173a | 38 | |
| emilmont | 77:869cf507173a | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| emilmont | 77:869cf507173a | 40 | #ifndef __STM32L1xx_FLASH_H |
| emilmont | 77:869cf507173a | 41 | #define __STM32L1xx_FLASH_H |
| emilmont | 77:869cf507173a | 42 | |
| emilmont | 77:869cf507173a | 43 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 44 | extern "C" { |
| emilmont | 77:869cf507173a | 45 | #endif |
| emilmont | 77:869cf507173a | 46 | |
| emilmont | 77:869cf507173a | 47 | /* Includes ------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 48 | #include "stm32l1xx.h" |
| emilmont | 77:869cf507173a | 49 | |
| emilmont | 77:869cf507173a | 50 | /** @addtogroup STM32L1xx_StdPeriph_Driver |
| emilmont | 77:869cf507173a | 51 | * @{ |
| emilmont | 77:869cf507173a | 52 | */ |
| emilmont | 77:869cf507173a | 53 | |
| emilmont | 77:869cf507173a | 54 | /** @addtogroup FLASH |
| emilmont | 77:869cf507173a | 55 | * @{ |
| emilmont | 77:869cf507173a | 56 | */ |
| emilmont | 77:869cf507173a | 57 | |
| emilmont | 77:869cf507173a | 58 | /* Exported types ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 59 | |
| emilmont | 77:869cf507173a | 60 | /** |
| emilmont | 77:869cf507173a | 61 | * @brief FLASH Status |
| emilmont | 77:869cf507173a | 62 | */ |
| emilmont | 77:869cf507173a | 63 | typedef enum |
| emilmont | 77:869cf507173a | 64 | { |
| emilmont | 77:869cf507173a | 65 | FLASH_BUSY = 1, |
| emilmont | 77:869cf507173a | 66 | FLASH_ERROR_WRP, |
| emilmont | 77:869cf507173a | 67 | FLASH_ERROR_PROGRAM, |
| emilmont | 77:869cf507173a | 68 | FLASH_COMPLETE, |
| emilmont | 77:869cf507173a | 69 | FLASH_TIMEOUT |
| emilmont | 77:869cf507173a | 70 | }FLASH_Status; |
| emilmont | 77:869cf507173a | 71 | |
| emilmont | 77:869cf507173a | 72 | /* Exported constants --------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 73 | |
| emilmont | 77:869cf507173a | 74 | /** @defgroup FLASH_Exported_Constants |
| emilmont | 77:869cf507173a | 75 | * @{ |
| emilmont | 77:869cf507173a | 76 | */ |
| emilmont | 77:869cf507173a | 77 | |
| emilmont | 77:869cf507173a | 78 | /** @defgroup FLASH_Latency |
| emilmont | 77:869cf507173a | 79 | * @{ |
| emilmont | 77:869cf507173a | 80 | */ |
| emilmont | 77:869cf507173a | 81 | #define FLASH_Latency_0 ((uint8_t)0x00) /*!< FLASH Zero Latency cycle */ |
| emilmont | 77:869cf507173a | 82 | #define FLASH_Latency_1 ((uint8_t)0x01) /*!< FLASH One Latency cycle */ |
| emilmont | 77:869cf507173a | 83 | |
| emilmont | 77:869cf507173a | 84 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \ |
| emilmont | 77:869cf507173a | 85 | ((LATENCY) == FLASH_Latency_1)) |
| emilmont | 77:869cf507173a | 86 | /** |
| emilmont | 77:869cf507173a | 87 | * @} |
| emilmont | 77:869cf507173a | 88 | */ |
| emilmont | 77:869cf507173a | 89 | |
| emilmont | 77:869cf507173a | 90 | /** @defgroup FLASH_Interrupts |
| emilmont | 77:869cf507173a | 91 | * @{ |
| emilmont | 77:869cf507173a | 92 | */ |
| emilmont | 77:869cf507173a | 93 | |
| emilmont | 77:869cf507173a | 94 | #define FLASH_IT_EOP FLASH_PECR_EOPIE /*!< End of programming interrupt source */ |
| emilmont | 77:869cf507173a | 95 | #define FLASH_IT_ERR FLASH_PECR_ERRIE /*!< Error interrupt source */ |
| emilmont | 77:869cf507173a | 96 | #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFCFFFF) == 0x00000000) && (((IT) != 0x00000000))) |
| emilmont | 77:869cf507173a | 97 | /** |
| emilmont | 77:869cf507173a | 98 | * @} |
| emilmont | 77:869cf507173a | 99 | */ |
| emilmont | 77:869cf507173a | 100 | |
| emilmont | 77:869cf507173a | 101 | /** @defgroup FLASH_Address |
| emilmont | 77:869cf507173a | 102 | * @{ |
| emilmont | 77:869cf507173a | 103 | */ |
| emilmont | 77:869cf507173a | 104 | |
| emilmont | 77:869cf507173a | 105 | #define IS_FLASH_DATA_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08080000) && ((ADDRESS) <= 0x08083FFF)) |
| emilmont | 77:869cf507173a | 106 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF)) |
| emilmont | 77:869cf507173a | 107 | |
| emilmont | 77:869cf507173a | 108 | /** |
| emilmont | 77:869cf507173a | 109 | * @} |
| emilmont | 77:869cf507173a | 110 | */ |
| emilmont | 77:869cf507173a | 111 | |
| emilmont | 77:869cf507173a | 112 | /** @defgroup Option_Bytes_Write_Protection |
| emilmont | 77:869cf507173a | 113 | * @{ |
| emilmont | 77:869cf507173a | 114 | */ |
| emilmont | 77:869cf507173a | 115 | |
| emilmont | 77:869cf507173a | 116 | #define OB_WRP_Pages0to15 ((uint32_t)0x00000001) /* Write protection of Sector0 */ |
| emilmont | 77:869cf507173a | 117 | #define OB_WRP_Pages16to31 ((uint32_t)0x00000002) /* Write protection of Sector1 */ |
| emilmont | 77:869cf507173a | 118 | #define OB_WRP_Pages32to47 ((uint32_t)0x00000004) /* Write protection of Sector2 */ |
| emilmont | 77:869cf507173a | 119 | #define OB_WRP_Pages48to63 ((uint32_t)0x00000008) /* Write protection of Sector3 */ |
| emilmont | 77:869cf507173a | 120 | #define OB_WRP_Pages64to79 ((uint32_t)0x00000010) /* Write protection of Sector4 */ |
| emilmont | 77:869cf507173a | 121 | #define OB_WRP_Pages80to95 ((uint32_t)0x00000020) /* Write protection of Sector5 */ |
| emilmont | 77:869cf507173a | 122 | #define OB_WRP_Pages96to111 ((uint32_t)0x00000040) /* Write protection of Sector6 */ |
| emilmont | 77:869cf507173a | 123 | #define OB_WRP_Pages112to127 ((uint32_t)0x00000080) /* Write protection of Sector7 */ |
| emilmont | 77:869cf507173a | 124 | #define OB_WRP_Pages128to143 ((uint32_t)0x00000100) /* Write protection of Sector8 */ |
| emilmont | 77:869cf507173a | 125 | #define OB_WRP_Pages144to159 ((uint32_t)0x00000200) /* Write protection of Sector9 */ |
| emilmont | 77:869cf507173a | 126 | #define OB_WRP_Pages160to175 ((uint32_t)0x00000400) /* Write protection of Sector10 */ |
| emilmont | 77:869cf507173a | 127 | #define OB_WRP_Pages176to191 ((uint32_t)0x00000800) /* Write protection of Sector11 */ |
| emilmont | 77:869cf507173a | 128 | #define OB_WRP_Pages192to207 ((uint32_t)0x00001000) /* Write protection of Sector12 */ |
| emilmont | 77:869cf507173a | 129 | #define OB_WRP_Pages208to223 ((uint32_t)0x00002000) /* Write protection of Sector13 */ |
| emilmont | 77:869cf507173a | 130 | #define OB_WRP_Pages224to239 ((uint32_t)0x00004000) /* Write protection of Sector14 */ |
| emilmont | 77:869cf507173a | 131 | #define OB_WRP_Pages240to255 ((uint32_t)0x00008000) /* Write protection of Sector15 */ |
| emilmont | 77:869cf507173a | 132 | #define OB_WRP_Pages256to271 ((uint32_t)0x00010000) /* Write protection of Sector16 */ |
| emilmont | 77:869cf507173a | 133 | #define OB_WRP_Pages272to287 ((uint32_t)0x00020000) /* Write protection of Sector17 */ |
| emilmont | 77:869cf507173a | 134 | #define OB_WRP_Pages288to303 ((uint32_t)0x00040000) /* Write protection of Sector18 */ |
| emilmont | 77:869cf507173a | 135 | #define OB_WRP_Pages304to319 ((uint32_t)0x00080000) /* Write protection of Sector19 */ |
| emilmont | 77:869cf507173a | 136 | #define OB_WRP_Pages320to335 ((uint32_t)0x00100000) /* Write protection of Sector20 */ |
| emilmont | 77:869cf507173a | 137 | #define OB_WRP_Pages336to351 ((uint32_t)0x00200000) /* Write protection of Sector21 */ |
| emilmont | 77:869cf507173a | 138 | #define OB_WRP_Pages352to367 ((uint32_t)0x00400000) /* Write protection of Sector22 */ |
| emilmont | 77:869cf507173a | 139 | #define OB_WRP_Pages368to383 ((uint32_t)0x00800000) /* Write protection of Sector23 */ |
| emilmont | 77:869cf507173a | 140 | #define OB_WRP_Pages384to399 ((uint32_t)0x01000000) /* Write protection of Sector24 */ |
| emilmont | 77:869cf507173a | 141 | #define OB_WRP_Pages400to415 ((uint32_t)0x02000000) /* Write protection of Sector25 */ |
| emilmont | 77:869cf507173a | 142 | #define OB_WRP_Pages416to431 ((uint32_t)0x04000000) /* Write protection of Sector26 */ |
| emilmont | 77:869cf507173a | 143 | #define OB_WRP_Pages432to447 ((uint32_t)0x08000000) /* Write protection of Sector27 */ |
| emilmont | 77:869cf507173a | 144 | #define OB_WRP_Pages448to463 ((uint32_t)0x10000000) /* Write protection of Sector28 */ |
| emilmont | 77:869cf507173a | 145 | #define OB_WRP_Pages464to479 ((uint32_t)0x20000000) /* Write protection of Sector29 */ |
| emilmont | 77:869cf507173a | 146 | #define OB_WRP_Pages480to495 ((uint32_t)0x40000000) /* Write protection of Sector30 */ |
| emilmont | 77:869cf507173a | 147 | #define OB_WRP_Pages496to511 ((uint32_t)0x80000000) /* Write protection of Sector31 */ |
| emilmont | 77:869cf507173a | 148 | |
| emilmont | 77:869cf507173a | 149 | #define OB_WRP_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */ |
| emilmont | 77:869cf507173a | 150 | |
| emilmont | 77:869cf507173a | 151 | #define OB_WRP1_Pages512to527 ((uint32_t)0x00000001) /* Write protection of Sector32 */ |
| emilmont | 77:869cf507173a | 152 | #define OB_WRP1_Pages528to543 ((uint32_t)0x00000002) /* Write protection of Sector33 */ |
| emilmont | 77:869cf507173a | 153 | #define OB_WRP1_Pages544to559 ((uint32_t)0x00000004) /* Write protection of Sector34 */ |
| emilmont | 77:869cf507173a | 154 | #define OB_WRP1_Pages560to575 ((uint32_t)0x00000008) /* Write protection of Sector35 */ |
| emilmont | 77:869cf507173a | 155 | #define OB_WRP1_Pages576to591 ((uint32_t)0x00000010) /* Write protection of Sector36 */ |
| emilmont | 77:869cf507173a | 156 | #define OB_WRP1_Pages592to607 ((uint32_t)0x00000020) /* Write protection of Sector37 */ |
| emilmont | 77:869cf507173a | 157 | #define OB_WRP1_Pages608to623 ((uint32_t)0x00000040) /* Write protection of Sector38 */ |
| emilmont | 77:869cf507173a | 158 | #define OB_WRP1_Pages624to639 ((uint32_t)0x00000080) /* Write protection of Sector39 */ |
| emilmont | 77:869cf507173a | 159 | #define OB_WRP1_Pages640to655 ((uint32_t)0x00000100) /* Write protection of Sector40 */ |
| emilmont | 77:869cf507173a | 160 | #define OB_WRP1_Pages656to671 ((uint32_t)0x00000200) /* Write protection of Sector41 */ |
| emilmont | 77:869cf507173a | 161 | #define OB_WRP1_Pages672to687 ((uint32_t)0x00000400) /* Write protection of Sector42 */ |
| emilmont | 77:869cf507173a | 162 | #define OB_WRP1_Pages688to703 ((uint32_t)0x00000800) /* Write protection of Sector43 */ |
| emilmont | 77:869cf507173a | 163 | #define OB_WRP1_Pages704to719 ((uint32_t)0x00001000) /* Write protection of Sector44 */ |
| emilmont | 77:869cf507173a | 164 | #define OB_WRP1_Pages720to735 ((uint32_t)0x00002000) /* Write protection of Sector45 */ |
| emilmont | 77:869cf507173a | 165 | #define OB_WRP1_Pages736to751 ((uint32_t)0x00004000) /* Write protection of Sector46 */ |
| emilmont | 77:869cf507173a | 166 | #define OB_WRP1_Pages752to767 ((uint32_t)0x00008000) /* Write protection of Sector47 */ |
| emilmont | 77:869cf507173a | 167 | #define OB_WRP1_Pages768to783 ((uint32_t)0x00010000) /* Write protection of Sector48 */ |
| emilmont | 77:869cf507173a | 168 | #define OB_WRP1_Pages784to799 ((uint32_t)0x00020000) /* Write protection of Sector49 */ |
| emilmont | 77:869cf507173a | 169 | #define OB_WRP1_Pages800to815 ((uint32_t)0x00040000) /* Write protection of Sector50 */ |
| emilmont | 77:869cf507173a | 170 | #define OB_WRP1_Pages816to831 ((uint32_t)0x00080000) /* Write protection of Sector51 */ |
| emilmont | 77:869cf507173a | 171 | #define OB_WRP1_Pages832to847 ((uint32_t)0x00100000) /* Write protection of Sector52 */ |
| emilmont | 77:869cf507173a | 172 | #define OB_WRP1_Pages848to863 ((uint32_t)0x00200000) /* Write protection of Sector53 */ |
| emilmont | 77:869cf507173a | 173 | #define OB_WRP1_Pages864to879 ((uint32_t)0x00400000) /* Write protection of Sector54 */ |
| emilmont | 77:869cf507173a | 174 | #define OB_WRP1_Pages880to895 ((uint32_t)0x00800000) /* Write protection of Sector55 */ |
| emilmont | 77:869cf507173a | 175 | #define OB_WRP1_Pages896to911 ((uint32_t)0x01000000) /* Write protection of Sector56 */ |
| emilmont | 77:869cf507173a | 176 | #define OB_WRP1_Pages912to927 ((uint32_t)0x02000000) /* Write protection of Sector57 */ |
| emilmont | 77:869cf507173a | 177 | #define OB_WRP1_Pages928to943 ((uint32_t)0x04000000) /* Write protection of Sector58 */ |
| emilmont | 77:869cf507173a | 178 | #define OB_WRP1_Pages944to959 ((uint32_t)0x08000000) /* Write protection of Sector59 */ |
| emilmont | 77:869cf507173a | 179 | #define OB_WRP1_Pages960to975 ((uint32_t)0x10000000) /* Write protection of Sector60 */ |
| emilmont | 77:869cf507173a | 180 | #define OB_WRP1_Pages976to991 ((uint32_t)0x20000000) /* Write protection of Sector61 */ |
| emilmont | 77:869cf507173a | 181 | #define OB_WRP1_Pages992to1007 ((uint32_t)0x40000000) /* Write protection of Sector62 */ |
| emilmont | 77:869cf507173a | 182 | #define OB_WRP1_Pages1008to1023 ((uint32_t)0x80000000) /* Write protection of Sector63 */ |
| emilmont | 77:869cf507173a | 183 | |
| emilmont | 77:869cf507173a | 184 | #define OB_WRP1_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */ |
| emilmont | 77:869cf507173a | 185 | |
| emilmont | 77:869cf507173a | 186 | #define OB_WRP2_Pages1024to1039 ((uint32_t)0x00000001) /* Write protection of Sector64 */ |
| emilmont | 77:869cf507173a | 187 | #define OB_WRP2_Pages1040to1055 ((uint32_t)0x00000002) /* Write protection of Sector65 */ |
| emilmont | 77:869cf507173a | 188 | #define OB_WRP2_Pages1056to1071 ((uint32_t)0x00000004) /* Write protection of Sector66 */ |
| emilmont | 77:869cf507173a | 189 | #define OB_WRP2_Pages1072to1087 ((uint32_t)0x00000008) /* Write protection of Sector67 */ |
| emilmont | 77:869cf507173a | 190 | #define OB_WRP2_Pages1088to1103 ((uint32_t)0x00000010) /* Write protection of Sector68 */ |
| emilmont | 77:869cf507173a | 191 | #define OB_WRP2_Pages1104to1119 ((uint32_t)0x00000020) /* Write protection of Sector69 */ |
| emilmont | 77:869cf507173a | 192 | #define OB_WRP2_Pages1120to1135 ((uint32_t)0x00000040) /* Write protection of Sector70 */ |
| emilmont | 77:869cf507173a | 193 | #define OB_WRP2_Pages1136to1151 ((uint32_t)0x00000080) /* Write protection of Sector71 */ |
| emilmont | 77:869cf507173a | 194 | #define OB_WRP2_Pages1152to1167 ((uint32_t)0x00000100) /* Write protection of Sector72 */ |
| emilmont | 77:869cf507173a | 195 | #define OB_WRP2_Pages1168to1183 ((uint32_t)0x00000200) /* Write protection of Sector73 */ |
| emilmont | 77:869cf507173a | 196 | #define OB_WRP2_Pages1184to1199 ((uint32_t)0x00000400) /* Write protection of Sector74 */ |
| emilmont | 77:869cf507173a | 197 | #define OB_WRP2_Pages1200to1215 ((uint32_t)0x00000800) /* Write protection of Sector75 */ |
| emilmont | 77:869cf507173a | 198 | #define OB_WRP2_Pages1216to1231 ((uint32_t)0x00001000) /* Write protection of Sector76 */ |
| emilmont | 77:869cf507173a | 199 | #define OB_WRP2_Pages1232to1247 ((uint32_t)0x00002000) /* Write protection of Sector77 */ |
| emilmont | 77:869cf507173a | 200 | #define OB_WRP2_Pages1248to1263 ((uint32_t)0x00004000) /* Write protection of Sector78 */ |
| emilmont | 77:869cf507173a | 201 | #define OB_WRP2_Pages1264to1279 ((uint32_t)0x00008000) /* Write protection of Sector79 */ |
| emilmont | 77:869cf507173a | 202 | #define OB_WRP2_Pages1280to1295 ((uint32_t)0x00010000) /* Write protection of Sector80 */ |
| emilmont | 77:869cf507173a | 203 | #define OB_WRP2_Pages1296to1311 ((uint32_t)0x00020000) /* Write protection of Sector81 */ |
| emilmont | 77:869cf507173a | 204 | #define OB_WRP2_Pages1312to1327 ((uint32_t)0x00040000) /* Write protection of Sector82 */ |
| emilmont | 77:869cf507173a | 205 | #define OB_WRP2_Pages1328to1343 ((uint32_t)0x00080000) /* Write protection of Sector83 */ |
| emilmont | 77:869cf507173a | 206 | #define OB_WRP2_Pages1344to1359 ((uint32_t)0x00100000) /* Write protection of Sector84 */ |
| emilmont | 77:869cf507173a | 207 | #define OB_WRP2_Pages1360to1375 ((uint32_t)0x00200000) /* Write protection of Sector85 */ |
| emilmont | 77:869cf507173a | 208 | #define OB_WRP2_Pages1376to1391 ((uint32_t)0x00400000) /* Write protection of Sector86 */ |
| emilmont | 77:869cf507173a | 209 | #define OB_WRP2_Pages1392to1407 ((uint32_t)0x00800000) /* Write protection of Sector87 */ |
| emilmont | 77:869cf507173a | 210 | #define OB_WRP2_Pages1408to1423 ((uint32_t)0x01000000) /* Write protection of Sector88 */ |
| emilmont | 77:869cf507173a | 211 | #define OB_WRP2_Pages1424to1439 ((uint32_t)0x02000000) /* Write protection of Sector89 */ |
| emilmont | 77:869cf507173a | 212 | #define OB_WRP2_Pages1440to1455 ((uint32_t)0x04000000) /* Write protection of Sector90 */ |
| emilmont | 77:869cf507173a | 213 | #define OB_WRP2_Pages1456to1471 ((uint32_t)0x08000000) /* Write protection of Sector91 */ |
| emilmont | 77:869cf507173a | 214 | #define OB_WRP2_Pages1472to1487 ((uint32_t)0x10000000) /* Write protection of Sector92 */ |
| emilmont | 77:869cf507173a | 215 | #define OB_WRP2_Pages1488to1503 ((uint32_t)0x20000000) /* Write protection of Sector93 */ |
| emilmont | 77:869cf507173a | 216 | #define OB_WRP2_Pages1504to1519 ((uint32_t)0x40000000) /* Write protection of Sector94 */ |
| emilmont | 77:869cf507173a | 217 | #define OB_WRP2_Pages1520to1535 ((uint32_t)0x80000000) /* Write protection of Sector95 */ |
| emilmont | 77:869cf507173a | 218 | |
| emilmont | 77:869cf507173a | 219 | #define OB_WRP2_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */ |
| emilmont | 77:869cf507173a | 220 | |
| emilmont | 77:869cf507173a | 221 | #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000)) |
| emilmont | 77:869cf507173a | 222 | |
| emilmont | 77:869cf507173a | 223 | /** |
| emilmont | 77:869cf507173a | 224 | * @} |
| emilmont | 77:869cf507173a | 225 | */ |
| emilmont | 77:869cf507173a | 226 | |
| emilmont | 77:869cf507173a | 227 | |
| emilmont | 77:869cf507173a | 228 | /** @defgroup Selection_Protection_Mode |
| emilmont | 77:869cf507173a | 229 | * @{ |
| emilmont | 77:869cf507173a | 230 | */ |
| emilmont | 77:869cf507173a | 231 | #define OB_PcROP_Enable ((uint16_t)0x0100) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */ |
| emilmont | 77:869cf507173a | 232 | #define OB_PcROP_Disable ((uint16_t)0x0000) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */ |
| emilmont | 77:869cf507173a | 233 | #define IS_OB_PCROP_SELECT(OB_PcROP) (((OB_PcROP) == OB_PcROP_Enable) || ((OB_PcROP) == OB_PcROP_Disable)) |
| emilmont | 77:869cf507173a | 234 | /** |
| emilmont | 77:869cf507173a | 235 | * @} |
| emilmont | 77:869cf507173a | 236 | */ |
| emilmont | 77:869cf507173a | 237 | |
| emilmont | 77:869cf507173a | 238 | |
| emilmont | 77:869cf507173a | 239 | /** @defgroup Option_Bytes_Read_Protection |
| emilmont | 77:869cf507173a | 240 | * @{ |
| emilmont | 77:869cf507173a | 241 | */ |
| emilmont | 77:869cf507173a | 242 | |
| emilmont | 77:869cf507173a | 243 | /** |
| emilmont | 77:869cf507173a | 244 | * @brief Read Protection Level |
| emilmont | 77:869cf507173a | 245 | */ |
| emilmont | 77:869cf507173a | 246 | #define OB_RDP_Level_0 ((uint8_t)0xAA) |
| emilmont | 77:869cf507173a | 247 | #define OB_RDP_Level_1 ((uint8_t)0xBB) |
| emilmont | 77:869cf507173a | 248 | /*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /* Warning: When enabling read protection level 2 |
| emilmont | 77:869cf507173a | 249 | it's no more possible to go back to level 1 or 0 */ |
| emilmont | 77:869cf507173a | 250 | |
| emilmont | 77:869cf507173a | 251 | #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\ |
| emilmont | 77:869cf507173a | 252 | ((LEVEL) == OB_RDP_Level_1))/*||\ |
| emilmont | 77:869cf507173a | 253 | ((LEVEL) == OB_RDP_Level_2))*/ |
| emilmont | 77:869cf507173a | 254 | /** |
| emilmont | 77:869cf507173a | 255 | * @} |
| emilmont | 77:869cf507173a | 256 | */ |
| emilmont | 77:869cf507173a | 257 | |
| emilmont | 77:869cf507173a | 258 | /** @defgroup Option_Bytes_IWatchdog |
| emilmont | 77:869cf507173a | 259 | * @{ |
| emilmont | 77:869cf507173a | 260 | */ |
| emilmont | 77:869cf507173a | 261 | |
| emilmont | 77:869cf507173a | 262 | #define OB_IWDG_SW ((uint8_t)0x10) /*!< Software WDG selected */ |
| emilmont | 77:869cf507173a | 263 | #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware WDG selected */ |
| emilmont | 77:869cf507173a | 264 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
| emilmont | 77:869cf507173a | 265 | |
| emilmont | 77:869cf507173a | 266 | /** |
| emilmont | 77:869cf507173a | 267 | * @} |
| emilmont | 77:869cf507173a | 268 | */ |
| emilmont | 77:869cf507173a | 269 | |
| emilmont | 77:869cf507173a | 270 | /** @defgroup Option_Bytes_nRST_STOP |
| emilmont | 77:869cf507173a | 271 | * @{ |
| emilmont | 77:869cf507173a | 272 | */ |
| emilmont | 77:869cf507173a | 273 | |
| emilmont | 77:869cf507173a | 274 | #define OB_STOP_NoRST ((uint8_t)0x20) /*!< No reset generated when entering in STOP */ |
| emilmont | 77:869cf507173a | 275 | #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */ |
| emilmont | 77:869cf507173a | 276 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) |
| emilmont | 77:869cf507173a | 277 | |
| emilmont | 77:869cf507173a | 278 | /** |
| emilmont | 77:869cf507173a | 279 | * @} |
| emilmont | 77:869cf507173a | 280 | */ |
| emilmont | 77:869cf507173a | 281 | |
| emilmont | 77:869cf507173a | 282 | /** @defgroup Option_Bytes_nRST_STDBY |
| emilmont | 77:869cf507173a | 283 | * @{ |
| emilmont | 77:869cf507173a | 284 | */ |
| emilmont | 77:869cf507173a | 285 | |
| emilmont | 77:869cf507173a | 286 | #define OB_STDBY_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STANDBY */ |
| emilmont | 77:869cf507173a | 287 | #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ |
| emilmont | 77:869cf507173a | 288 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) |
| emilmont | 77:869cf507173a | 289 | |
| emilmont | 77:869cf507173a | 290 | /** |
| emilmont | 77:869cf507173a | 291 | * @} |
| emilmont | 77:869cf507173a | 292 | */ |
| emilmont | 77:869cf507173a | 293 | |
| emilmont | 77:869cf507173a | 294 | /** @defgroup Option_Bytes_BOOT |
| emilmont | 77:869cf507173a | 295 | * @{ |
| emilmont | 77:869cf507173a | 296 | */ |
| emilmont | 77:869cf507173a | 297 | |
| emilmont | 77:869cf507173a | 298 | #define OB_BOOT_BANK2 ((uint8_t)0x00) /*!< At startup, if boot pins are set in boot from user Flash position |
| emilmont | 77:869cf507173a | 299 | and this parameter is selected the device will boot from Bank 2 |
| emilmont | 77:869cf507173a | 300 | or Bank 1, depending on the activation of the bank */ |
| emilmont | 77:869cf507173a | 301 | #define OB_BOOT_BANK1 ((uint8_t)0x80) /*!< At startup, if boot pins are set in boot from user Flash position |
| emilmont | 77:869cf507173a | 302 | and this parameter is selected the device will boot from Bank1(Default) */ |
| emilmont | 77:869cf507173a | 303 | #define IS_OB_BOOT_BANK(BANK) (((BANK) == OB_BOOT_BANK2) || ((BANK) == OB_BOOT_BANK1)) |
| emilmont | 77:869cf507173a | 304 | |
| emilmont | 77:869cf507173a | 305 | /** |
| emilmont | 77:869cf507173a | 306 | * @} |
| emilmont | 77:869cf507173a | 307 | */ |
| emilmont | 77:869cf507173a | 308 | |
| emilmont | 77:869cf507173a | 309 | /** @defgroup Option_Bytes_BOR_Level |
| emilmont | 77:869cf507173a | 310 | * @{ |
| emilmont | 77:869cf507173a | 311 | */ |
| emilmont | 77:869cf507173a | 312 | |
| emilmont | 77:869cf507173a | 313 | #define OB_BOR_OFF ((uint8_t)0x00) /*!< BOR is disabled at power down, the reset is asserted when the VDD |
| emilmont | 77:869cf507173a | 314 | power supply reaches the PDR(Power Down Reset) threshold (1.5V) */ |
| emilmont | 77:869cf507173a | 315 | #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */ |
| emilmont | 77:869cf507173a | 316 | #define OB_BOR_LEVEL2 ((uint8_t)0x09) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */ |
| emilmont | 77:869cf507173a | 317 | #define OB_BOR_LEVEL3 ((uint8_t)0x0A) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */ |
| emilmont | 77:869cf507173a | 318 | #define OB_BOR_LEVEL4 ((uint8_t)0x0B) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */ |
| emilmont | 77:869cf507173a | 319 | #define OB_BOR_LEVEL5 ((uint8_t)0x0C) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */ |
| emilmont | 77:869cf507173a | 320 | |
| emilmont | 77:869cf507173a | 321 | #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_OFF) || \ |
| emilmont | 77:869cf507173a | 322 | ((LEVEL) == OB_BOR_LEVEL1) || \ |
| emilmont | 77:869cf507173a | 323 | ((LEVEL) == OB_BOR_LEVEL2) || \ |
| emilmont | 77:869cf507173a | 324 | ((LEVEL) == OB_BOR_LEVEL3) || \ |
| emilmont | 77:869cf507173a | 325 | ((LEVEL) == OB_BOR_LEVEL4) || \ |
| emilmont | 77:869cf507173a | 326 | ((LEVEL) == OB_BOR_LEVEL5)) |
| emilmont | 77:869cf507173a | 327 | |
| emilmont | 77:869cf507173a | 328 | /** |
| emilmont | 77:869cf507173a | 329 | * @} |
| emilmont | 77:869cf507173a | 330 | */ |
| emilmont | 77:869cf507173a | 331 | |
| emilmont | 77:869cf507173a | 332 | /** @defgroup FLASH_Flags |
| emilmont | 77:869cf507173a | 333 | * @{ |
| emilmont | 77:869cf507173a | 334 | */ |
| emilmont | 77:869cf507173a | 335 | |
| emilmont | 77:869cf507173a | 336 | #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ |
| emilmont | 77:869cf507173a | 337 | #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Programming flag */ |
| emilmont | 77:869cf507173a | 338 | #define FLASH_FLAG_ENDHV FLASH_SR_ENHV /*!< FLASH End of High Voltage flag */ |
| emilmont | 77:869cf507173a | 339 | #define FLASH_FLAG_READY FLASH_SR_READY /*!< FLASH Ready flag after low power mode */ |
| emilmont | 77:869cf507173a | 340 | #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protected error flag */ |
| emilmont | 77:869cf507173a | 341 | #define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming Alignment error flag */ |
| emilmont | 77:869cf507173a | 342 | #define FLASH_FLAG_SIZERR FLASH_SR_SIZERR /*!< FLASH Size error flag */ |
| emilmont | 77:869cf507173a | 343 | #define FLASH_FLAG_OPTVERR FLASH_SR_OPTVERR /*!< FLASH Option Validity error flag */ |
| emilmont | 77:869cf507173a | 344 | #define FLASH_FLAG_OPTVERRUSR FLASH_SR_OPTVERRUSR /*!< FLASH Option User Validity error flag */ |
| emilmont | 77:869cf507173a | 345 | #define FLASH_FLAG_RDERR FLASH_SR_RDERR /*!< FLASH Read protected error flag |
| emilmont | 77:869cf507173a | 346 | (available only in STM32L1XX_MDP devices) */ |
| emilmont | 77:869cf507173a | 347 | |
| emilmont | 77:869cf507173a | 348 | #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFC0FD) == 0x00000000) && ((FLAG) != 0x00000000)) |
| emilmont | 77:869cf507173a | 349 | |
| emilmont | 77:869cf507173a | 350 | #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \ |
| emilmont | 77:869cf507173a | 351 | ((FLAG) == FLASH_FLAG_ENDHV) || ((FLAG) == FLASH_FLAG_READY ) || \ |
| emilmont | 77:869cf507173a | 352 | ((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR ) || \ |
| emilmont | 77:869cf507173a | 353 | ((FLAG) == FLASH_FLAG_SIZERR) || ((FLAG) == FLASH_FLAG_OPTVERR) || \ |
| emilmont | 77:869cf507173a | 354 | ((FLAG) == FLASH_FLAG_OPTVERRUSR) || ((FLAG) == FLASH_FLAG_RDERR)) |
| emilmont | 77:869cf507173a | 355 | /** |
| emilmont | 77:869cf507173a | 356 | * @} |
| emilmont | 77:869cf507173a | 357 | */ |
| emilmont | 77:869cf507173a | 358 | |
| emilmont | 77:869cf507173a | 359 | /** @defgroup FLASH_Keys |
| emilmont | 77:869cf507173a | 360 | * @{ |
| emilmont | 77:869cf507173a | 361 | */ |
| emilmont | 77:869cf507173a | 362 | |
| emilmont | 77:869cf507173a | 363 | #define FLASH_PDKEY1 ((uint32_t)0x04152637) /*!< Flash power down key1 */ |
| emilmont | 77:869cf507173a | 364 | #define FLASH_PDKEY2 ((uint32_t)0xFAFBFCFD) /*!< Flash power down key2: used with FLASH_PDKEY1 |
| emilmont | 77:869cf507173a | 365 | to unlock the RUN_PD bit in FLASH_ACR */ |
| emilmont | 77:869cf507173a | 366 | |
| emilmont | 77:869cf507173a | 367 | #define FLASH_PEKEY1 ((uint32_t)0x89ABCDEF) /*!< Flash program erase key1 */ |
| emilmont | 77:869cf507173a | 368 | #define FLASH_PEKEY2 ((uint32_t)0x02030405) /*!< Flash program erase key: used with FLASH_PEKEY2 |
| emilmont | 77:869cf507173a | 369 | to unlock the write access to the FLASH_PECR register and |
| emilmont | 77:869cf507173a | 370 | data EEPROM */ |
| emilmont | 77:869cf507173a | 371 | |
| emilmont | 77:869cf507173a | 372 | #define FLASH_PRGKEY1 ((uint32_t)0x8C9DAEBF) /*!< Flash program memory key1 */ |
| emilmont | 77:869cf507173a | 373 | #define FLASH_PRGKEY2 ((uint32_t)0x13141516) /*!< Flash program memory key2: used with FLASH_PRGKEY2 |
| emilmont | 77:869cf507173a | 374 | to unlock the program memory */ |
| emilmont | 77:869cf507173a | 375 | |
| emilmont | 77:869cf507173a | 376 | #define FLASH_OPTKEY1 ((uint32_t)0xFBEAD9C8) /*!< Flash option key1 */ |
| emilmont | 77:869cf507173a | 377 | #define FLASH_OPTKEY2 ((uint32_t)0x24252627) /*!< Flash option key2: used with FLASH_OPTKEY1 to |
| emilmont | 77:869cf507173a | 378 | unlock the write access to the option byte block */ |
| emilmont | 77:869cf507173a | 379 | /** |
| emilmont | 77:869cf507173a | 380 | * @} |
| emilmont | 77:869cf507173a | 381 | */ |
| emilmont | 77:869cf507173a | 382 | |
| emilmont | 77:869cf507173a | 383 | /** @defgroup Timeout_definition |
| emilmont | 77:869cf507173a | 384 | * @{ |
| emilmont | 77:869cf507173a | 385 | */ |
| emilmont | 77:869cf507173a | 386 | #define FLASH_ER_PRG_TIMEOUT ((uint32_t)0x8000) |
| emilmont | 77:869cf507173a | 387 | |
| emilmont | 77:869cf507173a | 388 | /** |
| emilmont | 77:869cf507173a | 389 | * @} |
| emilmont | 77:869cf507173a | 390 | */ |
| emilmont | 77:869cf507173a | 391 | |
| emilmont | 77:869cf507173a | 392 | /** @defgroup CMSIS_Legacy |
| emilmont | 77:869cf507173a | 393 | * @{ |
| emilmont | 77:869cf507173a | 394 | */ |
| emilmont | 77:869cf507173a | 395 | #if defined ( __ICCARM__ ) |
| emilmont | 77:869cf507173a | 396 | #define InterruptType_ACTLR_DISMCYCINT_Msk IntType_ACTLR_DISMCYCINT_Msk |
| emilmont | 77:869cf507173a | 397 | #endif |
| emilmont | 77:869cf507173a | 398 | /** |
| emilmont | 77:869cf507173a | 399 | * @} |
| emilmont | 77:869cf507173a | 400 | */ |
| emilmont | 77:869cf507173a | 401 | /** |
| emilmont | 77:869cf507173a | 402 | * @} |
| emilmont | 77:869cf507173a | 403 | */ |
| emilmont | 77:869cf507173a | 404 | |
| emilmont | 77:869cf507173a | 405 | /* Exported macro ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 406 | /* Exported functions ------------------------------------------------------- */ |
| emilmont | 77:869cf507173a | 407 | |
| emilmont | 77:869cf507173a | 408 | /** |
| emilmont | 77:869cf507173a | 409 | * @brief FLASH memory functions that can be executed from FLASH. |
| emilmont | 77:869cf507173a | 410 | */ |
| emilmont | 77:869cf507173a | 411 | /* FLASH Interface configuration functions ************************************/ |
| emilmont | 77:869cf507173a | 412 | void FLASH_SetLatency(uint32_t FLASH_Latency); |
| emilmont | 77:869cf507173a | 413 | void FLASH_PrefetchBufferCmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 414 | void FLASH_ReadAccess64Cmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 415 | void FLASH_SLEEPPowerDownCmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 416 | |
| emilmont | 77:869cf507173a | 417 | /* FLASH Memory Programming functions *****************************************/ |
| emilmont | 77:869cf507173a | 418 | void FLASH_Unlock(void); |
| emilmont | 77:869cf507173a | 419 | void FLASH_Lock(void); |
| emilmont | 77:869cf507173a | 420 | FLASH_Status FLASH_ErasePage(uint32_t Page_Address); |
| emilmont | 77:869cf507173a | 421 | FLASH_Status FLASH_FastProgramWord(uint32_t Address, uint32_t Data); |
| emilmont | 77:869cf507173a | 422 | |
| emilmont | 77:869cf507173a | 423 | /* DATA EEPROM Programming functions ******************************************/ |
| emilmont | 77:869cf507173a | 424 | void DATA_EEPROM_Unlock(void); |
| emilmont | 77:869cf507173a | 425 | void DATA_EEPROM_Lock(void); |
| emilmont | 77:869cf507173a | 426 | void DATA_EEPROM_FixedTimeProgramCmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 427 | FLASH_Status DATA_EEPROM_EraseByte(uint32_t Address); |
| emilmont | 77:869cf507173a | 428 | FLASH_Status DATA_EEPROM_EraseHalfWord(uint32_t Address); |
| emilmont | 77:869cf507173a | 429 | FLASH_Status DATA_EEPROM_EraseWord(uint32_t Address); |
| emilmont | 77:869cf507173a | 430 | FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data); |
| emilmont | 77:869cf507173a | 431 | FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data); |
| emilmont | 77:869cf507173a | 432 | FLASH_Status DATA_EEPROM_FastProgramWord(uint32_t Address, uint32_t Data); |
| emilmont | 77:869cf507173a | 433 | FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data); |
| emilmont | 77:869cf507173a | 434 | FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data); |
| emilmont | 77:869cf507173a | 435 | FLASH_Status DATA_EEPROM_ProgramWord(uint32_t Address, uint32_t Data); |
| emilmont | 77:869cf507173a | 436 | |
| emilmont | 77:869cf507173a | 437 | /* Option Bytes Programming functions *****************************************/ |
| emilmont | 77:869cf507173a | 438 | void FLASH_OB_Unlock(void); |
| emilmont | 77:869cf507173a | 439 | void FLASH_OB_Lock(void); |
| emilmont | 77:869cf507173a | 440 | void FLASH_OB_Launch(void); |
| emilmont | 77:869cf507173a | 441 | FLASH_Status FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 442 | FLASH_Status FLASH_OB_WRP1Config(uint32_t OB_WRP1, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 443 | FLASH_Status FLASH_OB_WRP2Config(uint32_t OB_WRP2, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 444 | FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP); |
| emilmont | 77:869cf507173a | 445 | FLASH_Status FLASH_OB_PCROPConfig(uint32_t OB_WRP, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 446 | FLASH_Status FLASH_OB_PCROP1Config(uint32_t OB_WRP1, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 447 | FLASH_Status FLASH_OB_PCROPSelectionConfig(uint16_t OB_PcROP); |
| emilmont | 77:869cf507173a | 448 | FLASH_Status FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY); |
| emilmont | 77:869cf507173a | 449 | FLASH_Status FLASH_OB_BORConfig(uint8_t OB_BOR); |
| emilmont | 77:869cf507173a | 450 | FLASH_Status FLASH_OB_BootConfig(uint8_t OB_BOOT); |
| emilmont | 77:869cf507173a | 451 | uint8_t FLASH_OB_GetUser(void); |
| emilmont | 77:869cf507173a | 452 | uint32_t FLASH_OB_GetWRP(void); |
| emilmont | 77:869cf507173a | 453 | uint32_t FLASH_OB_GetWRP1(void); |
| emilmont | 77:869cf507173a | 454 | uint32_t FLASH_OB_GetWRP2(void); |
| emilmont | 77:869cf507173a | 455 | FlagStatus FLASH_OB_GetRDP(void); |
| emilmont | 77:869cf507173a | 456 | FlagStatus FLASH_OB_GetSPRMOD(void); |
| emilmont | 77:869cf507173a | 457 | uint8_t FLASH_OB_GetBOR(void); |
| emilmont | 77:869cf507173a | 458 | |
| emilmont | 77:869cf507173a | 459 | /* Interrupts and flags management functions **********************************/ |
| emilmont | 77:869cf507173a | 460 | void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 461 | FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG); |
| emilmont | 77:869cf507173a | 462 | void FLASH_ClearFlag(uint32_t FLASH_FLAG); |
| emilmont | 77:869cf507173a | 463 | FLASH_Status FLASH_GetStatus(void); |
| emilmont | 77:869cf507173a | 464 | FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout); |
| emilmont | 77:869cf507173a | 465 | |
| emilmont | 77:869cf507173a | 466 | /** |
| emilmont | 77:869cf507173a | 467 | * @brief FLASH memory functions that should be executed from internal SRAM. |
| emilmont | 77:869cf507173a | 468 | * These functions are defined inside the "stm32l1xx_flash_ramfunc.c" |
| emilmont | 77:869cf507173a | 469 | * file. |
| emilmont | 77:869cf507173a | 470 | */ |
| emilmont | 77:869cf507173a | 471 | __RAM_FUNC FLASH_RUNPowerDownCmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 472 | __RAM_FUNC FLASH_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2); |
| emilmont | 77:869cf507173a | 473 | __RAM_FUNC FLASH_ProgramHalfPage(uint32_t Address, uint32_t* pBuffer); |
| emilmont | 77:869cf507173a | 474 | __RAM_FUNC FLASH_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2); |
| emilmont | 77:869cf507173a | 475 | __RAM_FUNC DATA_EEPROM_EraseDoubleWord(uint32_t Address); |
| emilmont | 77:869cf507173a | 476 | __RAM_FUNC DATA_EEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data); |
| emilmont | 77:869cf507173a | 477 | |
| emilmont | 77:869cf507173a | 478 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 479 | } |
| emilmont | 77:869cf507173a | 480 | #endif |
| emilmont | 77:869cf507173a | 481 | |
| emilmont | 77:869cf507173a | 482 | #endif /* __STM32L1xx_FLASH_H */ |
| emilmont | 77:869cf507173a | 483 | |
| emilmont | 77:869cf507173a | 484 | /** |
| emilmont | 77:869cf507173a | 485 | * @} |
| emilmont | 77:869cf507173a | 486 | */ |
| emilmont | 77:869cf507173a | 487 | |
| emilmont | 77:869cf507173a | 488 | /** |
| emilmont | 77:869cf507173a | 489 | * @} |
| emilmont | 77:869cf507173a | 490 | */ |
| emilmont | 77:869cf507173a | 491 | |
| emilmont | 77:869cf507173a | 492 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |