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TARGET_NUCLEO_L053R8/stm32l0xx_hal_crc.h@86:4f9a848d74c7, 2014-06-25 (annotated)

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
84:0b3ab51c8877 
version_2.0

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bogdanm 84:0b3ab51c8877 1 /**
bogdanm 84:0b3ab51c8877 2 ******************************************************************************
bogdanm 84:0b3ab51c8877 3 * @file stm32l0xx_hal_crc.h
bogdanm 84:0b3ab51c8877 4 * @author MCD Application Team
bogdanm 84:0b3ab51c8877 5 * @version V1.0.0
bogdanm 84:0b3ab51c8877 6 * @date 22-April-2014
bogdanm 84:0b3ab51c8877 7 * @brief Header file of CRC HAL module.
bogdanm 84:0b3ab51c8877 8 ******************************************************************************
bogdanm 84:0b3ab51c8877 9 * @attention
bogdanm 84:0b3ab51c8877 10 *
bogdanm 84:0b3ab51c8877 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 84:0b3ab51c8877 12 *
bogdanm 84:0b3ab51c8877 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 84:0b3ab51c8877 14 * are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 84:0b3ab51c8877 16 * this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 84:0b3ab51c8877 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 84:0b3ab51c8877 19 * and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 84:0b3ab51c8877 21 * may be used to endorse or promote products derived from this software
bogdanm 84:0b3ab51c8877 22 * without specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 84:0b3ab51c8877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 84:0b3ab51c8877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 84:0b3ab51c8877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 84:0b3ab51c8877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 84:0b3ab51c8877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 84:0b3ab51c8877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 84:0b3ab51c8877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 34 *
bogdanm 84:0b3ab51c8877 35 ******************************************************************************
bogdanm 84:0b3ab51c8877 36 */
bogdanm 84:0b3ab51c8877 37
bogdanm 84:0b3ab51c8877 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 84:0b3ab51c8877 39 #ifndef __STM32L0xx_HAL_CRC_H
bogdanm 84:0b3ab51c8877 40 #define __STM32L0xx_HAL_CRC_H
bogdanm 84:0b3ab51c8877 41
bogdanm 84:0b3ab51c8877 42 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 43 extern "C" {
bogdanm 84:0b3ab51c8877 44 #endif
bogdanm 84:0b3ab51c8877 45
bogdanm 84:0b3ab51c8877 46 /* Includes ------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 47 #include "stm32l0xx_hal_def.h"
bogdanm 84:0b3ab51c8877 48
bogdanm 84:0b3ab51c8877 49 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 84:0b3ab51c8877 50 * @{
bogdanm 84:0b3ab51c8877 51 */
bogdanm 84:0b3ab51c8877 52
bogdanm 84:0b3ab51c8877 53 /** @addtogroup CRC
bogdanm 84:0b3ab51c8877 54 * @{
bogdanm 84:0b3ab51c8877 55 */
bogdanm 84:0b3ab51c8877 56
bogdanm 84:0b3ab51c8877 57 /* Exported types ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 58
bogdanm 84:0b3ab51c8877 59 /**
bogdanm 84:0b3ab51c8877 60 * @brief CRC HAL State Structure definition
bogdanm 84:0b3ab51c8877 61 */
bogdanm 84:0b3ab51c8877 62 typedef enum
bogdanm 84:0b3ab51c8877 63 {
bogdanm 84:0b3ab51c8877 64 HAL_CRC_STATE_RESET = 0x00, /*!< CRC Reset State */
bogdanm 84:0b3ab51c8877 65 HAL_CRC_STATE_READY = 0x01, /*!< CRC Initialized and ready for use */
bogdanm 84:0b3ab51c8877 66 HAL_CRC_STATE_BUSY = 0x02, /*!< CRC process is ongoing */
bogdanm 84:0b3ab51c8877 67 HAL_CRC_STATE_TIMEOUT = 0x03, /*!< CRC Timeout State */
bogdanm 84:0b3ab51c8877 68 HAL_CRC_STATE_ERROR = 0x04 /*!< CRC Error State */
bogdanm 84:0b3ab51c8877 69 }HAL_CRC_StateTypeDef;
bogdanm 84:0b3ab51c8877 70
bogdanm 84:0b3ab51c8877 71 /**
bogdanm 84:0b3ab51c8877 72 * @brief CRC Init Structure definition
bogdanm 84:0b3ab51c8877 73 */
bogdanm 84:0b3ab51c8877 74 typedef struct
bogdanm 84:0b3ab51c8877 75 {
bogdanm 84:0b3ab51c8877 76 uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
bogdanm 84:0b3ab51c8877 77 If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
bogdanm 84:0b3ab51c8877 78 X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1.
bogdanm 84:0b3ab51c8877 79 In that case, there is no need to set GeneratingPolynomial field.
bogdanm 84:0b3ab51c8877 80 If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set */
bogdanm 84:0b3ab51c8877 81
bogdanm 84:0b3ab51c8877 82 uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used.
bogdanm 84:0b3ab51c8877 83 If set to DEFAULT_INIT_VALUE_ENABLE, resort to default
bogdanm 84:0b3ab51c8877 84 0xFFFFFFFF value. In that case, there is no need to set InitValue field.
bogdanm 84:0b3ab51c8877 85 If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set */
bogdanm 84:0b3ab51c8877 86
bogdanm 84:0b3ab51c8877 87 uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial. 7, 8, 16 or 32-bit long value for a polynomial degree
bogdanm 84:0b3ab51c8877 88 respectively equal to 7, 8, 16 or 32. This field is written in normal representation,
bogdanm 84:0b3ab51c8877 89 e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65.
bogdanm 84:0b3ab51c8877 90 No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE */
bogdanm 84:0b3ab51c8877 91
bogdanm 84:0b3ab51c8877 92 uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Size_Definitions and indicates CRC length.
bogdanm 84:0b3ab51c8877 93 Value can be either one of
bogdanm 84:0b3ab51c8877 94 CRC_POLYLENGTH_32B (32-bit CRC)
bogdanm 84:0b3ab51c8877 95 CRC_POLYLENGTH_16B (16-bit CRC)
bogdanm 84:0b3ab51c8877 96 CRC_POLYLENGTH_8B (8-bit CRC)
bogdanm 84:0b3ab51c8877 97 CRC_POLYLENGTH_7B (7-bit CRC) */
bogdanm 84:0b3ab51c8877 98
bogdanm 84:0b3ab51c8877 99 uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
bogdanm 84:0b3ab51c8877 100 is set to DEFAULT_INIT_VALUE_ENABLE */
bogdanm 84:0b3ab51c8877 101
bogdanm 84:0b3ab51c8877 102 uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref Input_Data_Inversion and specifies input data inversion mode.
bogdanm 84:0b3ab51c8877 103 Can be either one of the following values
bogdanm 84:0b3ab51c8877 104 CRC_INPUTDATA_INVERSION_NONE no input data inversion
bogdanm 84:0b3ab51c8877 105 CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2
bogdanm 84:0b3ab51c8877 106 CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C
bogdanm 84:0b3ab51c8877 107 CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */
bogdanm 84:0b3ab51c8877 108
bogdanm 84:0b3ab51c8877 109 uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
bogdanm 84:0b3ab51c8877 110 Can be either
bogdanm 84:0b3ab51c8877 111 CRC_OUTPUTDATA_INVERSION_DISABLED no CRC inversion, or
bogdanm 84:0b3ab51c8877 112 CRC_OUTPUTDATA_INVERSION_ENABLED CRC 0x11223344 is converted into 0x22CC4488 */
bogdanm 84:0b3ab51c8877 113 }CRC_InitTypeDef;
bogdanm 84:0b3ab51c8877 114
bogdanm 84:0b3ab51c8877 115
bogdanm 84:0b3ab51c8877 116 /**
bogdanm 84:0b3ab51c8877 117 * @brief CRC Handle Structure definition
bogdanm 84:0b3ab51c8877 118 */
bogdanm 84:0b3ab51c8877 119 typedef struct
bogdanm 84:0b3ab51c8877 120 {
bogdanm 84:0b3ab51c8877 121 CRC_TypeDef *Instance; /*!< Register base address */
bogdanm 84:0b3ab51c8877 122
bogdanm 84:0b3ab51c8877 123 CRC_InitTypeDef Init; /*!< CRC configuration parameters */
bogdanm 84:0b3ab51c8877 124
bogdanm 84:0b3ab51c8877 125 HAL_LockTypeDef Lock; /*!< CRC Locking object */
bogdanm 84:0b3ab51c8877 126
bogdanm 84:0b3ab51c8877 127 __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
bogdanm 84:0b3ab51c8877 128
bogdanm 84:0b3ab51c8877 129 uint32_t InputDataFormat; /*!< This parameter is a value of @ref Input_Buffer_Format and specifies input data format.
bogdanm 84:0b3ab51c8877 130 Can be either
bogdanm 84:0b3ab51c8877 131 CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data)
bogdanm 84:0b3ab51c8877 132 CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data)
bogdanm 84:0b3ab51c8877 133 CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bits data)
bogdanm 84:0b3ab51c8877 134 Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error
bogdanm 84:0b3ab51c8877 135 must occur if InputBufferFormat is not one of the three values listed above */
bogdanm 84:0b3ab51c8877 136 }CRC_HandleTypeDef;
bogdanm 84:0b3ab51c8877 137
bogdanm 84:0b3ab51c8877 138 /* Exported constants --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 139
bogdanm 84:0b3ab51c8877 140 /** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
bogdanm 84:0b3ab51c8877 141 * @{
bogdanm 84:0b3ab51c8877 142 */
bogdanm 84:0b3ab51c8877 143 #define DEFAULT_CRC32_POLY 0x04C11DB7
bogdanm 84:0b3ab51c8877 144
bogdanm 84:0b3ab51c8877 145 /**
bogdanm 84:0b3ab51c8877 146 * @}
bogdanm 84:0b3ab51c8877 147 */
bogdanm 84:0b3ab51c8877 148
bogdanm 84:0b3ab51c8877 149 /** @defgroup CRC_Default_InitValue Default CRC computation initialization value
bogdanm 84:0b3ab51c8877 150 * @{
bogdanm 84:0b3ab51c8877 151 */
bogdanm 84:0b3ab51c8877 152 #define DEFAULT_CRC_INITVALUE 0xFFFFFFFF
bogdanm 84:0b3ab51c8877 153
bogdanm 84:0b3ab51c8877 154 /**
bogdanm 84:0b3ab51c8877 155 * @}
bogdanm 84:0b3ab51c8877 156 */
bogdanm 84:0b3ab51c8877 157
bogdanm 84:0b3ab51c8877 158 /** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
bogdanm 84:0b3ab51c8877 159 * @{
bogdanm 84:0b3ab51c8877 160 */
bogdanm 84:0b3ab51c8877 161 #define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00)
bogdanm 84:0b3ab51c8877 162 #define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01)
bogdanm 84:0b3ab51c8877 163 #define IS_DEFAULT_POLYNOMIAL(DEFAULT) (((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE) || \
bogdanm 84:0b3ab51c8877 164 ((DEFAULT) == DEFAULT_POLYNOMIAL_DISABLE))
bogdanm 84:0b3ab51c8877 165
bogdanm 84:0b3ab51c8877 166 /**
bogdanm 84:0b3ab51c8877 167 * @}
bogdanm 84:0b3ab51c8877 168 */
bogdanm 84:0b3ab51c8877 169
bogdanm 84:0b3ab51c8877 170 /** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
bogdanm 84:0b3ab51c8877 171 * @{
bogdanm 84:0b3ab51c8877 172 */
bogdanm 84:0b3ab51c8877 173 #define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00)
bogdanm 84:0b3ab51c8877 174 #define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01)
bogdanm 84:0b3ab51c8877 175 #define IS_DEFAULT_INIT_VALUE(VALUE) (((VALUE) == DEFAULT_INIT_VALUE_ENABLE) || \
bogdanm 84:0b3ab51c8877 176 ((VALUE) == DEFAULT_INIT_VALUE_DISABLE))
bogdanm 84:0b3ab51c8877 177
bogdanm 84:0b3ab51c8877 178 /**
bogdanm 84:0b3ab51c8877 179 * @}
bogdanm 84:0b3ab51c8877 180 */
bogdanm 84:0b3ab51c8877 181
bogdanm 84:0b3ab51c8877 182 /** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP
bogdanm 84:0b3ab51c8877 183 * @{
bogdanm 84:0b3ab51c8877 184 */
bogdanm 84:0b3ab51c8877 185 #define CRC_POLYLENGTH_32B ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 186 #define CRC_POLYLENGTH_16B ((uint32_t)CRC_CR_POLYSIZE_0)
bogdanm 84:0b3ab51c8877 187 #define CRC_POLYLENGTH_8B ((uint32_t)CRC_CR_POLYSIZE_1)
bogdanm 84:0b3ab51c8877 188 #define CRC_POLYLENGTH_7B ((uint32_t)CRC_CR_POLYSIZE)
bogdanm 84:0b3ab51c8877 189 #define IS_CRC_POL_LENGTH(LENGTH) (((LENGTH) == CRC_POLYLENGTH_32B) || \
bogdanm 84:0b3ab51c8877 190 ((LENGTH) == CRC_POLYLENGTH_16B) || \
bogdanm 84:0b3ab51c8877 191 ((LENGTH) == CRC_POLYLENGTH_8B) || \
bogdanm 84:0b3ab51c8877 192 ((LENGTH) == CRC_POLYLENGTH_7B))
bogdanm 84:0b3ab51c8877 193 /**
bogdanm 84:0b3ab51c8877 194 * @}
bogdanm 84:0b3ab51c8877 195 */
bogdanm 84:0b3ab51c8877 196
bogdanm 84:0b3ab51c8877 197 /** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
bogdanm 84:0b3ab51c8877 198 * @{
bogdanm 84:0b3ab51c8877 199 */
bogdanm 84:0b3ab51c8877 200 #define HAL_CRC_LENGTH_32B 32
bogdanm 84:0b3ab51c8877 201 #define HAL_CRC_LENGTH_16B 16
bogdanm 84:0b3ab51c8877 202 #define HAL_CRC_LENGTH_8B 8
bogdanm 84:0b3ab51c8877 203 #define HAL_CRC_LENGTH_7B 7
bogdanm 84:0b3ab51c8877 204
bogdanm 84:0b3ab51c8877 205 /**
bogdanm 84:0b3ab51c8877 206 * @}
bogdanm 84:0b3ab51c8877 207 */
bogdanm 84:0b3ab51c8877 208
bogdanm 84:0b3ab51c8877 209 /** @defgroup Input_Data_Inversion Input Data Inversion Modes
bogdanm 84:0b3ab51c8877 210 * @{
bogdanm 84:0b3ab51c8877 211 */
bogdanm 84:0b3ab51c8877 212 #define CRC_INPUTDATA_INVERSION_NONE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 213 #define CRC_INPUTDATA_INVERSION_BYTE ((uint32_t)CRC_CR_REV_IN_0)
bogdanm 84:0b3ab51c8877 214 #define CRC_INPUTDATA_INVERSION_HALFWORD ((uint32_t)CRC_CR_REV_IN_1)
bogdanm 84:0b3ab51c8877 215 #define CRC_INPUTDATA_INVERSION_WORD ((uint32_t)CRC_CR_REV_IN)
bogdanm 84:0b3ab51c8877 216 #define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \
bogdanm 84:0b3ab51c8877 217 ((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \
bogdanm 84:0b3ab51c8877 218 ((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
bogdanm 84:0b3ab51c8877 219 ((MODE) == CRC_INPUTDATA_INVERSION_WORD))
bogdanm 84:0b3ab51c8877 220 /**
bogdanm 84:0b3ab51c8877 221 * @}
bogdanm 84:0b3ab51c8877 222 */
bogdanm 84:0b3ab51c8877 223
bogdanm 84:0b3ab51c8877 224 /** @defgroup Output_Data_Inversion Output Data Inversion Modes
bogdanm 84:0b3ab51c8877 225 * @{
bogdanm 84:0b3ab51c8877 226 */
bogdanm 84:0b3ab51c8877 227 #define CRC_OUTPUTDATA_INVERSION_DISABLED ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 228 #define CRC_OUTPUTDATA_INVERSION_ENABLED ((uint32_t)CRC_CR_REV_OUT)
bogdanm 84:0b3ab51c8877 229 #define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLED) || \
bogdanm 84:0b3ab51c8877 230 ((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLED))
bogdanm 84:0b3ab51c8877 231 /**
bogdanm 84:0b3ab51c8877 232 * @}
bogdanm 84:0b3ab51c8877 233 */
bogdanm 84:0b3ab51c8877 234
bogdanm 84:0b3ab51c8877 235 /** @defgroup Input_Buffer_Format Input Buffer Format
bogdanm 84:0b3ab51c8877 236 * @{
bogdanm 84:0b3ab51c8877 237 */
bogdanm 84:0b3ab51c8877 238 /* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
bogdanm 84:0b3ab51c8877 239 * an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
bogdanm 84:0b3ab51c8877 240 * to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
bogdanm 84:0b3ab51c8877 241 * the CRC APIs to provide a correct result */
bogdanm 84:0b3ab51c8877 242 #define CRC_INPUTDATA_FORMAT_UNDEFINED ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 243 #define CRC_INPUTDATA_FORMAT_BYTES ((uint32_t)0x00000001)
bogdanm 84:0b3ab51c8877 244 #define CRC_INPUTDATA_FORMAT_HALFWORDS ((uint32_t)0x00000002)
bogdanm 84:0b3ab51c8877 245 #define CRC_INPUTDATA_FORMAT_WORDS ((uint32_t)0x00000003)
bogdanm 84:0b3ab51c8877 246 #define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \
bogdanm 84:0b3ab51c8877 247 ((FORMAT) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
bogdanm 84:0b3ab51c8877 248 ((FORMAT) == CRC_INPUTDATA_FORMAT_WORDS))
bogdanm 84:0b3ab51c8877 249 /**
bogdanm 84:0b3ab51c8877 250 * @}
bogdanm 84:0b3ab51c8877 251 */
bogdanm 84:0b3ab51c8877 252
bogdanm 84:0b3ab51c8877 253 /* Exported macro ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 254
bogdanm 84:0b3ab51c8877 255 /** @defgroup CRC_Exported_Macro
bogdanm 84:0b3ab51c8877 256 * @{
bogdanm 84:0b3ab51c8877 257 */
bogdanm 84:0b3ab51c8877 258
bogdanm 84:0b3ab51c8877 259 /** @brief Reset CRC handle state
bogdanm 84:0b3ab51c8877 260 * @param __HANDLE__: CRC handle
bogdanm 84:0b3ab51c8877 261 * @retval None
bogdanm 84:0b3ab51c8877 262 */
bogdanm 84:0b3ab51c8877 263 #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
bogdanm 84:0b3ab51c8877 264
bogdanm 84:0b3ab51c8877 265 /**
bogdanm 84:0b3ab51c8877 266 * @brief Check that instance is correctly set to CRC
bogdanm 84:0b3ab51c8877 267 * @param __PERIPH__: CRC handle instance
bogdanm 84:0b3ab51c8877 268 * @retval None.
bogdanm 84:0b3ab51c8877 269 */
bogdanm 84:0b3ab51c8877 270 #define IS_CRC_INSTANCE(__PERIPH__) ((__PERIPH__) == CRC)
bogdanm 84:0b3ab51c8877 271
bogdanm 84:0b3ab51c8877 272 /**
bogdanm 84:0b3ab51c8877 273 * @brief Reset CRC Data Register.
bogdanm 84:0b3ab51c8877 274 * @param __HANDLE__: CRC handle
bogdanm 84:0b3ab51c8877 275 * @retval None.
bogdanm 84:0b3ab51c8877 276 */
bogdanm 84:0b3ab51c8877 277 #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
bogdanm 84:0b3ab51c8877 278
bogdanm 84:0b3ab51c8877 279 /**
bogdanm 84:0b3ab51c8877 280 * @brief Set CRC INIT non-default value
bogdanm 84:0b3ab51c8877 281 * @param __HANDLE__ : CRC handle
bogdanm 84:0b3ab51c8877 282 * @param __INIT__ : 32-bit initial value
bogdanm 84:0b3ab51c8877 283 * @retval None.
bogdanm 84:0b3ab51c8877 284 */
bogdanm 84:0b3ab51c8877 285 #define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
bogdanm 84:0b3ab51c8877 286
bogdanm 84:0b3ab51c8877 287
bogdanm 84:0b3ab51c8877 288 /**
bogdanm 84:0b3ab51c8877 289 * @brief Set CRC output reversal
bogdanm 84:0b3ab51c8877 290 * @param __HANDLE__ : CRC handle
bogdanm 84:0b3ab51c8877 291 * @retval None.
bogdanm 84:0b3ab51c8877 292 */
bogdanm 84:0b3ab51c8877 293 #define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT)
bogdanm 84:0b3ab51c8877 294
bogdanm 84:0b3ab51c8877 295
bogdanm 84:0b3ab51c8877 296 /**
bogdanm 84:0b3ab51c8877 297 * @brief Unset CRC output reversal
bogdanm 84:0b3ab51c8877 298 * @param __HANDLE__ : CRC handle
bogdanm 84:0b3ab51c8877 299 * @retval None.
bogdanm 84:0b3ab51c8877 300 */
bogdanm 84:0b3ab51c8877 301 #define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT))
bogdanm 84:0b3ab51c8877 302
bogdanm 84:0b3ab51c8877 303
bogdanm 84:0b3ab51c8877 304 /**
bogdanm 84:0b3ab51c8877 305 * @}
bogdanm 84:0b3ab51c8877 306 */
bogdanm 84:0b3ab51c8877 307
bogdanm 84:0b3ab51c8877 308
bogdanm 84:0b3ab51c8877 309 /* Include CRC HAL Extension module */
bogdanm 84:0b3ab51c8877 310 #include "stm32l0xx_hal_crc_ex.h"
bogdanm 84:0b3ab51c8877 311
bogdanm 84:0b3ab51c8877 312 /* Exported functions --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 313
bogdanm 84:0b3ab51c8877 314 /* Initialization and de-initialization functions ****************************/
bogdanm 84:0b3ab51c8877 315 HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
bogdanm 84:0b3ab51c8877 316 HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc);
bogdanm 84:0b3ab51c8877 317 void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
bogdanm 84:0b3ab51c8877 318 void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
bogdanm 84:0b3ab51c8877 319 HAL_StatusTypeDef HAL_CRC_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode);
bogdanm 84:0b3ab51c8877 320 HAL_StatusTypeDef HAL_CRC_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode);
bogdanm 84:0b3ab51c8877 321
bogdanm 84:0b3ab51c8877 322 /* Peripheral Control functions ***********************************************/
bogdanm 84:0b3ab51c8877 323 uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
bogdanm 84:0b3ab51c8877 324 uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
bogdanm 84:0b3ab51c8877 325
bogdanm 84:0b3ab51c8877 326 /* Peripheral State and Error functions ***************************************/
bogdanm 84:0b3ab51c8877 327 HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
bogdanm 84:0b3ab51c8877 328
bogdanm 84:0b3ab51c8877 329 /**
bogdanm 84:0b3ab51c8877 330 * @}
bogdanm 84:0b3ab51c8877 331 */
bogdanm 84:0b3ab51c8877 332
bogdanm 84:0b3ab51c8877 333 /**
bogdanm 84:0b3ab51c8877 334 * @}
bogdanm 84:0b3ab51c8877 335 */
bogdanm 84:0b3ab51c8877 336
bogdanm 84:0b3ab51c8877 337 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 338 }
bogdanm 84:0b3ab51c8877 339 #endif
bogdanm 84:0b3ab51c8877 340
bogdanm 84:0b3ab51c8877 341 #endif /* __STM32L0xx_HAL_CRC_H */
bogdanm 84:0b3ab51c8877 342
bogdanm 84:0b3ab51c8877 343 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/