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TARGET_LPC812/TOOLCHAIN_ARM_MICRO/LPC812.sct@64:e3affc9e7238, 2013-08-05 (annotated)
- Committer:
- bogdanm
- Date:
- Mon Aug 05 12:28:09 2013 +0300
- Revision:
- 64:e3affc9e7238
- Parent:
- LPC812/uARM/LPC812.sct@62:7e6c9f46b3bd
- Child:
- 65:5798e58a58b1
New build system structure, new target (LPC1347), bug fixes (I2C read/write errors, LPC11U24 memory map and others)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 62:7e6c9f46b3bd | 1 | |
| emilmont | 62:7e6c9f46b3bd | 2 | LR_IROM1 0x00000000 0x4000 { ; load region size_region (32k) |
| emilmont | 62:7e6c9f46b3bd | 3 | ER_IROM1 0x00000000 0x4000 { ; load address = execution address |
| emilmont | 62:7e6c9f46b3bd | 4 | *.o (RESET, +First) |
| emilmont | 62:7e6c9f46b3bd | 5 | *(InRoot$$Sections) |
| emilmont | 62:7e6c9f46b3bd | 6 | .ANY (+RO) |
| emilmont | 62:7e6c9f46b3bd | 7 | } |
| emilmont | 62:7e6c9f46b3bd | 8 | ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 |
| emilmont | 62:7e6c9f46b3bd | 9 | ; 8KB - 0xC0 = 0xF40 |
| emilmont | 62:7e6c9f46b3bd | 10 | RW_IRAM1 0x100000C0 0xF40 { |
| emilmont | 62:7e6c9f46b3bd | 11 | .ANY (+RW +ZI) |
| emilmont | 62:7e6c9f46b3bd | 12 | } |
| emilmont | 62:7e6c9f46b3bd | 13 | } |
| emilmont | 62:7e6c9f46b3bd | 14 |