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TARGET_NUCLEO_L152RE/stm32l1xx_adc.h@77:869cf507173a, 2014-02-14 (annotated)
- Committer:
- emilmont
- Date:
- Fri Feb 14 14:36:43 2014 +0000
- Revision:
- 77:869cf507173a
- Child:
- 81:7d30d6019079
Release 77 of the mbed library
Main changes:
* Add target NUCLEO_F030R8
* Add target NUCLEO_F401RE
* Add target NUCLEO_F103RB
* Add target NUCLEO_L152RE
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 77:869cf507173a | 1 | /** |
| emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 3 | * @file stm32l1xx_adc.h |
| emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
| emilmont | 77:869cf507173a | 5 | * @version V1.3.0 |
| emilmont | 77:869cf507173a | 6 | * @date 31-January-2014 |
| emilmont | 77:869cf507173a | 7 | * @brief This file contains all the functions prototypes for the ADC firmware |
| emilmont | 77:869cf507173a | 8 | * library. |
| emilmont | 77:869cf507173a | 9 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 10 | * @attention |
| emilmont | 77:869cf507173a | 11 | * |
| emilmont | 77:869cf507173a | 12 | * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> |
| emilmont | 77:869cf507173a | 13 | * |
| emilmont | 77:869cf507173a | 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
| emilmont | 77:869cf507173a | 15 | * You may not use this file except in compliance with the License. |
| emilmont | 77:869cf507173a | 16 | * You may obtain a copy of the License at: |
| emilmont | 77:869cf507173a | 17 | * |
| emilmont | 77:869cf507173a | 18 | * http://www.st.com/software_license_agreement_liberty_v2 |
| emilmont | 77:869cf507173a | 19 | * |
| emilmont | 77:869cf507173a | 20 | * Unless required by applicable law or agreed to in writing, software |
| emilmont | 77:869cf507173a | 21 | * distributed under the License is distributed on an "AS IS" BASIS, |
| emilmont | 77:869cf507173a | 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| emilmont | 77:869cf507173a | 23 | * See the License for the specific language governing permissions and |
| emilmont | 77:869cf507173a | 24 | * limitations under the License. |
| emilmont | 77:869cf507173a | 25 | * |
| emilmont | 77:869cf507173a | 26 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 27 | */ |
| emilmont | 77:869cf507173a | 28 | |
| emilmont | 77:869cf507173a | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| emilmont | 77:869cf507173a | 30 | #ifndef __STM32L1xx_ADC_H |
| emilmont | 77:869cf507173a | 31 | #define __STM32L1xx_ADC_H |
| emilmont | 77:869cf507173a | 32 | |
| emilmont | 77:869cf507173a | 33 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 34 | extern "C" { |
| emilmont | 77:869cf507173a | 35 | #endif |
| emilmont | 77:869cf507173a | 36 | |
| emilmont | 77:869cf507173a | 37 | /* Includes ------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 38 | #include "stm32l1xx.h" |
| emilmont | 77:869cf507173a | 39 | |
| emilmont | 77:869cf507173a | 40 | /** @addtogroup STM32L1xx_StdPeriph_Driver |
| emilmont | 77:869cf507173a | 41 | * @{ |
| emilmont | 77:869cf507173a | 42 | */ |
| emilmont | 77:869cf507173a | 43 | |
| emilmont | 77:869cf507173a | 44 | /** @addtogroup ADC |
| emilmont | 77:869cf507173a | 45 | * @{ |
| emilmont | 77:869cf507173a | 46 | */ |
| emilmont | 77:869cf507173a | 47 | |
| emilmont | 77:869cf507173a | 48 | /* Exported types ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 49 | |
| emilmont | 77:869cf507173a | 50 | /** |
| emilmont | 77:869cf507173a | 51 | * @brief ADC Init structure definition |
| emilmont | 77:869cf507173a | 52 | */ |
| emilmont | 77:869cf507173a | 53 | |
| emilmont | 77:869cf507173a | 54 | typedef struct |
| emilmont | 77:869cf507173a | 55 | { |
| emilmont | 77:869cf507173a | 56 | uint32_t ADC_Resolution; /*!< Selects the resolution of the conversion. |
| emilmont | 77:869cf507173a | 57 | This parameter can be a value of @ref ADC_Resolution */ |
| emilmont | 77:869cf507173a | 58 | |
| emilmont | 77:869cf507173a | 59 | FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in |
| emilmont | 77:869cf507173a | 60 | Scan (multichannel) or Single (one channel) mode. |
| emilmont | 77:869cf507173a | 61 | This parameter can be set to ENABLE or DISABLE */ |
| emilmont | 77:869cf507173a | 62 | |
| emilmont | 77:869cf507173a | 63 | FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in |
| emilmont | 77:869cf507173a | 64 | Continuous or Single mode. |
| emilmont | 77:869cf507173a | 65 | This parameter can be set to ENABLE or DISABLE. */ |
| emilmont | 77:869cf507173a | 66 | |
| emilmont | 77:869cf507173a | 67 | uint32_t ADC_ExternalTrigConvEdge; /*!< Selects the external trigger Edge and enables the |
| emilmont | 77:869cf507173a | 68 | trigger of a regular group. This parameter can be a value |
| emilmont | 77:869cf507173a | 69 | of @ref ADC_external_trigger_edge_for_regular_channels_conversion */ |
| emilmont | 77:869cf507173a | 70 | |
| emilmont | 77:869cf507173a | 71 | uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog |
| emilmont | 77:869cf507173a | 72 | to digital conversion of regular channels. This parameter |
| emilmont | 77:869cf507173a | 73 | can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */ |
| emilmont | 77:869cf507173a | 74 | |
| emilmont | 77:869cf507173a | 75 | uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right. |
| emilmont | 77:869cf507173a | 76 | This parameter can be a value of @ref ADC_data_align */ |
| emilmont | 77:869cf507173a | 77 | |
| emilmont | 77:869cf507173a | 78 | uint8_t ADC_NbrOfConversion; /*!< Specifies the number of ADC conversions that will be done |
| emilmont | 77:869cf507173a | 79 | using the sequencer for regular channel group. |
| emilmont | 77:869cf507173a | 80 | This parameter must range from 1 to 27. */ |
| emilmont | 77:869cf507173a | 81 | }ADC_InitTypeDef; |
| emilmont | 77:869cf507173a | 82 | |
| emilmont | 77:869cf507173a | 83 | typedef struct |
| emilmont | 77:869cf507173a | 84 | { |
| emilmont | 77:869cf507173a | 85 | uint32_t ADC_Prescaler; /*!< Selects the ADC prescaler. |
| emilmont | 77:869cf507173a | 86 | This parameter can be a value |
| emilmont | 77:869cf507173a | 87 | of @ref ADC_Prescaler */ |
| emilmont | 77:869cf507173a | 88 | }ADC_CommonInitTypeDef; |
| emilmont | 77:869cf507173a | 89 | |
| emilmont | 77:869cf507173a | 90 | /* Exported constants --------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 91 | |
| emilmont | 77:869cf507173a | 92 | /** @defgroup ADC_Exported_Constants |
| emilmont | 77:869cf507173a | 93 | * @{ |
| emilmont | 77:869cf507173a | 94 | */ |
| emilmont | 77:869cf507173a | 95 | #define IS_ADC_ALL_PERIPH(PERIPH) ((PERIPH) == ADC1) |
| emilmont | 77:869cf507173a | 96 | #define IS_ADC_DMA_PERIPH(PERIPH) ((PERIPH) == ADC1) |
| emilmont | 77:869cf507173a | 97 | |
| emilmont | 77:869cf507173a | 98 | /** @defgroup ADC_Power_down_during_Idle_and_or_Delay_phase |
| emilmont | 77:869cf507173a | 99 | * @{ |
| emilmont | 77:869cf507173a | 100 | */ |
| emilmont | 77:869cf507173a | 101 | #define ADC_PowerDown_Delay ((uint32_t)0x00010000) |
| emilmont | 77:869cf507173a | 102 | #define ADC_PowerDown_Idle ((uint32_t)0x00020000) |
| emilmont | 77:869cf507173a | 103 | #define ADC_PowerDown_Idle_Delay ((uint32_t)0x00030000) |
| emilmont | 77:869cf507173a | 104 | |
| emilmont | 77:869cf507173a | 105 | #define IS_ADC_POWER_DOWN(DWON) (((DWON) == ADC_PowerDown_Delay) || \ |
| emilmont | 77:869cf507173a | 106 | ((DWON) == ADC_PowerDown_Idle) || \ |
| emilmont | 77:869cf507173a | 107 | ((DWON) == ADC_PowerDown_Idle_Delay)) |
| emilmont | 77:869cf507173a | 108 | /** |
| emilmont | 77:869cf507173a | 109 | * @} |
| emilmont | 77:869cf507173a | 110 | */ |
| emilmont | 77:869cf507173a | 111 | |
| emilmont | 77:869cf507173a | 112 | |
| emilmont | 77:869cf507173a | 113 | /** @defgroup ADC_Prescaler |
| emilmont | 77:869cf507173a | 114 | * @{ |
| emilmont | 77:869cf507173a | 115 | */ |
| emilmont | 77:869cf507173a | 116 | #define ADC_Prescaler_Div1 ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 117 | #define ADC_Prescaler_Div2 ((uint32_t)0x00010000) |
| emilmont | 77:869cf507173a | 118 | #define ADC_Prescaler_Div4 ((uint32_t)0x00020000) |
| emilmont | 77:869cf507173a | 119 | |
| emilmont | 77:869cf507173a | 120 | #define IS_ADC_PRESCALER(PRESCALER) (((PRESCALER) == ADC_Prescaler_Div1) || \ |
| emilmont | 77:869cf507173a | 121 | ((PRESCALER) == ADC_Prescaler_Div2) || \ |
| emilmont | 77:869cf507173a | 122 | ((PRESCALER) == ADC_Prescaler_Div4)) |
| emilmont | 77:869cf507173a | 123 | /** |
| emilmont | 77:869cf507173a | 124 | * @} |
| emilmont | 77:869cf507173a | 125 | */ |
| emilmont | 77:869cf507173a | 126 | |
| emilmont | 77:869cf507173a | 127 | |
| emilmont | 77:869cf507173a | 128 | |
| emilmont | 77:869cf507173a | 129 | /** @defgroup ADC_Resolution |
| emilmont | 77:869cf507173a | 130 | * @{ |
| emilmont | 77:869cf507173a | 131 | */ |
| emilmont | 77:869cf507173a | 132 | #define ADC_Resolution_12b ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 133 | #define ADC_Resolution_10b ((uint32_t)0x01000000) |
| emilmont | 77:869cf507173a | 134 | #define ADC_Resolution_8b ((uint32_t)0x02000000) |
| emilmont | 77:869cf507173a | 135 | #define ADC_Resolution_6b ((uint32_t)0x03000000) |
| emilmont | 77:869cf507173a | 136 | |
| emilmont | 77:869cf507173a | 137 | #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \ |
| emilmont | 77:869cf507173a | 138 | ((RESOLUTION) == ADC_Resolution_10b) || \ |
| emilmont | 77:869cf507173a | 139 | ((RESOLUTION) == ADC_Resolution_8b) || \ |
| emilmont | 77:869cf507173a | 140 | ((RESOLUTION) == ADC_Resolution_6b)) |
| emilmont | 77:869cf507173a | 141 | |
| emilmont | 77:869cf507173a | 142 | /** |
| emilmont | 77:869cf507173a | 143 | * @} |
| emilmont | 77:869cf507173a | 144 | */ |
| emilmont | 77:869cf507173a | 145 | |
| emilmont | 77:869cf507173a | 146 | /** @defgroup ADC_external_trigger_edge_for_regular_channels_conversion |
| emilmont | 77:869cf507173a | 147 | * @{ |
| emilmont | 77:869cf507173a | 148 | */ |
| emilmont | 77:869cf507173a | 149 | #define ADC_ExternalTrigConvEdge_None ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 150 | #define ADC_ExternalTrigConvEdge_Rising ((uint32_t)0x10000000) |
| emilmont | 77:869cf507173a | 151 | #define ADC_ExternalTrigConvEdge_Falling ((uint32_t)0x20000000) |
| emilmont | 77:869cf507173a | 152 | #define ADC_ExternalTrigConvEdge_RisingFalling ((uint32_t)0x30000000) |
| emilmont | 77:869cf507173a | 153 | |
| emilmont | 77:869cf507173a | 154 | #define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigConvEdge_None) || \ |
| emilmont | 77:869cf507173a | 155 | ((EDGE) == ADC_ExternalTrigConvEdge_Rising) || \ |
| emilmont | 77:869cf507173a | 156 | ((EDGE) == ADC_ExternalTrigConvEdge_Falling) || \ |
| emilmont | 77:869cf507173a | 157 | ((EDGE) == ADC_ExternalTrigConvEdge_RisingFalling)) |
| emilmont | 77:869cf507173a | 158 | /** |
| emilmont | 77:869cf507173a | 159 | * @} |
| emilmont | 77:869cf507173a | 160 | */ |
| emilmont | 77:869cf507173a | 161 | |
| emilmont | 77:869cf507173a | 162 | /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion |
| emilmont | 77:869cf507173a | 163 | * @{ |
| emilmont | 77:869cf507173a | 164 | */ |
| emilmont | 77:869cf507173a | 165 | |
| emilmont | 77:869cf507173a | 166 | /* TIM2 */ |
| emilmont | 77:869cf507173a | 167 | #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x02000000) |
| emilmont | 77:869cf507173a | 168 | #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x03000000) |
| emilmont | 77:869cf507173a | 169 | #define ADC_ExternalTrigConv_T2_TRGO ((uint32_t)0x06000000) |
| emilmont | 77:869cf507173a | 170 | |
| emilmont | 77:869cf507173a | 171 | /* TIM3 */ |
| emilmont | 77:869cf507173a | 172 | #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x07000000) |
| emilmont | 77:869cf507173a | 173 | #define ADC_ExternalTrigConv_T3_CC3 ((uint32_t)0x08000000) |
| emilmont | 77:869cf507173a | 174 | #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x04000000) |
| emilmont | 77:869cf507173a | 175 | |
| emilmont | 77:869cf507173a | 176 | /* TIM4 */ |
| emilmont | 77:869cf507173a | 177 | #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x05000000) |
| emilmont | 77:869cf507173a | 178 | #define ADC_ExternalTrigConv_T4_TRGO ((uint32_t)0x09000000) |
| emilmont | 77:869cf507173a | 179 | |
| emilmont | 77:869cf507173a | 180 | /* TIM6 */ |
| emilmont | 77:869cf507173a | 181 | #define ADC_ExternalTrigConv_T6_TRGO ((uint32_t)0x0A000000) |
| emilmont | 77:869cf507173a | 182 | |
| emilmont | 77:869cf507173a | 183 | /* TIM9 */ |
| emilmont | 77:869cf507173a | 184 | #define ADC_ExternalTrigConv_T9_CC2 ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 185 | #define ADC_ExternalTrigConv_T9_TRGO ((uint32_t)0x01000000) |
| emilmont | 77:869cf507173a | 186 | |
| emilmont | 77:869cf507173a | 187 | /* EXTI */ |
| emilmont | 77:869cf507173a | 188 | #define ADC_ExternalTrigConv_Ext_IT11 ((uint32_t)0x0F000000) |
| emilmont | 77:869cf507173a | 189 | |
| emilmont | 77:869cf507173a | 190 | #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T9_CC2) || \ |
| emilmont | 77:869cf507173a | 191 | ((REGTRIG) == ADC_ExternalTrigConv_T9_TRGO) || \ |
| emilmont | 77:869cf507173a | 192 | ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ |
| emilmont | 77:869cf507173a | 193 | ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ |
| emilmont | 77:869cf507173a | 194 | ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ |
| emilmont | 77:869cf507173a | 195 | ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ |
| emilmont | 77:869cf507173a | 196 | ((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \ |
| emilmont | 77:869cf507173a | 197 | ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ |
| emilmont | 77:869cf507173a | 198 | ((REGTRIG) == ADC_ExternalTrigConv_T3_CC3) || \ |
| emilmont | 77:869cf507173a | 199 | ((REGTRIG) == ADC_ExternalTrigConv_T4_TRGO) || \ |
| emilmont | 77:869cf507173a | 200 | ((REGTRIG) == ADC_ExternalTrigConv_T6_TRGO) || \ |
| emilmont | 77:869cf507173a | 201 | ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11)) |
| emilmont | 77:869cf507173a | 202 | /** |
| emilmont | 77:869cf507173a | 203 | * @} |
| emilmont | 77:869cf507173a | 204 | */ |
| emilmont | 77:869cf507173a | 205 | |
| emilmont | 77:869cf507173a | 206 | /** @defgroup ADC_data_align |
| emilmont | 77:869cf507173a | 207 | * @{ |
| emilmont | 77:869cf507173a | 208 | */ |
| emilmont | 77:869cf507173a | 209 | |
| emilmont | 77:869cf507173a | 210 | #define ADC_DataAlign_Right ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 211 | #define ADC_DataAlign_Left ((uint32_t)0x00000800) |
| emilmont | 77:869cf507173a | 212 | |
| emilmont | 77:869cf507173a | 213 | #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ |
| emilmont | 77:869cf507173a | 214 | ((ALIGN) == ADC_DataAlign_Left)) |
| emilmont | 77:869cf507173a | 215 | /** |
| emilmont | 77:869cf507173a | 216 | * @} |
| emilmont | 77:869cf507173a | 217 | */ |
| emilmont | 77:869cf507173a | 218 | |
| emilmont | 77:869cf507173a | 219 | /** @defgroup ADC_channels |
| emilmont | 77:869cf507173a | 220 | * @{ |
| emilmont | 77:869cf507173a | 221 | */ |
| emilmont | 77:869cf507173a | 222 | /* ADC Bank A Channels -------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 223 | #define ADC_Channel_0 ((uint8_t)0x00) |
| emilmont | 77:869cf507173a | 224 | #define ADC_Channel_1 ((uint8_t)0x01) |
| emilmont | 77:869cf507173a | 225 | #define ADC_Channel_2 ((uint8_t)0x02) |
| emilmont | 77:869cf507173a | 226 | #define ADC_Channel_3 ((uint8_t)0x03) |
| emilmont | 77:869cf507173a | 227 | |
| emilmont | 77:869cf507173a | 228 | #define ADC_Channel_6 ((uint8_t)0x06) |
| emilmont | 77:869cf507173a | 229 | #define ADC_Channel_7 ((uint8_t)0x07) |
| emilmont | 77:869cf507173a | 230 | #define ADC_Channel_8 ((uint8_t)0x08) |
| emilmont | 77:869cf507173a | 231 | #define ADC_Channel_9 ((uint8_t)0x09) |
| emilmont | 77:869cf507173a | 232 | #define ADC_Channel_10 ((uint8_t)0x0A) |
| emilmont | 77:869cf507173a | 233 | #define ADC_Channel_11 ((uint8_t)0x0B) |
| emilmont | 77:869cf507173a | 234 | #define ADC_Channel_12 ((uint8_t)0x0C) |
| emilmont | 77:869cf507173a | 235 | |
| emilmont | 77:869cf507173a | 236 | |
| emilmont | 77:869cf507173a | 237 | /* ADC Bank B Channels -------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 238 | #define ADC_Channel_0b ADC_Channel_0 |
| emilmont | 77:869cf507173a | 239 | #define ADC_Channel_1b ADC_Channel_1 |
| emilmont | 77:869cf507173a | 240 | #define ADC_Channel_2b ADC_Channel_2 |
| emilmont | 77:869cf507173a | 241 | #define ADC_Channel_3b ADC_Channel_3 |
| emilmont | 77:869cf507173a | 242 | |
| emilmont | 77:869cf507173a | 243 | #define ADC_Channel_6b ADC_Channel_6 |
| emilmont | 77:869cf507173a | 244 | #define ADC_Channel_7b ADC_Channel_7 |
| emilmont | 77:869cf507173a | 245 | #define ADC_Channel_8b ADC_Channel_8 |
| emilmont | 77:869cf507173a | 246 | #define ADC_Channel_9b ADC_Channel_9 |
| emilmont | 77:869cf507173a | 247 | #define ADC_Channel_10b ADC_Channel_10 |
| emilmont | 77:869cf507173a | 248 | #define ADC_Channel_11b ADC_Channel_11 |
| emilmont | 77:869cf507173a | 249 | #define ADC_Channel_12b ADC_Channel_12 |
| emilmont | 77:869cf507173a | 250 | |
| emilmont | 77:869cf507173a | 251 | /* ADC Common Channels (ADC Bank A and B) ------------------------------------*/ |
| emilmont | 77:869cf507173a | 252 | #define ADC_Channel_4 ((uint8_t)0x04) |
| emilmont | 77:869cf507173a | 253 | #define ADC_Channel_5 ((uint8_t)0x05) |
| emilmont | 77:869cf507173a | 254 | |
| emilmont | 77:869cf507173a | 255 | #define ADC_Channel_13 ((uint8_t)0x0D) |
| emilmont | 77:869cf507173a | 256 | #define ADC_Channel_14 ((uint8_t)0x0E) |
| emilmont | 77:869cf507173a | 257 | #define ADC_Channel_15 ((uint8_t)0x0F) |
| emilmont | 77:869cf507173a | 258 | #define ADC_Channel_16 ((uint8_t)0x10) |
| emilmont | 77:869cf507173a | 259 | #define ADC_Channel_17 ((uint8_t)0x11) |
| emilmont | 77:869cf507173a | 260 | #define ADC_Channel_18 ((uint8_t)0x12) |
| emilmont | 77:869cf507173a | 261 | #define ADC_Channel_19 ((uint8_t)0x13) |
| emilmont | 77:869cf507173a | 262 | #define ADC_Channel_20 ((uint8_t)0x14) |
| emilmont | 77:869cf507173a | 263 | #define ADC_Channel_21 ((uint8_t)0x15) |
| emilmont | 77:869cf507173a | 264 | #define ADC_Channel_22 ((uint8_t)0x16) |
| emilmont | 77:869cf507173a | 265 | #define ADC_Channel_23 ((uint8_t)0x17) |
| emilmont | 77:869cf507173a | 266 | #define ADC_Channel_24 ((uint8_t)0x18) |
| emilmont | 77:869cf507173a | 267 | #define ADC_Channel_25 ((uint8_t)0x19) |
| emilmont | 77:869cf507173a | 268 | |
| emilmont | 77:869cf507173a | 269 | #define ADC_Channel_27 ((uint8_t)0x1B) |
| emilmont | 77:869cf507173a | 270 | #define ADC_Channel_28 ((uint8_t)0x1C) |
| emilmont | 77:869cf507173a | 271 | #define ADC_Channel_29 ((uint8_t)0x1D) |
| emilmont | 77:869cf507173a | 272 | #define ADC_Channel_30 ((uint8_t)0x1E) |
| emilmont | 77:869cf507173a | 273 | #define ADC_Channel_31 ((uint8_t)0x1F) |
| emilmont | 77:869cf507173a | 274 | |
| emilmont | 77:869cf507173a | 275 | #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16) |
| emilmont | 77:869cf507173a | 276 | #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17) |
| emilmont | 77:869cf507173a | 277 | |
| emilmont | 77:869cf507173a | 278 | #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ |
| emilmont | 77:869cf507173a | 279 | ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ |
| emilmont | 77:869cf507173a | 280 | ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ |
| emilmont | 77:869cf507173a | 281 | ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ |
| emilmont | 77:869cf507173a | 282 | ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ |
| emilmont | 77:869cf507173a | 283 | ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ |
| emilmont | 77:869cf507173a | 284 | ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ |
| emilmont | 77:869cf507173a | 285 | ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ |
| emilmont | 77:869cf507173a | 286 | ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17) || \ |
| emilmont | 77:869cf507173a | 287 | ((CHANNEL) == ADC_Channel_18) || ((CHANNEL) == ADC_Channel_19) || \ |
| emilmont | 77:869cf507173a | 288 | ((CHANNEL) == ADC_Channel_20) || ((CHANNEL) == ADC_Channel_21) || \ |
| emilmont | 77:869cf507173a | 289 | ((CHANNEL) == ADC_Channel_22) || ((CHANNEL) == ADC_Channel_23) || \ |
| emilmont | 77:869cf507173a | 290 | ((CHANNEL) == ADC_Channel_24) || ((CHANNEL) == ADC_Channel_25) || \ |
| emilmont | 77:869cf507173a | 291 | ((CHANNEL) == ADC_Channel_27) || ((CHANNEL) == ADC_Channel_28) || \ |
| emilmont | 77:869cf507173a | 292 | ((CHANNEL) == ADC_Channel_29) || ((CHANNEL) == ADC_Channel_30) || \ |
| emilmont | 77:869cf507173a | 293 | ((CHANNEL) == ADC_Channel_31)) |
| emilmont | 77:869cf507173a | 294 | /** |
| emilmont | 77:869cf507173a | 295 | * @} |
| emilmont | 77:869cf507173a | 296 | */ |
| emilmont | 77:869cf507173a | 297 | |
| emilmont | 77:869cf507173a | 298 | /** @defgroup ADC_sampling_times |
| emilmont | 77:869cf507173a | 299 | * @{ |
| emilmont | 77:869cf507173a | 300 | */ |
| emilmont | 77:869cf507173a | 301 | |
| emilmont | 77:869cf507173a | 302 | #define ADC_SampleTime_4Cycles ((uint8_t)0x00) |
| emilmont | 77:869cf507173a | 303 | #define ADC_SampleTime_9Cycles ((uint8_t)0x01) |
| emilmont | 77:869cf507173a | 304 | #define ADC_SampleTime_16Cycles ((uint8_t)0x02) |
| emilmont | 77:869cf507173a | 305 | #define ADC_SampleTime_24Cycles ((uint8_t)0x03) |
| emilmont | 77:869cf507173a | 306 | #define ADC_SampleTime_48Cycles ((uint8_t)0x04) |
| emilmont | 77:869cf507173a | 307 | #define ADC_SampleTime_96Cycles ((uint8_t)0x05) |
| emilmont | 77:869cf507173a | 308 | #define ADC_SampleTime_192Cycles ((uint8_t)0x06) |
| emilmont | 77:869cf507173a | 309 | #define ADC_SampleTime_384Cycles ((uint8_t)0x07) |
| emilmont | 77:869cf507173a | 310 | |
| emilmont | 77:869cf507173a | 311 | #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_4Cycles) || \ |
| emilmont | 77:869cf507173a | 312 | ((TIME) == ADC_SampleTime_9Cycles) || \ |
| emilmont | 77:869cf507173a | 313 | ((TIME) == ADC_SampleTime_16Cycles) || \ |
| emilmont | 77:869cf507173a | 314 | ((TIME) == ADC_SampleTime_24Cycles) || \ |
| emilmont | 77:869cf507173a | 315 | ((TIME) == ADC_SampleTime_48Cycles) || \ |
| emilmont | 77:869cf507173a | 316 | ((TIME) == ADC_SampleTime_96Cycles) || \ |
| emilmont | 77:869cf507173a | 317 | ((TIME) == ADC_SampleTime_192Cycles) || \ |
| emilmont | 77:869cf507173a | 318 | ((TIME) == ADC_SampleTime_384Cycles)) |
| emilmont | 77:869cf507173a | 319 | /** |
| emilmont | 77:869cf507173a | 320 | * @} |
| emilmont | 77:869cf507173a | 321 | */ |
| emilmont | 77:869cf507173a | 322 | |
| emilmont | 77:869cf507173a | 323 | /** @defgroup ADC_Delay_length |
| emilmont | 77:869cf507173a | 324 | * @{ |
| emilmont | 77:869cf507173a | 325 | */ |
| emilmont | 77:869cf507173a | 326 | |
| emilmont | 77:869cf507173a | 327 | #define ADC_DelayLength_None ((uint8_t)0x00) |
| emilmont | 77:869cf507173a | 328 | #define ADC_DelayLength_Freeze ((uint8_t)0x10) |
| emilmont | 77:869cf507173a | 329 | #define ADC_DelayLength_7Cycles ((uint8_t)0x20) |
| emilmont | 77:869cf507173a | 330 | #define ADC_DelayLength_15Cycles ((uint8_t)0x30) |
| emilmont | 77:869cf507173a | 331 | #define ADC_DelayLength_31Cycles ((uint8_t)0x40) |
| emilmont | 77:869cf507173a | 332 | #define ADC_DelayLength_63Cycles ((uint8_t)0x50) |
| emilmont | 77:869cf507173a | 333 | #define ADC_DelayLength_127Cycles ((uint8_t)0x60) |
| emilmont | 77:869cf507173a | 334 | #define ADC_DelayLength_255Cycles ((uint8_t)0x70) |
| emilmont | 77:869cf507173a | 335 | |
| emilmont | 77:869cf507173a | 336 | #define IS_ADC_DELAY_LENGTH(LENGTH) (((LENGTH) == ADC_DelayLength_None) || \ |
| emilmont | 77:869cf507173a | 337 | ((LENGTH) == ADC_DelayLength_Freeze) || \ |
| emilmont | 77:869cf507173a | 338 | ((LENGTH) == ADC_DelayLength_7Cycles) || \ |
| emilmont | 77:869cf507173a | 339 | ((LENGTH) == ADC_DelayLength_15Cycles) || \ |
| emilmont | 77:869cf507173a | 340 | ((LENGTH) == ADC_DelayLength_31Cycles) || \ |
| emilmont | 77:869cf507173a | 341 | ((LENGTH) == ADC_DelayLength_63Cycles) || \ |
| emilmont | 77:869cf507173a | 342 | ((LENGTH) == ADC_DelayLength_127Cycles) || \ |
| emilmont | 77:869cf507173a | 343 | ((LENGTH) == ADC_DelayLength_255Cycles)) |
| emilmont | 77:869cf507173a | 344 | |
| emilmont | 77:869cf507173a | 345 | /** |
| emilmont | 77:869cf507173a | 346 | * @} |
| emilmont | 77:869cf507173a | 347 | */ |
| emilmont | 77:869cf507173a | 348 | |
| emilmont | 77:869cf507173a | 349 | /** @defgroup ADC_external_trigger_edge_for_injected_channels_conversion |
| emilmont | 77:869cf507173a | 350 | * @{ |
| emilmont | 77:869cf507173a | 351 | */ |
| emilmont | 77:869cf507173a | 352 | #define ADC_ExternalTrigInjecConvEdge_None ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 353 | #define ADC_ExternalTrigInjecConvEdge_Rising ((uint32_t)0x00100000) |
| emilmont | 77:869cf507173a | 354 | #define ADC_ExternalTrigInjecConvEdge_Falling ((uint32_t)0x00200000) |
| emilmont | 77:869cf507173a | 355 | #define ADC_ExternalTrigInjecConvEdge_RisingFalling ((uint32_t)0x00300000) |
| emilmont | 77:869cf507173a | 356 | |
| emilmont | 77:869cf507173a | 357 | #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigInjecConvEdge_None) || \ |
| emilmont | 77:869cf507173a | 358 | ((EDGE) == ADC_ExternalTrigInjecConvEdge_Rising) || \ |
| emilmont | 77:869cf507173a | 359 | ((EDGE) == ADC_ExternalTrigInjecConvEdge_Falling) || \ |
| emilmont | 77:869cf507173a | 360 | ((EDGE) == ADC_ExternalTrigInjecConvEdge_RisingFalling)) |
| emilmont | 77:869cf507173a | 361 | /** |
| emilmont | 77:869cf507173a | 362 | * @} |
| emilmont | 77:869cf507173a | 363 | */ |
| emilmont | 77:869cf507173a | 364 | |
| emilmont | 77:869cf507173a | 365 | |
| emilmont | 77:869cf507173a | 366 | /** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion |
| emilmont | 77:869cf507173a | 367 | * @{ |
| emilmont | 77:869cf507173a | 368 | */ |
| emilmont | 77:869cf507173a | 369 | |
| emilmont | 77:869cf507173a | 370 | |
| emilmont | 77:869cf507173a | 371 | /* TIM2 */ |
| emilmont | 77:869cf507173a | 372 | #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00020000) |
| emilmont | 77:869cf507173a | 373 | #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00030000) |
| emilmont | 77:869cf507173a | 374 | |
| emilmont | 77:869cf507173a | 375 | /* TIM3 */ |
| emilmont | 77:869cf507173a | 376 | #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00040000) |
| emilmont | 77:869cf507173a | 377 | |
| emilmont | 77:869cf507173a | 378 | /* TIM4 */ |
| emilmont | 77:869cf507173a | 379 | #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00050000) |
| emilmont | 77:869cf507173a | 380 | #define ADC_ExternalTrigInjecConv_T4_CC1 ((uint32_t)0x00060000) |
| emilmont | 77:869cf507173a | 381 | #define ADC_ExternalTrigInjecConv_T4_CC2 ((uint32_t)0x00070000) |
| emilmont | 77:869cf507173a | 382 | #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00080000) |
| emilmont | 77:869cf507173a | 383 | |
| emilmont | 77:869cf507173a | 384 | /* TIM7 */ |
| emilmont | 77:869cf507173a | 385 | #define ADC_ExternalTrigInjecConv_T7_TRGO ((uint32_t)0x000A0000) |
| emilmont | 77:869cf507173a | 386 | |
| emilmont | 77:869cf507173a | 387 | /* TIM9 */ |
| emilmont | 77:869cf507173a | 388 | #define ADC_ExternalTrigInjecConv_T9_CC1 ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 389 | #define ADC_ExternalTrigInjecConv_T9_TRGO ((uint32_t)0x00010000) |
| emilmont | 77:869cf507173a | 390 | |
| emilmont | 77:869cf507173a | 391 | /* TIM10 */ |
| emilmont | 77:869cf507173a | 392 | #define ADC_ExternalTrigInjecConv_T10_CC1 ((uint32_t)0x00090000) |
| emilmont | 77:869cf507173a | 393 | |
| emilmont | 77:869cf507173a | 394 | /* EXTI */ |
| emilmont | 77:869cf507173a | 395 | #define ADC_ExternalTrigInjecConv_Ext_IT15 ((uint32_t)0x000F0000) |
| emilmont | 77:869cf507173a | 396 | |
| emilmont | 77:869cf507173a | 397 | #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T9_CC1) || \ |
| emilmont | 77:869cf507173a | 398 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T9_TRGO) || \ |
| emilmont | 77:869cf507173a | 399 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ |
| emilmont | 77:869cf507173a | 400 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ |
| emilmont | 77:869cf507173a | 401 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ |
| emilmont | 77:869cf507173a | 402 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ |
| emilmont | 77:869cf507173a | 403 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC1) || \ |
| emilmont | 77:869cf507173a | 404 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC2) || \ |
| emilmont | 77:869cf507173a | 405 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ |
| emilmont | 77:869cf507173a | 406 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T10_CC1) || \ |
| emilmont | 77:869cf507173a | 407 | ((INJTRIG) == ADC_ExternalTrigInjecConv_T7_TRGO) || \ |
| emilmont | 77:869cf507173a | 408 | ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15)) |
| emilmont | 77:869cf507173a | 409 | /** |
| emilmont | 77:869cf507173a | 410 | * @} |
| emilmont | 77:869cf507173a | 411 | */ |
| emilmont | 77:869cf507173a | 412 | |
| emilmont | 77:869cf507173a | 413 | /** @defgroup ADC_injected_channel_selection |
| emilmont | 77:869cf507173a | 414 | * @{ |
| emilmont | 77:869cf507173a | 415 | */ |
| emilmont | 77:869cf507173a | 416 | #define ADC_InjectedChannel_1 ((uint8_t)0x18) |
| emilmont | 77:869cf507173a | 417 | #define ADC_InjectedChannel_2 ((uint8_t)0x1C) |
| emilmont | 77:869cf507173a | 418 | #define ADC_InjectedChannel_3 ((uint8_t)0x20) |
| emilmont | 77:869cf507173a | 419 | #define ADC_InjectedChannel_4 ((uint8_t)0x24) |
| emilmont | 77:869cf507173a | 420 | |
| emilmont | 77:869cf507173a | 421 | #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ |
| emilmont | 77:869cf507173a | 422 | ((CHANNEL) == ADC_InjectedChannel_2) || \ |
| emilmont | 77:869cf507173a | 423 | ((CHANNEL) == ADC_InjectedChannel_3) || \ |
| emilmont | 77:869cf507173a | 424 | ((CHANNEL) == ADC_InjectedChannel_4)) |
| emilmont | 77:869cf507173a | 425 | /** |
| emilmont | 77:869cf507173a | 426 | * @} |
| emilmont | 77:869cf507173a | 427 | */ |
| emilmont | 77:869cf507173a | 428 | |
| emilmont | 77:869cf507173a | 429 | /** @defgroup ADC_analog_watchdog_selection |
| emilmont | 77:869cf507173a | 430 | * @{ |
| emilmont | 77:869cf507173a | 431 | */ |
| emilmont | 77:869cf507173a | 432 | |
| emilmont | 77:869cf507173a | 433 | #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) |
| emilmont | 77:869cf507173a | 434 | #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) |
| emilmont | 77:869cf507173a | 435 | #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) |
| emilmont | 77:869cf507173a | 436 | #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) |
| emilmont | 77:869cf507173a | 437 | #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) |
| emilmont | 77:869cf507173a | 438 | #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) |
| emilmont | 77:869cf507173a | 439 | #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 440 | |
| emilmont | 77:869cf507173a | 441 | #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ |
| emilmont | 77:869cf507173a | 442 | ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ |
| emilmont | 77:869cf507173a | 443 | ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ |
| emilmont | 77:869cf507173a | 444 | ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ |
| emilmont | 77:869cf507173a | 445 | ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ |
| emilmont | 77:869cf507173a | 446 | ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ |
| emilmont | 77:869cf507173a | 447 | ((WATCHDOG) == ADC_AnalogWatchdog_None)) |
| emilmont | 77:869cf507173a | 448 | /** |
| emilmont | 77:869cf507173a | 449 | * @} |
| emilmont | 77:869cf507173a | 450 | */ |
| emilmont | 77:869cf507173a | 451 | |
| emilmont | 77:869cf507173a | 452 | /** @defgroup ADC_interrupts_definition |
| emilmont | 77:869cf507173a | 453 | * @{ |
| emilmont | 77:869cf507173a | 454 | */ |
| emilmont | 77:869cf507173a | 455 | |
| emilmont | 77:869cf507173a | 456 | #define ADC_IT_AWD ((uint16_t)0x0106) |
| emilmont | 77:869cf507173a | 457 | #define ADC_IT_EOC ((uint16_t)0x0205) |
| emilmont | 77:869cf507173a | 458 | #define ADC_IT_JEOC ((uint16_t)0x0407) |
| emilmont | 77:869cf507173a | 459 | #define ADC_IT_OVR ((uint16_t)0x201A) |
| emilmont | 77:869cf507173a | 460 | |
| emilmont | 77:869cf507173a | 461 | #define IS_ADC_IT(IT) (((IT) == ADC_IT_AWD) || ((IT) == ADC_IT_EOC) || \ |
| emilmont | 77:869cf507173a | 462 | ((IT) == ADC_IT_JEOC)|| ((IT) == ADC_IT_OVR)) |
| emilmont | 77:869cf507173a | 463 | /** |
| emilmont | 77:869cf507173a | 464 | * @} |
| emilmont | 77:869cf507173a | 465 | */ |
| emilmont | 77:869cf507173a | 466 | |
| emilmont | 77:869cf507173a | 467 | /** @defgroup ADC_flags_definition |
| emilmont | 77:869cf507173a | 468 | * @{ |
| emilmont | 77:869cf507173a | 469 | */ |
| emilmont | 77:869cf507173a | 470 | |
| emilmont | 77:869cf507173a | 471 | #define ADC_FLAG_AWD ((uint16_t)0x0001) |
| emilmont | 77:869cf507173a | 472 | #define ADC_FLAG_EOC ((uint16_t)0x0002) |
| emilmont | 77:869cf507173a | 473 | #define ADC_FLAG_JEOC ((uint16_t)0x0004) |
| emilmont | 77:869cf507173a | 474 | #define ADC_FLAG_JSTRT ((uint16_t)0x0008) |
| emilmont | 77:869cf507173a | 475 | #define ADC_FLAG_STRT ((uint16_t)0x0010) |
| emilmont | 77:869cf507173a | 476 | #define ADC_FLAG_OVR ((uint16_t)0x0020) |
| emilmont | 77:869cf507173a | 477 | #define ADC_FLAG_ADONS ((uint16_t)0x0040) |
| emilmont | 77:869cf507173a | 478 | #define ADC_FLAG_RCNR ((uint16_t)0x0100) |
| emilmont | 77:869cf507173a | 479 | #define ADC_FLAG_JCNR ((uint16_t)0x0200) |
| emilmont | 77:869cf507173a | 480 | |
| emilmont | 77:869cf507173a | 481 | #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFC0) == 0x00) && ((FLAG) != 0x00)) |
| emilmont | 77:869cf507173a | 482 | |
| emilmont | 77:869cf507173a | 483 | #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ |
| emilmont | 77:869cf507173a | 484 | ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ |
| emilmont | 77:869cf507173a | 485 | ((FLAG) == ADC_FLAG_STRT) || ((FLAG)== ADC_FLAG_OVR) || \ |
| emilmont | 77:869cf507173a | 486 | ((FLAG) == ADC_FLAG_ADONS) || ((FLAG)== ADC_FLAG_RCNR) || \ |
| emilmont | 77:869cf507173a | 487 | ((FLAG) == ADC_FLAG_JCNR)) |
| emilmont | 77:869cf507173a | 488 | /** |
| emilmont | 77:869cf507173a | 489 | * @} |
| emilmont | 77:869cf507173a | 490 | */ |
| emilmont | 77:869cf507173a | 491 | |
| emilmont | 77:869cf507173a | 492 | /** @defgroup ADC_thresholds |
| emilmont | 77:869cf507173a | 493 | * @{ |
| emilmont | 77:869cf507173a | 494 | */ |
| emilmont | 77:869cf507173a | 495 | |
| emilmont | 77:869cf507173a | 496 | #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) |
| emilmont | 77:869cf507173a | 497 | |
| emilmont | 77:869cf507173a | 498 | /** |
| emilmont | 77:869cf507173a | 499 | * @} |
| emilmont | 77:869cf507173a | 500 | */ |
| emilmont | 77:869cf507173a | 501 | |
| emilmont | 77:869cf507173a | 502 | /** @defgroup ADC_injected_offset |
| emilmont | 77:869cf507173a | 503 | * @{ |
| emilmont | 77:869cf507173a | 504 | */ |
| emilmont | 77:869cf507173a | 505 | |
| emilmont | 77:869cf507173a | 506 | #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) |
| emilmont | 77:869cf507173a | 507 | |
| emilmont | 77:869cf507173a | 508 | /** |
| emilmont | 77:869cf507173a | 509 | * @} |
| emilmont | 77:869cf507173a | 510 | */ |
| emilmont | 77:869cf507173a | 511 | |
| emilmont | 77:869cf507173a | 512 | /** @defgroup ADC_injected_length |
| emilmont | 77:869cf507173a | 513 | * @{ |
| emilmont | 77:869cf507173a | 514 | */ |
| emilmont | 77:869cf507173a | 515 | |
| emilmont | 77:869cf507173a | 516 | #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) |
| emilmont | 77:869cf507173a | 517 | |
| emilmont | 77:869cf507173a | 518 | /** |
| emilmont | 77:869cf507173a | 519 | * @} |
| emilmont | 77:869cf507173a | 520 | */ |
| emilmont | 77:869cf507173a | 521 | |
| emilmont | 77:869cf507173a | 522 | /** @defgroup ADC_injected_rank |
| emilmont | 77:869cf507173a | 523 | * @{ |
| emilmont | 77:869cf507173a | 524 | */ |
| emilmont | 77:869cf507173a | 525 | |
| emilmont | 77:869cf507173a | 526 | #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) |
| emilmont | 77:869cf507173a | 527 | |
| emilmont | 77:869cf507173a | 528 | /** |
| emilmont | 77:869cf507173a | 529 | * @} |
| emilmont | 77:869cf507173a | 530 | */ |
| emilmont | 77:869cf507173a | 531 | |
| emilmont | 77:869cf507173a | 532 | /** @defgroup ADC_regular_length |
| emilmont | 77:869cf507173a | 533 | * @{ |
| emilmont | 77:869cf507173a | 534 | */ |
| emilmont | 77:869cf507173a | 535 | |
| emilmont | 77:869cf507173a | 536 | #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 1) && ((LENGTH) <= 28)) |
| emilmont | 77:869cf507173a | 537 | |
| emilmont | 77:869cf507173a | 538 | /** |
| emilmont | 77:869cf507173a | 539 | * @} |
| emilmont | 77:869cf507173a | 540 | */ |
| emilmont | 77:869cf507173a | 541 | |
| emilmont | 77:869cf507173a | 542 | /** @defgroup ADC_regular_rank |
| emilmont | 77:869cf507173a | 543 | * @{ |
| emilmont | 77:869cf507173a | 544 | */ |
| emilmont | 77:869cf507173a | 545 | |
| emilmont | 77:869cf507173a | 546 | #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 1) && ((RANK) <= 28)) |
| emilmont | 77:869cf507173a | 547 | |
| emilmont | 77:869cf507173a | 548 | /** |
| emilmont | 77:869cf507173a | 549 | * @} |
| emilmont | 77:869cf507173a | 550 | */ |
| emilmont | 77:869cf507173a | 551 | |
| emilmont | 77:869cf507173a | 552 | /** @defgroup ADC_regular_discontinuous_mode_number |
| emilmont | 77:869cf507173a | 553 | * @{ |
| emilmont | 77:869cf507173a | 554 | */ |
| emilmont | 77:869cf507173a | 555 | |
| emilmont | 77:869cf507173a | 556 | #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) |
| emilmont | 77:869cf507173a | 557 | |
| emilmont | 77:869cf507173a | 558 | /** |
| emilmont | 77:869cf507173a | 559 | * @} |
| emilmont | 77:869cf507173a | 560 | */ |
| emilmont | 77:869cf507173a | 561 | |
| emilmont | 77:869cf507173a | 562 | /** @defgroup ADC_Bank_Selection |
| emilmont | 77:869cf507173a | 563 | * @{ |
| emilmont | 77:869cf507173a | 564 | */ |
| emilmont | 77:869cf507173a | 565 | #define ADC_Bank_A ((uint8_t)0x00) |
| emilmont | 77:869cf507173a | 566 | #define ADC_Bank_B ((uint8_t)0x01) |
| emilmont | 77:869cf507173a | 567 | #define IS_ADC_BANK(BANK) (((BANK) == ADC_Bank_A) || ((BANK) == ADC_Bank_B)) |
| emilmont | 77:869cf507173a | 568 | |
| emilmont | 77:869cf507173a | 569 | /** |
| emilmont | 77:869cf507173a | 570 | * @} |
| emilmont | 77:869cf507173a | 571 | */ |
| emilmont | 77:869cf507173a | 572 | |
| emilmont | 77:869cf507173a | 573 | /** |
| emilmont | 77:869cf507173a | 574 | * @} |
| emilmont | 77:869cf507173a | 575 | */ |
| emilmont | 77:869cf507173a | 576 | |
| emilmont | 77:869cf507173a | 577 | /* Exported macro ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 578 | /* Exported functions ------------------------------------------------------- */ |
| emilmont | 77:869cf507173a | 579 | |
| emilmont | 77:869cf507173a | 580 | /* Function used to set the ADC configuration to the default reset state *****/ |
| emilmont | 77:869cf507173a | 581 | void ADC_DeInit(ADC_TypeDef* ADCx); |
| emilmont | 77:869cf507173a | 582 | |
| emilmont | 77:869cf507173a | 583 | /* Initialization and Configuration functions *********************************/ |
| emilmont | 77:869cf507173a | 584 | void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); |
| emilmont | 77:869cf507173a | 585 | void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); |
| emilmont | 77:869cf507173a | 586 | void ADC_CommonInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct); |
| emilmont | 77:869cf507173a | 587 | void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct); |
| emilmont | 77:869cf507173a | 588 | void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 589 | void ADC_BankSelection(ADC_TypeDef* ADCx, uint8_t ADC_Bank); |
| emilmont | 77:869cf507173a | 590 | |
| emilmont | 77:869cf507173a | 591 | /* Power saving functions *****************************************************/ |
| emilmont | 77:869cf507173a | 592 | void ADC_PowerDownCmd(ADC_TypeDef* ADCx, uint32_t ADC_PowerDown, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 593 | void ADC_DelaySelectionConfig(ADC_TypeDef* ADCx, uint8_t ADC_DelayLength); |
| emilmont | 77:869cf507173a | 594 | |
| emilmont | 77:869cf507173a | 595 | /* Analog Watchdog configuration functions ************************************/ |
| emilmont | 77:869cf507173a | 596 | void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); |
| emilmont | 77:869cf507173a | 597 | void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,uint16_t LowThreshold); |
| emilmont | 77:869cf507173a | 598 | void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); |
| emilmont | 77:869cf507173a | 599 | |
| emilmont | 77:869cf507173a | 600 | /* Temperature Sensor & Vrefint (Voltage Reference internal) management function */ |
| emilmont | 77:869cf507173a | 601 | void ADC_TempSensorVrefintCmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 602 | |
| emilmont | 77:869cf507173a | 603 | /* Regular Channels Configuration functions ***********************************/ |
| emilmont | 77:869cf507173a | 604 | void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); |
| emilmont | 77:869cf507173a | 605 | void ADC_SoftwareStartConv(ADC_TypeDef* ADCx); |
| emilmont | 77:869cf507173a | 606 | FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); |
| emilmont | 77:869cf507173a | 607 | void ADC_EOCOnEachRegularChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 608 | void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 609 | void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); |
| emilmont | 77:869cf507173a | 610 | void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 611 | uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); |
| emilmont | 77:869cf507173a | 612 | |
| emilmont | 77:869cf507173a | 613 | /* Regular Channels DMA Configuration functions *******************************/ |
| emilmont | 77:869cf507173a | 614 | void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 615 | void ADC_DMARequestAfterLastTransferCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 616 | |
| emilmont | 77:869cf507173a | 617 | /* Injected channels Configuration functions **********************************/ |
| emilmont | 77:869cf507173a | 618 | void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); |
| emilmont | 77:869cf507173a | 619 | void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length); |
| emilmont | 77:869cf507173a | 620 | void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset); |
| emilmont | 77:869cf507173a | 621 | void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); |
| emilmont | 77:869cf507173a | 622 | void ADC_ExternalTrigInjectedConvEdgeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConvEdge); |
| emilmont | 77:869cf507173a | 623 | void ADC_SoftwareStartInjectedConv(ADC_TypeDef* ADCx); |
| emilmont | 77:869cf507173a | 624 | FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx); |
| emilmont | 77:869cf507173a | 625 | void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 626 | void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 627 | uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel); |
| emilmont | 77:869cf507173a | 628 | |
| emilmont | 77:869cf507173a | 629 | /* Interrupts and flags management functions **********************************/ |
| emilmont | 77:869cf507173a | 630 | void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 631 | FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint16_t ADC_FLAG); |
| emilmont | 77:869cf507173a | 632 | void ADC_ClearFlag(ADC_TypeDef* ADCx, uint16_t ADC_FLAG); |
| emilmont | 77:869cf507173a | 633 | ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); |
| emilmont | 77:869cf507173a | 634 | void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); |
| emilmont | 77:869cf507173a | 635 | |
| emilmont | 77:869cf507173a | 636 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 637 | } |
| emilmont | 77:869cf507173a | 638 | #endif |
| emilmont | 77:869cf507173a | 639 | |
| emilmont | 77:869cf507173a | 640 | #endif /*__STM32L1xx_ADC_H */ |
| emilmont | 77:869cf507173a | 641 | |
| emilmont | 77:869cf507173a | 642 | /** |
| emilmont | 77:869cf507173a | 643 | * @} |
| emilmont | 77:869cf507173a | 644 | */ |
| emilmont | 77:869cf507173a | 645 | |
| emilmont | 77:869cf507173a | 646 | /** |
| emilmont | 77:869cf507173a | 647 | * @} |
| emilmont | 77:869cf507173a | 648 | */ |
| emilmont | 77:869cf507173a | 649 | |
| emilmont | 77:869cf507173a | 650 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |