version_2.0
Dependents: cc3000_ping_demo_try_2
Fork of mbed by
TARGET_NUCLEO_F030R8/stm32f0xx_usart.h@81:7d30d6019079, 2014-03-19 (annotated)
- Committer:
- bogdanm
- Date:
- Wed Mar 19 18:28:32 2014 +0000
- Revision:
- 81:7d30d6019079
- Parent:
- 77:869cf507173a
Release 81 of the mbed library
Main changes:
- Updates and fixes for many targets
- LPC1768: serial interface code fixes
- nRF51822 targets now output a .hex file
- More exporters
- More flexible GPIO API
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 77:869cf507173a | 1 | /** |
emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
emilmont | 77:869cf507173a | 3 | * @file stm32f0xx_usart.h |
emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
emilmont | 77:869cf507173a | 5 | * @version V1.3.0 |
emilmont | 77:869cf507173a | 6 | * @date 16-January-2014 |
emilmont | 77:869cf507173a | 7 | * @brief This file contains all the functions prototypes for the USART |
emilmont | 77:869cf507173a | 8 | * firmware library. |
emilmont | 77:869cf507173a | 9 | ****************************************************************************** |
emilmont | 77:869cf507173a | 10 | * @attention |
emilmont | 77:869cf507173a | 11 | * |
bogdanm | 81:7d30d6019079 | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
emilmont | 77:869cf507173a | 13 | * |
bogdanm | 81:7d30d6019079 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 81:7d30d6019079 | 15 | * are permitted provided that the following conditions are met: |
bogdanm | 81:7d30d6019079 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 81:7d30d6019079 | 17 | * this list of conditions and the following disclaimer. |
bogdanm | 81:7d30d6019079 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 81:7d30d6019079 | 19 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 81:7d30d6019079 | 20 | * and/or other materials provided with the distribution. |
bogdanm | 81:7d30d6019079 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 81:7d30d6019079 | 22 | * may be used to endorse or promote products derived from this software |
bogdanm | 81:7d30d6019079 | 23 | * without specific prior written permission. |
emilmont | 77:869cf507173a | 24 | * |
bogdanm | 81:7d30d6019079 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 81:7d30d6019079 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 81:7d30d6019079 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 81:7d30d6019079 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 81:7d30d6019079 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 81:7d30d6019079 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 81:7d30d6019079 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 81:7d30d6019079 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 81:7d30d6019079 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 81:7d30d6019079 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
emilmont | 77:869cf507173a | 35 | * |
emilmont | 77:869cf507173a | 36 | ****************************************************************************** |
emilmont | 77:869cf507173a | 37 | */ |
emilmont | 77:869cf507173a | 38 | |
emilmont | 77:869cf507173a | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
emilmont | 77:869cf507173a | 40 | #ifndef __STM32F0XX_USART_H |
emilmont | 77:869cf507173a | 41 | #define __STM32F0XX_USART_H |
emilmont | 77:869cf507173a | 42 | |
emilmont | 77:869cf507173a | 43 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 44 | extern "C" { |
emilmont | 77:869cf507173a | 45 | #endif |
emilmont | 77:869cf507173a | 46 | |
emilmont | 77:869cf507173a | 47 | /* Includes ------------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 48 | #include "stm32f0xx.h" |
emilmont | 77:869cf507173a | 49 | |
emilmont | 77:869cf507173a | 50 | /** @addtogroup STM32F0xx_StdPeriph_Driver |
emilmont | 77:869cf507173a | 51 | * @{ |
emilmont | 77:869cf507173a | 52 | */ |
emilmont | 77:869cf507173a | 53 | |
emilmont | 77:869cf507173a | 54 | /** @addtogroup USART |
emilmont | 77:869cf507173a | 55 | * @{ |
emilmont | 77:869cf507173a | 56 | */ |
emilmont | 77:869cf507173a | 57 | |
emilmont | 77:869cf507173a | 58 | /* Exported types ------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 59 | |
emilmont | 77:869cf507173a | 60 | |
emilmont | 77:869cf507173a | 61 | |
emilmont | 77:869cf507173a | 62 | /** |
emilmont | 77:869cf507173a | 63 | * @brief USART Init Structure definition |
emilmont | 77:869cf507173a | 64 | */ |
emilmont | 77:869cf507173a | 65 | |
emilmont | 77:869cf507173a | 66 | typedef struct |
emilmont | 77:869cf507173a | 67 | { |
emilmont | 77:869cf507173a | 68 | uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate. |
emilmont | 77:869cf507173a | 69 | The baud rate is computed using the following formula: |
emilmont | 77:869cf507173a | 70 | - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate))) |
emilmont | 77:869cf507173a | 71 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */ |
emilmont | 77:869cf507173a | 72 | |
emilmont | 77:869cf507173a | 73 | uint32_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
emilmont | 77:869cf507173a | 74 | This parameter can be a value of @ref USART_Word_Length */ |
emilmont | 77:869cf507173a | 75 | |
emilmont | 77:869cf507173a | 76 | uint32_t USART_StopBits; /*!< Specifies the number of stop bits transmitted. |
emilmont | 77:869cf507173a | 77 | This parameter can be a value of @ref USART_Stop_Bits */ |
emilmont | 77:869cf507173a | 78 | |
emilmont | 77:869cf507173a | 79 | uint32_t USART_Parity; /*!< Specifies the parity mode. |
emilmont | 77:869cf507173a | 80 | This parameter can be a value of @ref USART_Parity |
emilmont | 77:869cf507173a | 81 | @note When parity is enabled, the computed parity is inserted |
emilmont | 77:869cf507173a | 82 | at the MSB position of the transmitted data (9th bit when |
emilmont | 77:869cf507173a | 83 | the word length is set to 9 data bits; 8th bit when the |
emilmont | 77:869cf507173a | 84 | word length is set to 8 data bits). */ |
emilmont | 77:869cf507173a | 85 | |
emilmont | 77:869cf507173a | 86 | uint32_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. |
emilmont | 77:869cf507173a | 87 | This parameter can be a value of @ref USART_Mode */ |
emilmont | 77:869cf507173a | 88 | |
emilmont | 77:869cf507173a | 89 | uint32_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled |
emilmont | 77:869cf507173a | 90 | or disabled. |
emilmont | 77:869cf507173a | 91 | This parameter can be a value of @ref USART_Hardware_Flow_Control*/ |
emilmont | 77:869cf507173a | 92 | } USART_InitTypeDef; |
emilmont | 77:869cf507173a | 93 | |
emilmont | 77:869cf507173a | 94 | /** |
emilmont | 77:869cf507173a | 95 | * @brief USART Clock Init Structure definition |
emilmont | 77:869cf507173a | 96 | */ |
emilmont | 77:869cf507173a | 97 | |
emilmont | 77:869cf507173a | 98 | typedef struct |
emilmont | 77:869cf507173a | 99 | { |
emilmont | 77:869cf507173a | 100 | uint32_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled. |
emilmont | 77:869cf507173a | 101 | This parameter can be a value of @ref USART_Clock */ |
emilmont | 77:869cf507173a | 102 | |
emilmont | 77:869cf507173a | 103 | uint32_t USART_CPOL; /*!< Specifies the steady state of the serial clock. |
emilmont | 77:869cf507173a | 104 | This parameter can be a value of @ref USART_Clock_Polarity */ |
emilmont | 77:869cf507173a | 105 | |
emilmont | 77:869cf507173a | 106 | uint32_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made. |
emilmont | 77:869cf507173a | 107 | This parameter can be a value of @ref USART_Clock_Phase */ |
emilmont | 77:869cf507173a | 108 | |
emilmont | 77:869cf507173a | 109 | uint32_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted |
emilmont | 77:869cf507173a | 110 | data bit (MSB) has to be output on the SCLK pin in synchronous mode. |
emilmont | 77:869cf507173a | 111 | This parameter can be a value of @ref USART_Last_Bit */ |
emilmont | 77:869cf507173a | 112 | } USART_ClockInitTypeDef; |
emilmont | 77:869cf507173a | 113 | |
emilmont | 77:869cf507173a | 114 | /* Exported constants --------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 115 | |
emilmont | 77:869cf507173a | 116 | /** @defgroup USART_Exported_Constants |
emilmont | 77:869cf507173a | 117 | * @{ |
emilmont | 77:869cf507173a | 118 | */ |
emilmont | 77:869cf507173a | 119 | |
emilmont | 77:869cf507173a | 120 | #define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \ |
emilmont | 77:869cf507173a | 121 | ((PERIPH) == USART2) || \ |
emilmont | 77:869cf507173a | 122 | ((PERIPH) == USART3) || \ |
emilmont | 77:869cf507173a | 123 | ((PERIPH) == USART4)) |
emilmont | 77:869cf507173a | 124 | |
emilmont | 77:869cf507173a | 125 | #define IS_USART_12_PERIPH(PERIPH) (((PERIPH) == USART1) || \ |
emilmont | 77:869cf507173a | 126 | ((PERIPH) == USART2)) |
emilmont | 77:869cf507173a | 127 | |
emilmont | 77:869cf507173a | 128 | /** @defgroup USART_Word_Length |
emilmont | 77:869cf507173a | 129 | * @{ |
emilmont | 77:869cf507173a | 130 | */ |
emilmont | 77:869cf507173a | 131 | |
emilmont | 77:869cf507173a | 132 | #define USART_WordLength_8b ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 133 | #define USART_WordLength_9b USART_CR1_M /* should be ((uint32_t)0x00001000) */ |
emilmont | 77:869cf507173a | 134 | #define USART_WordLength_7b ((uint32_t)0x10001000) /*!< only available for STM32F072 and STM32F030 devices */ |
emilmont | 77:869cf507173a | 135 | #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \ |
emilmont | 77:869cf507173a | 136 | ((LENGTH) == USART_WordLength_9b) || \ |
emilmont | 77:869cf507173a | 137 | ((LENGTH) == USART_WordLength_7b)) |
emilmont | 77:869cf507173a | 138 | /** |
emilmont | 77:869cf507173a | 139 | * @} |
emilmont | 77:869cf507173a | 140 | */ |
emilmont | 77:869cf507173a | 141 | |
emilmont | 77:869cf507173a | 142 | /** @defgroup USART_Stop_Bits |
emilmont | 77:869cf507173a | 143 | * @{ |
emilmont | 77:869cf507173a | 144 | */ |
emilmont | 77:869cf507173a | 145 | |
emilmont | 77:869cf507173a | 146 | #define USART_StopBits_1 ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 147 | #define USART_StopBits_2 USART_CR2_STOP_1 |
emilmont | 77:869cf507173a | 148 | #define USART_StopBits_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) |
emilmont | 77:869cf507173a | 149 | #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \ |
emilmont | 77:869cf507173a | 150 | ((STOPBITS) == USART_StopBits_2) || \ |
emilmont | 77:869cf507173a | 151 | ((STOPBITS) == USART_StopBits_1_5)) |
emilmont | 77:869cf507173a | 152 | /** |
emilmont | 77:869cf507173a | 153 | * @} |
emilmont | 77:869cf507173a | 154 | */ |
emilmont | 77:869cf507173a | 155 | |
emilmont | 77:869cf507173a | 156 | /** @defgroup USART_Parity |
emilmont | 77:869cf507173a | 157 | * @{ |
emilmont | 77:869cf507173a | 158 | */ |
emilmont | 77:869cf507173a | 159 | |
emilmont | 77:869cf507173a | 160 | #define USART_Parity_No ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 161 | #define USART_Parity_Even USART_CR1_PCE |
emilmont | 77:869cf507173a | 162 | #define USART_Parity_Odd (USART_CR1_PCE | USART_CR1_PS) |
emilmont | 77:869cf507173a | 163 | #define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \ |
emilmont | 77:869cf507173a | 164 | ((PARITY) == USART_Parity_Even) || \ |
emilmont | 77:869cf507173a | 165 | ((PARITY) == USART_Parity_Odd)) |
emilmont | 77:869cf507173a | 166 | /** |
emilmont | 77:869cf507173a | 167 | * @} |
emilmont | 77:869cf507173a | 168 | */ |
emilmont | 77:869cf507173a | 169 | |
emilmont | 77:869cf507173a | 170 | /** @defgroup USART_Mode |
emilmont | 77:869cf507173a | 171 | * @{ |
emilmont | 77:869cf507173a | 172 | */ |
emilmont | 77:869cf507173a | 173 | |
emilmont | 77:869cf507173a | 174 | #define USART_Mode_Rx USART_CR1_RE |
emilmont | 77:869cf507173a | 175 | #define USART_Mode_Tx USART_CR1_TE |
emilmont | 77:869cf507173a | 176 | #define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFFFFFF3) == 0x00) && \ |
emilmont | 77:869cf507173a | 177 | ((MODE) != (uint32_t)0x00)) |
emilmont | 77:869cf507173a | 178 | /** |
emilmont | 77:869cf507173a | 179 | * @} |
emilmont | 77:869cf507173a | 180 | */ |
emilmont | 77:869cf507173a | 181 | |
emilmont | 77:869cf507173a | 182 | /** @defgroup USART_Hardware_Flow_Control |
emilmont | 77:869cf507173a | 183 | * @{ |
emilmont | 77:869cf507173a | 184 | */ |
emilmont | 77:869cf507173a | 185 | |
emilmont | 77:869cf507173a | 186 | #define USART_HardwareFlowControl_None ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 187 | #define USART_HardwareFlowControl_RTS USART_CR3_RTSE |
emilmont | 77:869cf507173a | 188 | #define USART_HardwareFlowControl_CTS USART_CR3_CTSE |
emilmont | 77:869cf507173a | 189 | #define USART_HardwareFlowControl_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) |
emilmont | 77:869cf507173a | 190 | #define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
emilmont | 77:869cf507173a | 191 | (((CONTROL) == USART_HardwareFlowControl_None) || \ |
emilmont | 77:869cf507173a | 192 | ((CONTROL) == USART_HardwareFlowControl_RTS) || \ |
emilmont | 77:869cf507173a | 193 | ((CONTROL) == USART_HardwareFlowControl_CTS) || \ |
emilmont | 77:869cf507173a | 194 | ((CONTROL) == USART_HardwareFlowControl_RTS_CTS)) |
emilmont | 77:869cf507173a | 195 | /** |
emilmont | 77:869cf507173a | 196 | * @} |
emilmont | 77:869cf507173a | 197 | */ |
emilmont | 77:869cf507173a | 198 | |
emilmont | 77:869cf507173a | 199 | /** @defgroup USART_Clock |
emilmont | 77:869cf507173a | 200 | * @{ |
emilmont | 77:869cf507173a | 201 | */ |
emilmont | 77:869cf507173a | 202 | |
emilmont | 77:869cf507173a | 203 | #define USART_Clock_Disable ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 204 | #define USART_Clock_Enable USART_CR2_CLKEN |
emilmont | 77:869cf507173a | 205 | #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \ |
emilmont | 77:869cf507173a | 206 | ((CLOCK) == USART_Clock_Enable)) |
emilmont | 77:869cf507173a | 207 | /** |
emilmont | 77:869cf507173a | 208 | * @} |
emilmont | 77:869cf507173a | 209 | */ |
emilmont | 77:869cf507173a | 210 | |
emilmont | 77:869cf507173a | 211 | /** @defgroup USART_Clock_Polarity |
emilmont | 77:869cf507173a | 212 | * @{ |
emilmont | 77:869cf507173a | 213 | */ |
emilmont | 77:869cf507173a | 214 | |
emilmont | 77:869cf507173a | 215 | #define USART_CPOL_Low ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 216 | #define USART_CPOL_High USART_CR2_CPOL |
emilmont | 77:869cf507173a | 217 | #define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High)) |
emilmont | 77:869cf507173a | 218 | |
emilmont | 77:869cf507173a | 219 | /** |
emilmont | 77:869cf507173a | 220 | * @} |
emilmont | 77:869cf507173a | 221 | */ |
emilmont | 77:869cf507173a | 222 | |
emilmont | 77:869cf507173a | 223 | /** @defgroup USART_Clock_Phase |
emilmont | 77:869cf507173a | 224 | * @{ |
emilmont | 77:869cf507173a | 225 | */ |
emilmont | 77:869cf507173a | 226 | |
emilmont | 77:869cf507173a | 227 | #define USART_CPHA_1Edge ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 228 | #define USART_CPHA_2Edge USART_CR2_CPHA |
emilmont | 77:869cf507173a | 229 | #define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge)) |
emilmont | 77:869cf507173a | 230 | |
emilmont | 77:869cf507173a | 231 | /** |
emilmont | 77:869cf507173a | 232 | * @} |
emilmont | 77:869cf507173a | 233 | */ |
emilmont | 77:869cf507173a | 234 | |
emilmont | 77:869cf507173a | 235 | /** @defgroup USART_Last_Bit |
emilmont | 77:869cf507173a | 236 | * @{ |
emilmont | 77:869cf507173a | 237 | */ |
emilmont | 77:869cf507173a | 238 | |
emilmont | 77:869cf507173a | 239 | #define USART_LastBit_Disable ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 240 | #define USART_LastBit_Enable USART_CR2_LBCL |
emilmont | 77:869cf507173a | 241 | #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \ |
emilmont | 77:869cf507173a | 242 | ((LASTBIT) == USART_LastBit_Enable)) |
emilmont | 77:869cf507173a | 243 | /** |
emilmont | 77:869cf507173a | 244 | * @} |
emilmont | 77:869cf507173a | 245 | */ |
emilmont | 77:869cf507173a | 246 | |
emilmont | 77:869cf507173a | 247 | /** @defgroup USART_DMA_Requests |
emilmont | 77:869cf507173a | 248 | * @{ |
emilmont | 77:869cf507173a | 249 | */ |
emilmont | 77:869cf507173a | 250 | |
emilmont | 77:869cf507173a | 251 | #define USART_DMAReq_Tx USART_CR3_DMAT |
emilmont | 77:869cf507173a | 252 | #define USART_DMAReq_Rx USART_CR3_DMAR |
emilmont | 77:869cf507173a | 253 | #define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint32_t)0xFFFFFF3F) == 0x00) && \ |
emilmont | 77:869cf507173a | 254 | ((DMAREQ) != (uint32_t)0x00)) |
emilmont | 77:869cf507173a | 255 | |
emilmont | 77:869cf507173a | 256 | /** |
emilmont | 77:869cf507173a | 257 | * @} |
emilmont | 77:869cf507173a | 258 | */ |
emilmont | 77:869cf507173a | 259 | |
emilmont | 77:869cf507173a | 260 | /** @defgroup USART_DMA_Recception_Error |
emilmont | 77:869cf507173a | 261 | * @{ |
emilmont | 77:869cf507173a | 262 | */ |
emilmont | 77:869cf507173a | 263 | |
emilmont | 77:869cf507173a | 264 | #define USART_DMAOnError_Enable ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 265 | #define USART_DMAOnError_Disable USART_CR3_DDRE |
emilmont | 77:869cf507173a | 266 | #define IS_USART_DMAONERROR(DMAERROR) (((DMAERROR) == USART_DMAOnError_Disable)|| \ |
emilmont | 77:869cf507173a | 267 | ((DMAERROR) == USART_DMAOnError_Enable)) |
emilmont | 77:869cf507173a | 268 | /** |
emilmont | 77:869cf507173a | 269 | * @} |
emilmont | 77:869cf507173a | 270 | */ |
emilmont | 77:869cf507173a | 271 | |
emilmont | 77:869cf507173a | 272 | /** @defgroup USART_MuteMode_WakeUp_methods |
emilmont | 77:869cf507173a | 273 | * @{ |
emilmont | 77:869cf507173a | 274 | */ |
emilmont | 77:869cf507173a | 275 | |
emilmont | 77:869cf507173a | 276 | #define USART_WakeUp_IdleLine ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 277 | #define USART_WakeUp_AddressMark USART_CR1_WAKE |
emilmont | 77:869cf507173a | 278 | #define IS_USART_MUTEMODE_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \ |
emilmont | 77:869cf507173a | 279 | ((WAKEUP) == USART_WakeUp_AddressMark)) |
emilmont | 77:869cf507173a | 280 | /** |
emilmont | 77:869cf507173a | 281 | * @} |
emilmont | 77:869cf507173a | 282 | */ |
emilmont | 77:869cf507173a | 283 | |
emilmont | 77:869cf507173a | 284 | /** @defgroup USART_Address_Detection |
emilmont | 77:869cf507173a | 285 | * @{ |
emilmont | 77:869cf507173a | 286 | */ |
emilmont | 77:869cf507173a | 287 | |
emilmont | 77:869cf507173a | 288 | #define USART_AddressLength_4b ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 289 | #define USART_AddressLength_7b USART_CR2_ADDM7 |
emilmont | 77:869cf507173a | 290 | #define IS_USART_ADDRESS_DETECTION(ADDRESS) (((ADDRESS) == USART_AddressLength_4b) || \ |
emilmont | 77:869cf507173a | 291 | ((ADDRESS) == USART_AddressLength_7b)) |
emilmont | 77:869cf507173a | 292 | /** |
emilmont | 77:869cf507173a | 293 | * @} |
emilmont | 77:869cf507173a | 294 | */ |
emilmont | 77:869cf507173a | 295 | |
emilmont | 77:869cf507173a | 296 | /** @defgroup USART_StopMode_WakeUp_methods |
emilmont | 77:869cf507173a | 297 | * @note These parameters are only available for STM32F051 and STM32F072 devices |
emilmont | 77:869cf507173a | 298 | * @{ |
emilmont | 77:869cf507173a | 299 | */ |
emilmont | 77:869cf507173a | 300 | |
emilmont | 77:869cf507173a | 301 | #define USART_WakeUpSource_AddressMatch ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 302 | #define USART_WakeUpSource_StartBit USART_CR3_WUS_1 |
emilmont | 77:869cf507173a | 303 | #define USART_WakeUpSource_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) |
emilmont | 77:869cf507173a | 304 | #define IS_USART_STOPMODE_WAKEUPSOURCE(SOURCE) (((SOURCE) == USART_WakeUpSource_AddressMatch) || \ |
emilmont | 77:869cf507173a | 305 | ((SOURCE) == USART_WakeUpSource_StartBit) || \ |
emilmont | 77:869cf507173a | 306 | ((SOURCE) == USART_WakeUpSource_RXNE)) |
emilmont | 77:869cf507173a | 307 | /** |
emilmont | 77:869cf507173a | 308 | * @} |
emilmont | 77:869cf507173a | 309 | */ |
emilmont | 77:869cf507173a | 310 | |
emilmont | 77:869cf507173a | 311 | /** @defgroup USART_LIN_Break_Detection_Length |
emilmont | 77:869cf507173a | 312 | * @{ |
emilmont | 77:869cf507173a | 313 | */ |
emilmont | 77:869cf507173a | 314 | |
emilmont | 77:869cf507173a | 315 | #define USART_LINBreakDetectLength_10b ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 316 | #define USART_LINBreakDetectLength_11b USART_CR2_LBDL |
emilmont | 77:869cf507173a | 317 | #define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \ |
emilmont | 77:869cf507173a | 318 | (((LENGTH) == USART_LINBreakDetectLength_10b) || \ |
emilmont | 77:869cf507173a | 319 | ((LENGTH) == USART_LINBreakDetectLength_11b)) |
emilmont | 77:869cf507173a | 320 | /** |
emilmont | 77:869cf507173a | 321 | * @} |
emilmont | 77:869cf507173a | 322 | */ |
emilmont | 77:869cf507173a | 323 | |
emilmont | 77:869cf507173a | 324 | /** @defgroup USART_IrDA_Low_Power |
emilmont | 77:869cf507173a | 325 | * @{ |
emilmont | 77:869cf507173a | 326 | */ |
emilmont | 77:869cf507173a | 327 | |
emilmont | 77:869cf507173a | 328 | #define USART_IrDAMode_LowPower USART_CR3_IRLP |
emilmont | 77:869cf507173a | 329 | #define USART_IrDAMode_Normal ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 330 | #define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \ |
emilmont | 77:869cf507173a | 331 | ((MODE) == USART_IrDAMode_Normal)) |
emilmont | 77:869cf507173a | 332 | /** |
emilmont | 77:869cf507173a | 333 | * @} |
emilmont | 77:869cf507173a | 334 | */ |
emilmont | 77:869cf507173a | 335 | |
emilmont | 77:869cf507173a | 336 | /** @defgroup USART_DE_Polarity |
emilmont | 77:869cf507173a | 337 | * @{ |
emilmont | 77:869cf507173a | 338 | */ |
emilmont | 77:869cf507173a | 339 | |
emilmont | 77:869cf507173a | 340 | #define USART_DEPolarity_High ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 341 | #define USART_DEPolarity_Low USART_CR3_DEP |
emilmont | 77:869cf507173a | 342 | #define IS_USART_DE_POLARITY(POLARITY) (((POLARITY) == USART_DEPolarity_Low) || \ |
emilmont | 77:869cf507173a | 343 | ((POLARITY) == USART_DEPolarity_High)) |
emilmont | 77:869cf507173a | 344 | /** |
emilmont | 77:869cf507173a | 345 | * @} |
emilmont | 77:869cf507173a | 346 | */ |
emilmont | 77:869cf507173a | 347 | |
emilmont | 77:869cf507173a | 348 | /** @defgroup USART_Inversion_Pins |
emilmont | 77:869cf507173a | 349 | * @{ |
emilmont | 77:869cf507173a | 350 | */ |
emilmont | 77:869cf507173a | 351 | |
emilmont | 77:869cf507173a | 352 | #define USART_InvPin_Tx USART_CR2_TXINV |
emilmont | 77:869cf507173a | 353 | #define USART_InvPin_Rx USART_CR2_RXINV |
emilmont | 77:869cf507173a | 354 | #define IS_USART_INVERSTION_PIN(PIN) ((((PIN) & (uint32_t)0xFFFCFFFF) == 0x00) && \ |
emilmont | 77:869cf507173a | 355 | ((PIN) != (uint32_t)0x00)) |
emilmont | 77:869cf507173a | 356 | |
emilmont | 77:869cf507173a | 357 | /** |
emilmont | 77:869cf507173a | 358 | * @} |
emilmont | 77:869cf507173a | 359 | */ |
emilmont | 77:869cf507173a | 360 | |
emilmont | 77:869cf507173a | 361 | /** @defgroup USART_AutoBaudRate_Mode |
emilmont | 77:869cf507173a | 362 | * @{ |
emilmont | 77:869cf507173a | 363 | */ |
emilmont | 77:869cf507173a | 364 | |
emilmont | 77:869cf507173a | 365 | #define USART_AutoBaudRate_StartBit ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 366 | #define USART_AutoBaudRate_FallingEdge USART_CR2_ABRMODE_0 |
emilmont | 77:869cf507173a | 367 | #define IS_USART_AUTOBAUDRATE_MODE(MODE) (((MODE) == USART_AutoBaudRate_StartBit) || \ |
emilmont | 77:869cf507173a | 368 | ((MODE) == USART_AutoBaudRate_FallingEdge)) |
emilmont | 77:869cf507173a | 369 | /** |
emilmont | 77:869cf507173a | 370 | * @} |
emilmont | 77:869cf507173a | 371 | */ |
emilmont | 77:869cf507173a | 372 | |
emilmont | 77:869cf507173a | 373 | /** @defgroup USART_OVR_DETECTION |
emilmont | 77:869cf507173a | 374 | * @{ |
emilmont | 77:869cf507173a | 375 | */ |
emilmont | 77:869cf507173a | 376 | |
emilmont | 77:869cf507173a | 377 | #define USART_OVRDetection_Enable ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 378 | #define USART_OVRDetection_Disable USART_CR3_OVRDIS |
emilmont | 77:869cf507173a | 379 | #define IS_USART_OVRDETECTION(OVR) (((OVR) == USART_OVRDetection_Enable)|| \ |
emilmont | 77:869cf507173a | 380 | ((OVR) == USART_OVRDetection_Disable)) |
emilmont | 77:869cf507173a | 381 | /** |
emilmont | 77:869cf507173a | 382 | * @} |
emilmont | 77:869cf507173a | 383 | */ |
emilmont | 77:869cf507173a | 384 | /** @defgroup USART_Request |
emilmont | 77:869cf507173a | 385 | * @{ |
emilmont | 77:869cf507173a | 386 | */ |
emilmont | 77:869cf507173a | 387 | |
emilmont | 77:869cf507173a | 388 | #define USART_Request_ABRRQ USART_RQR_ABRRQ |
emilmont | 77:869cf507173a | 389 | #define USART_Request_SBKRQ USART_RQR_SBKRQ |
emilmont | 77:869cf507173a | 390 | #define USART_Request_MMRQ USART_RQR_MMRQ |
emilmont | 77:869cf507173a | 391 | #define USART_Request_RXFRQ USART_RQR_RXFRQ |
emilmont | 77:869cf507173a | 392 | #define USART_Request_TXFRQ USART_RQR_TXFRQ |
emilmont | 77:869cf507173a | 393 | |
emilmont | 77:869cf507173a | 394 | #define IS_USART_REQUEST(REQUEST) (((REQUEST) == USART_Request_TXFRQ) || \ |
emilmont | 77:869cf507173a | 395 | ((REQUEST) == USART_Request_RXFRQ) || \ |
emilmont | 77:869cf507173a | 396 | ((REQUEST) == USART_Request_MMRQ) || \ |
emilmont | 77:869cf507173a | 397 | ((REQUEST) == USART_Request_SBKRQ) || \ |
emilmont | 77:869cf507173a | 398 | ((REQUEST) == USART_Request_ABRRQ)) |
emilmont | 77:869cf507173a | 399 | /** |
emilmont | 77:869cf507173a | 400 | * @} |
emilmont | 77:869cf507173a | 401 | */ |
emilmont | 77:869cf507173a | 402 | |
emilmont | 77:869cf507173a | 403 | /** @defgroup USART_Flags |
emilmont | 77:869cf507173a | 404 | * @{ |
emilmont | 77:869cf507173a | 405 | */ |
emilmont | 77:869cf507173a | 406 | #define USART_FLAG_REACK USART_ISR_REACK |
emilmont | 77:869cf507173a | 407 | #define USART_FLAG_TEACK USART_ISR_TEACK |
emilmont | 77:869cf507173a | 408 | #define USART_FLAG_WU USART_ISR_WUF /*!< Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 409 | #define USART_FLAG_RWU USART_ISR_RWU /*!< Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 410 | #define USART_FLAG_SBK USART_ISR_SBKF |
emilmont | 77:869cf507173a | 411 | #define USART_FLAG_CM USART_ISR_CMF |
emilmont | 77:869cf507173a | 412 | #define USART_FLAG_BUSY USART_ISR_BUSY |
emilmont | 77:869cf507173a | 413 | #define USART_FLAG_ABRF USART_ISR_ABRF |
emilmont | 77:869cf507173a | 414 | #define USART_FLAG_ABRE USART_ISR_ABRE |
emilmont | 77:869cf507173a | 415 | #define USART_FLAG_EOB USART_ISR_EOBF /*!< Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 416 | #define USART_FLAG_RTO USART_ISR_RTOF |
emilmont | 77:869cf507173a | 417 | #define USART_FLAG_nCTSS USART_ISR_CTS |
emilmont | 77:869cf507173a | 418 | #define USART_FLAG_CTS USART_ISR_CTSIF |
emilmont | 77:869cf507173a | 419 | #define USART_FLAG_LBD USART_ISR_LBD /*!< Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 420 | #define USART_FLAG_TXE USART_ISR_TXE |
emilmont | 77:869cf507173a | 421 | #define USART_FLAG_TC USART_ISR_TC |
emilmont | 77:869cf507173a | 422 | #define USART_FLAG_RXNE USART_ISR_RXNE |
emilmont | 77:869cf507173a | 423 | #define USART_FLAG_IDLE USART_ISR_IDLE |
emilmont | 77:869cf507173a | 424 | #define USART_FLAG_ORE USART_ISR_ORE |
emilmont | 77:869cf507173a | 425 | #define USART_FLAG_NE USART_ISR_NE |
emilmont | 77:869cf507173a | 426 | #define USART_FLAG_FE USART_ISR_FE |
emilmont | 77:869cf507173a | 427 | #define USART_FLAG_PE USART_ISR_PE |
emilmont | 77:869cf507173a | 428 | #define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \ |
emilmont | 77:869cf507173a | 429 | ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \ |
emilmont | 77:869cf507173a | 430 | ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \ |
emilmont | 77:869cf507173a | 431 | ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \ |
emilmont | 77:869cf507173a | 432 | ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE) || \ |
emilmont | 77:869cf507173a | 433 | ((FLAG) == USART_FLAG_nCTSS) || ((FLAG) == USART_FLAG_RTO) || \ |
emilmont | 77:869cf507173a | 434 | ((FLAG) == USART_FLAG_EOB) || ((FLAG) == USART_FLAG_ABRE) || \ |
emilmont | 77:869cf507173a | 435 | ((FLAG) == USART_FLAG_ABRF) || ((FLAG) == USART_FLAG_BUSY) || \ |
emilmont | 77:869cf507173a | 436 | ((FLAG) == USART_FLAG_CM) || ((FLAG) == USART_FLAG_SBK) || \ |
emilmont | 77:869cf507173a | 437 | ((FLAG) == USART_FLAG_RWU) || ((FLAG) == USART_FLAG_WU) || \ |
emilmont | 77:869cf507173a | 438 | ((FLAG) == USART_FLAG_TEACK)|| ((FLAG) == USART_FLAG_REACK)) |
emilmont | 77:869cf507173a | 439 | |
emilmont | 77:869cf507173a | 440 | #define IS_USART_CLEAR_FLAG(FLAG) (((FLAG) == USART_FLAG_WU) || ((FLAG) == USART_FLAG_TC) || \ |
emilmont | 77:869cf507173a | 441 | ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_ORE) || \ |
emilmont | 77:869cf507173a | 442 | ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE) || \ |
emilmont | 77:869cf507173a | 443 | ((FLAG) == USART_FLAG_LBD) || ((FLAG) == USART_FLAG_CTS) || \ |
emilmont | 77:869cf507173a | 444 | ((FLAG) == USART_FLAG_RTO) || ((FLAG) == USART_FLAG_EOB) || \ |
emilmont | 77:869cf507173a | 445 | ((FLAG) == USART_FLAG_CM) || ((FLAG) == USART_FLAG_PE)) |
emilmont | 77:869cf507173a | 446 | /** |
emilmont | 77:869cf507173a | 447 | * @} |
emilmont | 77:869cf507173a | 448 | */ |
emilmont | 77:869cf507173a | 449 | |
emilmont | 77:869cf507173a | 450 | /** @defgroup USART_Interrupt_definition |
emilmont | 77:869cf507173a | 451 | * @brief USART Interrupt definition |
emilmont | 77:869cf507173a | 452 | * USART_IT possible values |
emilmont | 77:869cf507173a | 453 | * Elements values convention: 0xZZZZYYXX |
emilmont | 77:869cf507173a | 454 | * XX: Position of the corresponding Interrupt |
emilmont | 77:869cf507173a | 455 | * YY: Register index |
emilmont | 77:869cf507173a | 456 | * ZZZZ: Flag position |
emilmont | 77:869cf507173a | 457 | * @{ |
emilmont | 77:869cf507173a | 458 | */ |
emilmont | 77:869cf507173a | 459 | |
emilmont | 77:869cf507173a | 460 | #define USART_IT_WU ((uint32_t)0x00140316) /*!< Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 461 | #define USART_IT_CM ((uint32_t)0x0011010E) |
emilmont | 77:869cf507173a | 462 | #define USART_IT_EOB ((uint32_t)0x000C011B) /*!< Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 463 | #define USART_IT_RTO ((uint32_t)0x000B011A) |
emilmont | 77:869cf507173a | 464 | #define USART_IT_PE ((uint32_t)0x00000108) |
emilmont | 77:869cf507173a | 465 | #define USART_IT_TXE ((uint32_t)0x00070107) |
emilmont | 77:869cf507173a | 466 | #define USART_IT_TC ((uint32_t)0x00060106) |
emilmont | 77:869cf507173a | 467 | #define USART_IT_RXNE ((uint32_t)0x00050105) |
emilmont | 77:869cf507173a | 468 | #define USART_IT_IDLE ((uint32_t)0x00040104) |
emilmont | 77:869cf507173a | 469 | #define USART_IT_LBD ((uint32_t)0x00080206) /*!< Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 470 | #define USART_IT_CTS ((uint32_t)0x0009030A) |
emilmont | 77:869cf507173a | 471 | #define USART_IT_ERR ((uint32_t)0x00000300) |
emilmont | 77:869cf507173a | 472 | #define USART_IT_ORE ((uint32_t)0x00030300) |
emilmont | 77:869cf507173a | 473 | #define USART_IT_NE ((uint32_t)0x00020300) |
emilmont | 77:869cf507173a | 474 | #define USART_IT_FE ((uint32_t)0x00010300) |
emilmont | 77:869cf507173a | 475 | |
emilmont | 77:869cf507173a | 476 | #define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ |
emilmont | 77:869cf507173a | 477 | ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ |
emilmont | 77:869cf507173a | 478 | ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ |
emilmont | 77:869cf507173a | 479 | ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR) || \ |
emilmont | 77:869cf507173a | 480 | ((IT) == USART_IT_RTO) || ((IT) == USART_IT_EOB) || \ |
emilmont | 77:869cf507173a | 481 | ((IT) == USART_IT_CM) || ((IT) == USART_IT_WU)) |
emilmont | 77:869cf507173a | 482 | |
emilmont | 77:869cf507173a | 483 | #define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ |
emilmont | 77:869cf507173a | 484 | ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ |
emilmont | 77:869cf507173a | 485 | ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ |
emilmont | 77:869cf507173a | 486 | ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \ |
emilmont | 77:869cf507173a | 487 | ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE) || \ |
emilmont | 77:869cf507173a | 488 | ((IT) == USART_IT_RTO) || ((IT) == USART_IT_EOB) || \ |
emilmont | 77:869cf507173a | 489 | ((IT) == USART_IT_CM) || ((IT) == USART_IT_WU)) |
emilmont | 77:869cf507173a | 490 | |
emilmont | 77:869cf507173a | 491 | #define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_PE) || \ |
emilmont | 77:869cf507173a | 492 | ((IT) == USART_IT_FE) || ((IT) == USART_IT_NE) || \ |
emilmont | 77:869cf507173a | 493 | ((IT) == USART_IT_ORE) || ((IT) == USART_IT_IDLE) || \ |
emilmont | 77:869cf507173a | 494 | ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS) || \ |
emilmont | 77:869cf507173a | 495 | ((IT) == USART_IT_RTO) || ((IT) == USART_IT_EOB) || \ |
emilmont | 77:869cf507173a | 496 | ((IT) == USART_IT_CM) || ((IT) == USART_IT_WU)) |
emilmont | 77:869cf507173a | 497 | /** |
emilmont | 77:869cf507173a | 498 | * @} |
emilmont | 77:869cf507173a | 499 | */ |
emilmont | 77:869cf507173a | 500 | |
emilmont | 77:869cf507173a | 501 | /** @defgroup USART_Global_definition |
emilmont | 77:869cf507173a | 502 | * @{ |
emilmont | 77:869cf507173a | 503 | */ |
emilmont | 77:869cf507173a | 504 | |
emilmont | 77:869cf507173a | 505 | #define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x005B8D81)) |
emilmont | 77:869cf507173a | 506 | #define IS_USART_DE_ASSERTION_DEASSERTION_TIME(TIME) ((TIME) <= 0x1F) |
emilmont | 77:869cf507173a | 507 | #define IS_USART_AUTO_RETRY_COUNTER(COUNTER) ((COUNTER) <= 0x7) |
emilmont | 77:869cf507173a | 508 | #define IS_USART_TIMEOUT(TIMEOUT) ((TIMEOUT) <= 0x00FFFFFF) |
emilmont | 77:869cf507173a | 509 | #define IS_USART_DATA(DATA) ((DATA) <= 0x1FF) |
emilmont | 77:869cf507173a | 510 | |
emilmont | 77:869cf507173a | 511 | /** |
emilmont | 77:869cf507173a | 512 | * @} |
emilmont | 77:869cf507173a | 513 | */ |
emilmont | 77:869cf507173a | 514 | |
emilmont | 77:869cf507173a | 515 | /** |
emilmont | 77:869cf507173a | 516 | * @} |
emilmont | 77:869cf507173a | 517 | */ |
emilmont | 77:869cf507173a | 518 | |
emilmont | 77:869cf507173a | 519 | /* Exported macro ------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 520 | /* Exported functions ------------------------------------------------------- */ |
emilmont | 77:869cf507173a | 521 | |
emilmont | 77:869cf507173a | 522 | /* Initialization and Configuration functions *********************************/ |
emilmont | 77:869cf507173a | 523 | void USART_DeInit(USART_TypeDef* USARTx); |
emilmont | 77:869cf507173a | 524 | void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct); |
emilmont | 77:869cf507173a | 525 | void USART_StructInit(USART_InitTypeDef* USART_InitStruct); |
emilmont | 77:869cf507173a | 526 | void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct); |
emilmont | 77:869cf507173a | 527 | void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct); |
emilmont | 77:869cf507173a | 528 | void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 529 | void USART_DirectionModeCmd(USART_TypeDef* USARTx, uint32_t USART_DirectionMode, FunctionalState NewState); |
emilmont | 77:869cf507173a | 530 | void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 531 | void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 532 | void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 533 | void USART_MSBFirstCmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 534 | void USART_DataInvCmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 535 | void USART_InvPinCmd(USART_TypeDef* USARTx, uint32_t USART_InvPin, FunctionalState NewState); |
emilmont | 77:869cf507173a | 536 | void USART_SWAPPinCmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 537 | void USART_ReceiverTimeOutCmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 538 | void USART_SetReceiverTimeOut(USART_TypeDef* USARTx, uint32_t USART_ReceiverTimeOut); |
emilmont | 77:869cf507173a | 539 | |
emilmont | 77:869cf507173a | 540 | /* STOP Mode functions ********************************************************/ |
emilmont | 77:869cf507173a | 541 | void USART_STOPModeCmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 542 | void USART_StopModeWakeUpSourceConfig(USART_TypeDef* USARTx, uint32_t USART_WakeUpSource); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 543 | |
emilmont | 77:869cf507173a | 544 | /* AutoBaudRate functions *****************************************************/ |
emilmont | 77:869cf507173a | 545 | void USART_AutoBaudRateCmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 546 | void USART_AutoBaudRateConfig(USART_TypeDef* USARTx, uint32_t USART_AutoBaudRate); |
emilmont | 77:869cf507173a | 547 | |
emilmont | 77:869cf507173a | 548 | /* Data transfers functions ***************************************************/ |
emilmont | 77:869cf507173a | 549 | void USART_SendData(USART_TypeDef* USARTx, uint16_t Data); |
emilmont | 77:869cf507173a | 550 | uint16_t USART_ReceiveData(USART_TypeDef* USARTx); |
emilmont | 77:869cf507173a | 551 | |
emilmont | 77:869cf507173a | 552 | /* Multi-Processor Communication functions ************************************/ |
emilmont | 77:869cf507173a | 553 | void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address); |
emilmont | 77:869cf507173a | 554 | void USART_MuteModeWakeUpConfig(USART_TypeDef* USARTx, uint32_t USART_WakeUp); |
emilmont | 77:869cf507173a | 555 | void USART_MuteModeCmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 556 | void USART_AddressDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_AddressLength); |
emilmont | 77:869cf507173a | 557 | |
emilmont | 77:869cf507173a | 558 | /* LIN mode functions *********************************************************/ |
emilmont | 77:869cf507173a | 559 | void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint32_t USART_LINBreakDetectLength); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 560 | void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 561 | |
emilmont | 77:869cf507173a | 562 | /* Half-duplex mode function **************************************************/ |
emilmont | 77:869cf507173a | 563 | void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 564 | |
emilmont | 77:869cf507173a | 565 | /* Smartcard mode functions ***************************************************/ |
emilmont | 77:869cf507173a | 566 | void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 567 | void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 568 | void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 569 | void USART_SetAutoRetryCount(USART_TypeDef* USARTx, uint8_t USART_AutoCount); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 570 | void USART_SetBlockLength(USART_TypeDef* USARTx, uint8_t USART_BlockLength); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 571 | |
emilmont | 77:869cf507173a | 572 | /* IrDA mode functions ********************************************************/ |
emilmont | 77:869cf507173a | 573 | void USART_IrDAConfig(USART_TypeDef* USARTx, uint32_t USART_IrDAMode); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 574 | void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState); /* Not available for STM32F030 devices */ |
emilmont | 77:869cf507173a | 575 | |
emilmont | 77:869cf507173a | 576 | /* RS485 mode functions *******************************************************/ |
emilmont | 77:869cf507173a | 577 | void USART_DECmd(USART_TypeDef* USARTx, FunctionalState NewState); |
emilmont | 77:869cf507173a | 578 | void USART_DEPolarityConfig(USART_TypeDef* USARTx, uint32_t USART_DEPolarity); |
emilmont | 77:869cf507173a | 579 | void USART_SetDEAssertionTime(USART_TypeDef* USARTx, uint32_t USART_DEAssertionTime); |
emilmont | 77:869cf507173a | 580 | void USART_SetDEDeassertionTime(USART_TypeDef* USARTx, uint32_t USART_DEDeassertionTime); |
emilmont | 77:869cf507173a | 581 | |
emilmont | 77:869cf507173a | 582 | /* DMA transfers management functions *****************************************/ |
emilmont | 77:869cf507173a | 583 | void USART_DMACmd(USART_TypeDef* USARTx, uint32_t USART_DMAReq, FunctionalState NewState); |
emilmont | 77:869cf507173a | 584 | void USART_DMAReceptionErrorConfig(USART_TypeDef* USARTx, uint32_t USART_DMAOnError); |
emilmont | 77:869cf507173a | 585 | |
emilmont | 77:869cf507173a | 586 | /* Interrupts and flags management functions **********************************/ |
emilmont | 77:869cf507173a | 587 | void USART_ITConfig(USART_TypeDef* USARTx, uint32_t USART_IT, FunctionalState NewState); |
emilmont | 77:869cf507173a | 588 | void USART_RequestCmd(USART_TypeDef* USARTx, uint32_t USART_Request, FunctionalState NewState); |
emilmont | 77:869cf507173a | 589 | void USART_OverrunDetectionConfig(USART_TypeDef* USARTx, uint32_t USART_OVRDetection); |
emilmont | 77:869cf507173a | 590 | FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint32_t USART_FLAG); |
emilmont | 77:869cf507173a | 591 | void USART_ClearFlag(USART_TypeDef* USARTx, uint32_t USART_FLAG); |
emilmont | 77:869cf507173a | 592 | ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint32_t USART_IT); |
emilmont | 77:869cf507173a | 593 | void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint32_t USART_IT); |
emilmont | 77:869cf507173a | 594 | |
emilmont | 77:869cf507173a | 595 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 596 | } |
emilmont | 77:869cf507173a | 597 | #endif |
emilmont | 77:869cf507173a | 598 | |
emilmont | 77:869cf507173a | 599 | #endif /* __STM32F0XX_USART_H */ |
emilmont | 77:869cf507173a | 600 | |
emilmont | 77:869cf507173a | 601 | /** |
emilmont | 77:869cf507173a | 602 | * @} |
emilmont | 77:869cf507173a | 603 | */ |
emilmont | 77:869cf507173a | 604 | |
emilmont | 77:869cf507173a | 605 | /** |
emilmont | 77:869cf507173a | 606 | * @} |
emilmont | 77:869cf507173a | 607 | */ |
emilmont | 77:869cf507173a | 608 | |
emilmont | 77:869cf507173a | 609 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |