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TARGET_NUCLEO_L152RE/stm32l1xx_sdio.h@86:4f9a848d74c7, 2014-06-25 (annotated)
- Committer:
- erezi
- Date:
- Wed Jun 25 06:08:49 2014 +0000
- Revision:
- 86:4f9a848d74c7
- Parent:
- 81:7d30d6019079
version_2.0
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 77:869cf507173a | 1 | /** |
| emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 3 | * @file stm32l1xx_sdio.h |
| emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
| emilmont | 77:869cf507173a | 5 | * @version V1.3.0 |
| emilmont | 77:869cf507173a | 6 | * @date 31-January-2014 |
| emilmont | 77:869cf507173a | 7 | * @brief This file contains all the functions prototypes for the SDIO firmware |
| emilmont | 77:869cf507173a | 8 | * library. |
| emilmont | 77:869cf507173a | 9 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 10 | * @attention |
| emilmont | 77:869cf507173a | 11 | * |
| bogdanm | 81:7d30d6019079 | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| emilmont | 77:869cf507173a | 13 | * |
| bogdanm | 81:7d30d6019079 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 81:7d30d6019079 | 15 | * are permitted provided that the following conditions are met: |
| bogdanm | 81:7d30d6019079 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 81:7d30d6019079 | 17 | * this list of conditions and the following disclaimer. |
| bogdanm | 81:7d30d6019079 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 81:7d30d6019079 | 19 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 81:7d30d6019079 | 20 | * and/or other materials provided with the distribution. |
| bogdanm | 81:7d30d6019079 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 81:7d30d6019079 | 22 | * may be used to endorse or promote products derived from this software |
| bogdanm | 81:7d30d6019079 | 23 | * without specific prior written permission. |
| emilmont | 77:869cf507173a | 24 | * |
| bogdanm | 81:7d30d6019079 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 81:7d30d6019079 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 81:7d30d6019079 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 81:7d30d6019079 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 81:7d30d6019079 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 81:7d30d6019079 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 81:7d30d6019079 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 81:7d30d6019079 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 81:7d30d6019079 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 81:7d30d6019079 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| emilmont | 77:869cf507173a | 35 | * |
| emilmont | 77:869cf507173a | 36 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 37 | */ |
| emilmont | 77:869cf507173a | 38 | |
| emilmont | 77:869cf507173a | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| emilmont | 77:869cf507173a | 40 | #ifndef __STM32L1xx_SDIO_H |
| emilmont | 77:869cf507173a | 41 | #define __STM32L1xx_SDIO_H |
| emilmont | 77:869cf507173a | 42 | |
| emilmont | 77:869cf507173a | 43 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 44 | extern "C" { |
| emilmont | 77:869cf507173a | 45 | #endif |
| emilmont | 77:869cf507173a | 46 | |
| emilmont | 77:869cf507173a | 47 | /* Includes ------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 48 | #include "stm32l1xx.h" |
| emilmont | 77:869cf507173a | 49 | |
| emilmont | 77:869cf507173a | 50 | /** @addtogroup STM32L1xx_StdPeriph_Driver |
| emilmont | 77:869cf507173a | 51 | * @{ |
| emilmont | 77:869cf507173a | 52 | */ |
| emilmont | 77:869cf507173a | 53 | |
| emilmont | 77:869cf507173a | 54 | /** @addtogroup SDIO |
| emilmont | 77:869cf507173a | 55 | * @{ |
| emilmont | 77:869cf507173a | 56 | */ |
| emilmont | 77:869cf507173a | 57 | |
| emilmont | 77:869cf507173a | 58 | /* Exported types ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 59 | |
| emilmont | 77:869cf507173a | 60 | typedef struct |
| emilmont | 77:869cf507173a | 61 | { |
| emilmont | 77:869cf507173a | 62 | uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made. |
| emilmont | 77:869cf507173a | 63 | This parameter can be a value of @ref SDIO_Clock_Edge */ |
| emilmont | 77:869cf507173a | 64 | |
| emilmont | 77:869cf507173a | 65 | uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is |
| emilmont | 77:869cf507173a | 66 | enabled or disabled. |
| emilmont | 77:869cf507173a | 67 | This parameter can be a value of @ref SDIO_Clock_Bypass */ |
| emilmont | 77:869cf507173a | 68 | |
| emilmont | 77:869cf507173a | 69 | uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or |
| emilmont | 77:869cf507173a | 70 | disabled when the bus is idle. |
| emilmont | 77:869cf507173a | 71 | This parameter can be a value of @ref SDIO_Clock_Power_Save */ |
| emilmont | 77:869cf507173a | 72 | |
| emilmont | 77:869cf507173a | 73 | uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width. |
| emilmont | 77:869cf507173a | 74 | This parameter can be a value of @ref SDIO_Bus_Wide */ |
| emilmont | 77:869cf507173a | 75 | |
| emilmont | 77:869cf507173a | 76 | uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled. |
| emilmont | 77:869cf507173a | 77 | This parameter can be a value of @ref SDIO_Hardware_Flow_Control */ |
| emilmont | 77:869cf507173a | 78 | |
| emilmont | 77:869cf507173a | 79 | uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller. |
| emilmont | 77:869cf507173a | 80 | This parameter can be a value between 0x00 and 0xFF. */ |
| emilmont | 77:869cf507173a | 81 | |
| emilmont | 77:869cf507173a | 82 | } SDIO_InitTypeDef; |
| emilmont | 77:869cf507173a | 83 | |
| emilmont | 77:869cf507173a | 84 | typedef struct |
| emilmont | 77:869cf507173a | 85 | { |
| emilmont | 77:869cf507173a | 86 | uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent |
| emilmont | 77:869cf507173a | 87 | to a card as part of a command message. If a command |
| emilmont | 77:869cf507173a | 88 | contains an argument, it must be loaded into this register |
| emilmont | 77:869cf507173a | 89 | before writing the command to the command register */ |
| emilmont | 77:869cf507173a | 90 | |
| emilmont | 77:869cf507173a | 91 | uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */ |
| emilmont | 77:869cf507173a | 92 | |
| emilmont | 77:869cf507173a | 93 | uint32_t SDIO_Response; /*!< Specifies the SDIO response type. |
| emilmont | 77:869cf507173a | 94 | This parameter can be a value of @ref SDIO_Response_Type */ |
| emilmont | 77:869cf507173a | 95 | |
| emilmont | 77:869cf507173a | 96 | uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled. |
| emilmont | 77:869cf507173a | 97 | This parameter can be a value of @ref SDIO_Wait_Interrupt_State */ |
| emilmont | 77:869cf507173a | 98 | |
| emilmont | 77:869cf507173a | 99 | uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM) |
| emilmont | 77:869cf507173a | 100 | is enabled or disabled. |
| emilmont | 77:869cf507173a | 101 | This parameter can be a value of @ref SDIO_CPSM_State */ |
| emilmont | 77:869cf507173a | 102 | } SDIO_CmdInitTypeDef; |
| emilmont | 77:869cf507173a | 103 | |
| emilmont | 77:869cf507173a | 104 | typedef struct |
| emilmont | 77:869cf507173a | 105 | { |
| emilmont | 77:869cf507173a | 106 | uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */ |
| emilmont | 77:869cf507173a | 107 | |
| emilmont | 77:869cf507173a | 108 | uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */ |
| emilmont | 77:869cf507173a | 109 | |
| emilmont | 77:869cf507173a | 110 | uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer. |
| emilmont | 77:869cf507173a | 111 | This parameter can be a value of @ref SDIO_Data_Block_Size */ |
| emilmont | 77:869cf507173a | 112 | |
| emilmont | 77:869cf507173a | 113 | uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer |
| emilmont | 77:869cf507173a | 114 | is a read or write. |
| emilmont | 77:869cf507173a | 115 | This parameter can be a value of @ref SDIO_Transfer_Direction */ |
| emilmont | 77:869cf507173a | 116 | |
| emilmont | 77:869cf507173a | 117 | uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode. |
| emilmont | 77:869cf507173a | 118 | This parameter can be a value of @ref SDIO_Transfer_Type */ |
| emilmont | 77:869cf507173a | 119 | |
| emilmont | 77:869cf507173a | 120 | uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM) |
| emilmont | 77:869cf507173a | 121 | is enabled or disabled. |
| emilmont | 77:869cf507173a | 122 | This parameter can be a value of @ref SDIO_DPSM_State */ |
| emilmont | 77:869cf507173a | 123 | } SDIO_DataInitTypeDef; |
| emilmont | 77:869cf507173a | 124 | |
| emilmont | 77:869cf507173a | 125 | /* Exported constants --------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 126 | |
| emilmont | 77:869cf507173a | 127 | /** @defgroup SDIO_Exported_Constants |
| emilmont | 77:869cf507173a | 128 | * @{ |
| emilmont | 77:869cf507173a | 129 | */ |
| emilmont | 77:869cf507173a | 130 | |
| emilmont | 77:869cf507173a | 131 | /** @defgroup SDIO_Clock_Edge |
| emilmont | 77:869cf507173a | 132 | * @{ |
| emilmont | 77:869cf507173a | 133 | */ |
| emilmont | 77:869cf507173a | 134 | |
| emilmont | 77:869cf507173a | 135 | #define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 136 | #define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) |
| emilmont | 77:869cf507173a | 137 | #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \ |
| emilmont | 77:869cf507173a | 138 | ((EDGE) == SDIO_ClockEdge_Falling)) |
| emilmont | 77:869cf507173a | 139 | /** |
| emilmont | 77:869cf507173a | 140 | * @} |
| emilmont | 77:869cf507173a | 141 | */ |
| emilmont | 77:869cf507173a | 142 | |
| emilmont | 77:869cf507173a | 143 | /** @defgroup SDIO_Clock_Bypass |
| emilmont | 77:869cf507173a | 144 | * @{ |
| emilmont | 77:869cf507173a | 145 | */ |
| emilmont | 77:869cf507173a | 146 | |
| emilmont | 77:869cf507173a | 147 | #define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 148 | #define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) |
| emilmont | 77:869cf507173a | 149 | #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \ |
| emilmont | 77:869cf507173a | 150 | ((BYPASS) == SDIO_ClockBypass_Enable)) |
| emilmont | 77:869cf507173a | 151 | /** |
| emilmont | 77:869cf507173a | 152 | * @} |
| emilmont | 77:869cf507173a | 153 | */ |
| emilmont | 77:869cf507173a | 154 | |
| emilmont | 77:869cf507173a | 155 | /** @defgroup SDIO_Clock_Power_Save |
| emilmont | 77:869cf507173a | 156 | * @{ |
| emilmont | 77:869cf507173a | 157 | */ |
| emilmont | 77:869cf507173a | 158 | |
| emilmont | 77:869cf507173a | 159 | #define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 160 | #define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) |
| emilmont | 77:869cf507173a | 161 | #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \ |
| emilmont | 77:869cf507173a | 162 | ((SAVE) == SDIO_ClockPowerSave_Enable)) |
| emilmont | 77:869cf507173a | 163 | /** |
| emilmont | 77:869cf507173a | 164 | * @} |
| emilmont | 77:869cf507173a | 165 | */ |
| emilmont | 77:869cf507173a | 166 | |
| emilmont | 77:869cf507173a | 167 | /** @defgroup SDIO_Bus_Wide |
| emilmont | 77:869cf507173a | 168 | * @{ |
| emilmont | 77:869cf507173a | 169 | */ |
| emilmont | 77:869cf507173a | 170 | |
| emilmont | 77:869cf507173a | 171 | #define SDIO_BusWide_1b ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 172 | #define SDIO_BusWide_4b ((uint32_t)0x00000800) |
| emilmont | 77:869cf507173a | 173 | #define SDIO_BusWide_8b ((uint32_t)0x00001000) |
| emilmont | 77:869cf507173a | 174 | #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \ |
| emilmont | 77:869cf507173a | 175 | ((WIDE) == SDIO_BusWide_8b)) |
| emilmont | 77:869cf507173a | 176 | |
| emilmont | 77:869cf507173a | 177 | /** |
| emilmont | 77:869cf507173a | 178 | * @} |
| emilmont | 77:869cf507173a | 179 | */ |
| emilmont | 77:869cf507173a | 180 | |
| emilmont | 77:869cf507173a | 181 | /** @defgroup SDIO_Hardware_Flow_Control |
| emilmont | 77:869cf507173a | 182 | * @{ |
| emilmont | 77:869cf507173a | 183 | */ |
| emilmont | 77:869cf507173a | 184 | |
| emilmont | 77:869cf507173a | 185 | #define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 186 | #define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) |
| emilmont | 77:869cf507173a | 187 | #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \ |
| emilmont | 77:869cf507173a | 188 | ((CONTROL) == SDIO_HardwareFlowControl_Enable)) |
| emilmont | 77:869cf507173a | 189 | /** |
| emilmont | 77:869cf507173a | 190 | * @} |
| emilmont | 77:869cf507173a | 191 | */ |
| emilmont | 77:869cf507173a | 192 | |
| emilmont | 77:869cf507173a | 193 | /** @defgroup SDIO_Power_State |
| emilmont | 77:869cf507173a | 194 | * @{ |
| emilmont | 77:869cf507173a | 195 | */ |
| emilmont | 77:869cf507173a | 196 | |
| emilmont | 77:869cf507173a | 197 | #define SDIO_PowerState_OFF ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 198 | #define SDIO_PowerState_ON ((uint32_t)0x00000003) |
| emilmont | 77:869cf507173a | 199 | #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) |
| emilmont | 77:869cf507173a | 200 | /** |
| emilmont | 77:869cf507173a | 201 | * @} |
| emilmont | 77:869cf507173a | 202 | */ |
| emilmont | 77:869cf507173a | 203 | |
| emilmont | 77:869cf507173a | 204 | |
| emilmont | 77:869cf507173a | 205 | /** @defgroup SDIO_Interrupt_soucres |
| emilmont | 77:869cf507173a | 206 | * @{ |
| emilmont | 77:869cf507173a | 207 | */ |
| emilmont | 77:869cf507173a | 208 | |
| emilmont | 77:869cf507173a | 209 | #define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) |
| emilmont | 77:869cf507173a | 210 | #define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) |
| emilmont | 77:869cf507173a | 211 | #define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) |
| emilmont | 77:869cf507173a | 212 | #define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) |
| emilmont | 77:869cf507173a | 213 | #define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) |
| emilmont | 77:869cf507173a | 214 | #define SDIO_IT_RXOVERR ((uint32_t)0x00000020) |
| emilmont | 77:869cf507173a | 215 | #define SDIO_IT_CMDREND ((uint32_t)0x00000040) |
| emilmont | 77:869cf507173a | 216 | #define SDIO_IT_CMDSENT ((uint32_t)0x00000080) |
| emilmont | 77:869cf507173a | 217 | #define SDIO_IT_DATAEND ((uint32_t)0x00000100) |
| emilmont | 77:869cf507173a | 218 | #define SDIO_IT_STBITERR ((uint32_t)0x00000200) |
| emilmont | 77:869cf507173a | 219 | #define SDIO_IT_DBCKEND ((uint32_t)0x00000400) |
| emilmont | 77:869cf507173a | 220 | #define SDIO_IT_CMDACT ((uint32_t)0x00000800) |
| emilmont | 77:869cf507173a | 221 | #define SDIO_IT_TXACT ((uint32_t)0x00001000) |
| emilmont | 77:869cf507173a | 222 | #define SDIO_IT_RXACT ((uint32_t)0x00002000) |
| emilmont | 77:869cf507173a | 223 | #define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) |
| emilmont | 77:869cf507173a | 224 | #define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) |
| emilmont | 77:869cf507173a | 225 | #define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) |
| emilmont | 77:869cf507173a | 226 | #define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) |
| emilmont | 77:869cf507173a | 227 | #define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) |
| emilmont | 77:869cf507173a | 228 | #define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) |
| emilmont | 77:869cf507173a | 229 | #define SDIO_IT_TXDAVL ((uint32_t)0x00100000) |
| emilmont | 77:869cf507173a | 230 | #define SDIO_IT_RXDAVL ((uint32_t)0x00200000) |
| emilmont | 77:869cf507173a | 231 | #define SDIO_IT_SDIOIT ((uint32_t)0x00400000) |
| emilmont | 77:869cf507173a | 232 | #define SDIO_IT_CEATAEND ((uint32_t)0x00800000) |
| emilmont | 77:869cf507173a | 233 | #define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) |
| emilmont | 77:869cf507173a | 234 | /** |
| emilmont | 77:869cf507173a | 235 | * @} |
| emilmont | 77:869cf507173a | 236 | */ |
| emilmont | 77:869cf507173a | 237 | |
| emilmont | 77:869cf507173a | 238 | /** @defgroup SDIO_Command_Index |
| emilmont | 77:869cf507173a | 239 | * @{ |
| emilmont | 77:869cf507173a | 240 | */ |
| emilmont | 77:869cf507173a | 241 | |
| emilmont | 77:869cf507173a | 242 | #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) |
| emilmont | 77:869cf507173a | 243 | /** |
| emilmont | 77:869cf507173a | 244 | * @} |
| emilmont | 77:869cf507173a | 245 | */ |
| emilmont | 77:869cf507173a | 246 | |
| emilmont | 77:869cf507173a | 247 | /** @defgroup SDIO_Response_Type |
| emilmont | 77:869cf507173a | 248 | * @{ |
| emilmont | 77:869cf507173a | 249 | */ |
| emilmont | 77:869cf507173a | 250 | |
| emilmont | 77:869cf507173a | 251 | #define SDIO_Response_No ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 252 | #define SDIO_Response_Short ((uint32_t)0x00000040) |
| emilmont | 77:869cf507173a | 253 | #define SDIO_Response_Long ((uint32_t)0x000000C0) |
| emilmont | 77:869cf507173a | 254 | #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \ |
| emilmont | 77:869cf507173a | 255 | ((RESPONSE) == SDIO_Response_Short) || \ |
| emilmont | 77:869cf507173a | 256 | ((RESPONSE) == SDIO_Response_Long)) |
| emilmont | 77:869cf507173a | 257 | /** |
| emilmont | 77:869cf507173a | 258 | * @} |
| emilmont | 77:869cf507173a | 259 | */ |
| emilmont | 77:869cf507173a | 260 | |
| emilmont | 77:869cf507173a | 261 | /** @defgroup SDIO_Wait_Interrupt_State |
| emilmont | 77:869cf507173a | 262 | * @{ |
| emilmont | 77:869cf507173a | 263 | */ |
| emilmont | 77:869cf507173a | 264 | |
| emilmont | 77:869cf507173a | 265 | #define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ |
| emilmont | 77:869cf507173a | 266 | #define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ |
| emilmont | 77:869cf507173a | 267 | #define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ |
| emilmont | 77:869cf507173a | 268 | #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \ |
| emilmont | 77:869cf507173a | 269 | ((WAIT) == SDIO_Wait_Pend)) |
| emilmont | 77:869cf507173a | 270 | /** |
| emilmont | 77:869cf507173a | 271 | * @} |
| emilmont | 77:869cf507173a | 272 | */ |
| emilmont | 77:869cf507173a | 273 | |
| emilmont | 77:869cf507173a | 274 | /** @defgroup SDIO_CPSM_State |
| emilmont | 77:869cf507173a | 275 | * @{ |
| emilmont | 77:869cf507173a | 276 | */ |
| emilmont | 77:869cf507173a | 277 | |
| emilmont | 77:869cf507173a | 278 | #define SDIO_CPSM_Disable ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 279 | #define SDIO_CPSM_Enable ((uint32_t)0x00000400) |
| emilmont | 77:869cf507173a | 280 | #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable)) |
| emilmont | 77:869cf507173a | 281 | /** |
| emilmont | 77:869cf507173a | 282 | * @} |
| emilmont | 77:869cf507173a | 283 | */ |
| emilmont | 77:869cf507173a | 284 | |
| emilmont | 77:869cf507173a | 285 | /** @defgroup SDIO_Response_Registers |
| emilmont | 77:869cf507173a | 286 | * @{ |
| emilmont | 77:869cf507173a | 287 | */ |
| emilmont | 77:869cf507173a | 288 | |
| emilmont | 77:869cf507173a | 289 | #define SDIO_RESP1 ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 290 | #define SDIO_RESP2 ((uint32_t)0x00000004) |
| emilmont | 77:869cf507173a | 291 | #define SDIO_RESP3 ((uint32_t)0x00000008) |
| emilmont | 77:869cf507173a | 292 | #define SDIO_RESP4 ((uint32_t)0x0000000C) |
| emilmont | 77:869cf507173a | 293 | #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \ |
| emilmont | 77:869cf507173a | 294 | ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) |
| emilmont | 77:869cf507173a | 295 | /** |
| emilmont | 77:869cf507173a | 296 | * @} |
| emilmont | 77:869cf507173a | 297 | */ |
| emilmont | 77:869cf507173a | 298 | |
| emilmont | 77:869cf507173a | 299 | /** @defgroup SDIO_Data_Length |
| emilmont | 77:869cf507173a | 300 | * @{ |
| emilmont | 77:869cf507173a | 301 | */ |
| emilmont | 77:869cf507173a | 302 | |
| emilmont | 77:869cf507173a | 303 | #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) |
| emilmont | 77:869cf507173a | 304 | /** |
| emilmont | 77:869cf507173a | 305 | * @} |
| emilmont | 77:869cf507173a | 306 | */ |
| emilmont | 77:869cf507173a | 307 | |
| emilmont | 77:869cf507173a | 308 | /** @defgroup SDIO_Data_Block_Size |
| emilmont | 77:869cf507173a | 309 | * @{ |
| emilmont | 77:869cf507173a | 310 | */ |
| emilmont | 77:869cf507173a | 311 | |
| emilmont | 77:869cf507173a | 312 | #define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 313 | #define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) |
| emilmont | 77:869cf507173a | 314 | #define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) |
| emilmont | 77:869cf507173a | 315 | #define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) |
| emilmont | 77:869cf507173a | 316 | #define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) |
| emilmont | 77:869cf507173a | 317 | #define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) |
| emilmont | 77:869cf507173a | 318 | #define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) |
| emilmont | 77:869cf507173a | 319 | #define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) |
| emilmont | 77:869cf507173a | 320 | #define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) |
| emilmont | 77:869cf507173a | 321 | #define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) |
| emilmont | 77:869cf507173a | 322 | #define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) |
| emilmont | 77:869cf507173a | 323 | #define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) |
| emilmont | 77:869cf507173a | 324 | #define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) |
| emilmont | 77:869cf507173a | 325 | #define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) |
| emilmont | 77:869cf507173a | 326 | #define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) |
| emilmont | 77:869cf507173a | 327 | #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \ |
| emilmont | 77:869cf507173a | 328 | ((SIZE) == SDIO_DataBlockSize_2b) || \ |
| emilmont | 77:869cf507173a | 329 | ((SIZE) == SDIO_DataBlockSize_4b) || \ |
| emilmont | 77:869cf507173a | 330 | ((SIZE) == SDIO_DataBlockSize_8b) || \ |
| emilmont | 77:869cf507173a | 331 | ((SIZE) == SDIO_DataBlockSize_16b) || \ |
| emilmont | 77:869cf507173a | 332 | ((SIZE) == SDIO_DataBlockSize_32b) || \ |
| emilmont | 77:869cf507173a | 333 | ((SIZE) == SDIO_DataBlockSize_64b) || \ |
| emilmont | 77:869cf507173a | 334 | ((SIZE) == SDIO_DataBlockSize_128b) || \ |
| emilmont | 77:869cf507173a | 335 | ((SIZE) == SDIO_DataBlockSize_256b) || \ |
| emilmont | 77:869cf507173a | 336 | ((SIZE) == SDIO_DataBlockSize_512b) || \ |
| emilmont | 77:869cf507173a | 337 | ((SIZE) == SDIO_DataBlockSize_1024b) || \ |
| emilmont | 77:869cf507173a | 338 | ((SIZE) == SDIO_DataBlockSize_2048b) || \ |
| emilmont | 77:869cf507173a | 339 | ((SIZE) == SDIO_DataBlockSize_4096b) || \ |
| emilmont | 77:869cf507173a | 340 | ((SIZE) == SDIO_DataBlockSize_8192b) || \ |
| emilmont | 77:869cf507173a | 341 | ((SIZE) == SDIO_DataBlockSize_16384b)) |
| emilmont | 77:869cf507173a | 342 | /** |
| emilmont | 77:869cf507173a | 343 | * @} |
| emilmont | 77:869cf507173a | 344 | */ |
| emilmont | 77:869cf507173a | 345 | |
| emilmont | 77:869cf507173a | 346 | /** @defgroup SDIO_Transfer_Direction |
| emilmont | 77:869cf507173a | 347 | * @{ |
| emilmont | 77:869cf507173a | 348 | */ |
| emilmont | 77:869cf507173a | 349 | |
| emilmont | 77:869cf507173a | 350 | #define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 351 | #define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) |
| emilmont | 77:869cf507173a | 352 | #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \ |
| emilmont | 77:869cf507173a | 353 | ((DIR) == SDIO_TransferDir_ToSDIO)) |
| emilmont | 77:869cf507173a | 354 | /** |
| emilmont | 77:869cf507173a | 355 | * @} |
| emilmont | 77:869cf507173a | 356 | */ |
| emilmont | 77:869cf507173a | 357 | |
| emilmont | 77:869cf507173a | 358 | /** @defgroup SDIO_Transfer_Type |
| emilmont | 77:869cf507173a | 359 | * @{ |
| emilmont | 77:869cf507173a | 360 | */ |
| emilmont | 77:869cf507173a | 361 | |
| emilmont | 77:869cf507173a | 362 | #define SDIO_TransferMode_Block ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 363 | #define SDIO_TransferMode_Stream ((uint32_t)0x00000004) |
| emilmont | 77:869cf507173a | 364 | #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \ |
| emilmont | 77:869cf507173a | 365 | ((MODE) == SDIO_TransferMode_Block)) |
| emilmont | 77:869cf507173a | 366 | /** |
| emilmont | 77:869cf507173a | 367 | * @} |
| emilmont | 77:869cf507173a | 368 | */ |
| emilmont | 77:869cf507173a | 369 | |
| emilmont | 77:869cf507173a | 370 | /** @defgroup SDIO_DPSM_State |
| emilmont | 77:869cf507173a | 371 | * @{ |
| emilmont | 77:869cf507173a | 372 | */ |
| emilmont | 77:869cf507173a | 373 | |
| emilmont | 77:869cf507173a | 374 | #define SDIO_DPSM_Disable ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 375 | #define SDIO_DPSM_Enable ((uint32_t)0x00000001) |
| emilmont | 77:869cf507173a | 376 | #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable)) |
| emilmont | 77:869cf507173a | 377 | /** |
| emilmont | 77:869cf507173a | 378 | * @} |
| emilmont | 77:869cf507173a | 379 | */ |
| emilmont | 77:869cf507173a | 380 | |
| emilmont | 77:869cf507173a | 381 | /** @defgroup SDIO_Flags |
| emilmont | 77:869cf507173a | 382 | * @{ |
| emilmont | 77:869cf507173a | 383 | */ |
| emilmont | 77:869cf507173a | 384 | |
| emilmont | 77:869cf507173a | 385 | #define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) |
| emilmont | 77:869cf507173a | 386 | #define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) |
| emilmont | 77:869cf507173a | 387 | #define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) |
| emilmont | 77:869cf507173a | 388 | #define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) |
| emilmont | 77:869cf507173a | 389 | #define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) |
| emilmont | 77:869cf507173a | 390 | #define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) |
| emilmont | 77:869cf507173a | 391 | #define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) |
| emilmont | 77:869cf507173a | 392 | #define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) |
| emilmont | 77:869cf507173a | 393 | #define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) |
| emilmont | 77:869cf507173a | 394 | #define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) |
| emilmont | 77:869cf507173a | 395 | #define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) |
| emilmont | 77:869cf507173a | 396 | #define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) |
| emilmont | 77:869cf507173a | 397 | #define SDIO_FLAG_TXACT ((uint32_t)0x00001000) |
| emilmont | 77:869cf507173a | 398 | #define SDIO_FLAG_RXACT ((uint32_t)0x00002000) |
| emilmont | 77:869cf507173a | 399 | #define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) |
| emilmont | 77:869cf507173a | 400 | #define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) |
| emilmont | 77:869cf507173a | 401 | #define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) |
| emilmont | 77:869cf507173a | 402 | #define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) |
| emilmont | 77:869cf507173a | 403 | #define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) |
| emilmont | 77:869cf507173a | 404 | #define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) |
| emilmont | 77:869cf507173a | 405 | #define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) |
| emilmont | 77:869cf507173a | 406 | #define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) |
| emilmont | 77:869cf507173a | 407 | #define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) |
| emilmont | 77:869cf507173a | 408 | #define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) |
| emilmont | 77:869cf507173a | 409 | #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \ |
| emilmont | 77:869cf507173a | 410 | ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ |
| emilmont | 77:869cf507173a | 411 | ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ |
| emilmont | 77:869cf507173a | 412 | ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ |
| emilmont | 77:869cf507173a | 413 | ((FLAG) == SDIO_FLAG_TXUNDERR) || \ |
| emilmont | 77:869cf507173a | 414 | ((FLAG) == SDIO_FLAG_RXOVERR) || \ |
| emilmont | 77:869cf507173a | 415 | ((FLAG) == SDIO_FLAG_CMDREND) || \ |
| emilmont | 77:869cf507173a | 416 | ((FLAG) == SDIO_FLAG_CMDSENT) || \ |
| emilmont | 77:869cf507173a | 417 | ((FLAG) == SDIO_FLAG_DATAEND) || \ |
| emilmont | 77:869cf507173a | 418 | ((FLAG) == SDIO_FLAG_STBITERR) || \ |
| emilmont | 77:869cf507173a | 419 | ((FLAG) == SDIO_FLAG_DBCKEND) || \ |
| emilmont | 77:869cf507173a | 420 | ((FLAG) == SDIO_FLAG_CMDACT) || \ |
| emilmont | 77:869cf507173a | 421 | ((FLAG) == SDIO_FLAG_TXACT) || \ |
| emilmont | 77:869cf507173a | 422 | ((FLAG) == SDIO_FLAG_RXACT) || \ |
| emilmont | 77:869cf507173a | 423 | ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ |
| emilmont | 77:869cf507173a | 424 | ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ |
| emilmont | 77:869cf507173a | 425 | ((FLAG) == SDIO_FLAG_TXFIFOF) || \ |
| emilmont | 77:869cf507173a | 426 | ((FLAG) == SDIO_FLAG_RXFIFOF) || \ |
| emilmont | 77:869cf507173a | 427 | ((FLAG) == SDIO_FLAG_TXFIFOE) || \ |
| emilmont | 77:869cf507173a | 428 | ((FLAG) == SDIO_FLAG_RXFIFOE) || \ |
| emilmont | 77:869cf507173a | 429 | ((FLAG) == SDIO_FLAG_TXDAVL) || \ |
| emilmont | 77:869cf507173a | 430 | ((FLAG) == SDIO_FLAG_RXDAVL) || \ |
| emilmont | 77:869cf507173a | 431 | ((FLAG) == SDIO_FLAG_SDIOIT) || \ |
| emilmont | 77:869cf507173a | 432 | ((FLAG) == SDIO_FLAG_CEATAEND)) |
| emilmont | 77:869cf507173a | 433 | |
| emilmont | 77:869cf507173a | 434 | #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) |
| emilmont | 77:869cf507173a | 435 | |
| emilmont | 77:869cf507173a | 436 | #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \ |
| emilmont | 77:869cf507173a | 437 | ((IT) == SDIO_IT_DCRCFAIL) || \ |
| emilmont | 77:869cf507173a | 438 | ((IT) == SDIO_IT_CTIMEOUT) || \ |
| emilmont | 77:869cf507173a | 439 | ((IT) == SDIO_IT_DTIMEOUT) || \ |
| emilmont | 77:869cf507173a | 440 | ((IT) == SDIO_IT_TXUNDERR) || \ |
| emilmont | 77:869cf507173a | 441 | ((IT) == SDIO_IT_RXOVERR) || \ |
| emilmont | 77:869cf507173a | 442 | ((IT) == SDIO_IT_CMDREND) || \ |
| emilmont | 77:869cf507173a | 443 | ((IT) == SDIO_IT_CMDSENT) || \ |
| emilmont | 77:869cf507173a | 444 | ((IT) == SDIO_IT_DATAEND) || \ |
| emilmont | 77:869cf507173a | 445 | ((IT) == SDIO_IT_STBITERR) || \ |
| emilmont | 77:869cf507173a | 446 | ((IT) == SDIO_IT_DBCKEND) || \ |
| emilmont | 77:869cf507173a | 447 | ((IT) == SDIO_IT_CMDACT) || \ |
| emilmont | 77:869cf507173a | 448 | ((IT) == SDIO_IT_TXACT) || \ |
| emilmont | 77:869cf507173a | 449 | ((IT) == SDIO_IT_RXACT) || \ |
| emilmont | 77:869cf507173a | 450 | ((IT) == SDIO_IT_TXFIFOHE) || \ |
| emilmont | 77:869cf507173a | 451 | ((IT) == SDIO_IT_RXFIFOHF) || \ |
| emilmont | 77:869cf507173a | 452 | ((IT) == SDIO_IT_TXFIFOF) || \ |
| emilmont | 77:869cf507173a | 453 | ((IT) == SDIO_IT_RXFIFOF) || \ |
| emilmont | 77:869cf507173a | 454 | ((IT) == SDIO_IT_TXFIFOE) || \ |
| emilmont | 77:869cf507173a | 455 | ((IT) == SDIO_IT_RXFIFOE) || \ |
| emilmont | 77:869cf507173a | 456 | ((IT) == SDIO_IT_TXDAVL) || \ |
| emilmont | 77:869cf507173a | 457 | ((IT) == SDIO_IT_RXDAVL) || \ |
| emilmont | 77:869cf507173a | 458 | ((IT) == SDIO_IT_SDIOIT) || \ |
| emilmont | 77:869cf507173a | 459 | ((IT) == SDIO_IT_CEATAEND)) |
| emilmont | 77:869cf507173a | 460 | |
| emilmont | 77:869cf507173a | 461 | #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) |
| emilmont | 77:869cf507173a | 462 | |
| emilmont | 77:869cf507173a | 463 | /** |
| emilmont | 77:869cf507173a | 464 | * @} |
| emilmont | 77:869cf507173a | 465 | */ |
| emilmont | 77:869cf507173a | 466 | |
| emilmont | 77:869cf507173a | 467 | /** @defgroup SDIO_Read_Wait_Mode |
| emilmont | 77:869cf507173a | 468 | * @{ |
| emilmont | 77:869cf507173a | 469 | */ |
| emilmont | 77:869cf507173a | 470 | |
| emilmont | 77:869cf507173a | 471 | #define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001) |
| emilmont | 77:869cf507173a | 472 | #define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 473 | #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \ |
| emilmont | 77:869cf507173a | 474 | ((MODE) == SDIO_ReadWaitMode_DATA2)) |
| emilmont | 77:869cf507173a | 475 | /** |
| emilmont | 77:869cf507173a | 476 | * @} |
| emilmont | 77:869cf507173a | 477 | */ |
| emilmont | 77:869cf507173a | 478 | |
| emilmont | 77:869cf507173a | 479 | /** |
| emilmont | 77:869cf507173a | 480 | * @} |
| emilmont | 77:869cf507173a | 481 | */ |
| emilmont | 77:869cf507173a | 482 | |
| emilmont | 77:869cf507173a | 483 | /* Exported macro ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 484 | /* Exported functions ------------------------------------------------------- */ |
| emilmont | 77:869cf507173a | 485 | /* Function used to set the SDIO configuration to the default reset state ****/ |
| emilmont | 77:869cf507173a | 486 | void SDIO_DeInit(void); |
| emilmont | 77:869cf507173a | 487 | |
| emilmont | 77:869cf507173a | 488 | /* Initialization and Configuration functions *********************************/ |
| emilmont | 77:869cf507173a | 489 | void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct); |
| emilmont | 77:869cf507173a | 490 | void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct); |
| emilmont | 77:869cf507173a | 491 | void SDIO_ClockCmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 492 | void SDIO_SetPowerState(uint32_t SDIO_PowerState); |
| emilmont | 77:869cf507173a | 493 | uint32_t SDIO_GetPowerState(void); |
| emilmont | 77:869cf507173a | 494 | |
| emilmont | 77:869cf507173a | 495 | /* DMA transfers management functions *****************************************/ |
| emilmont | 77:869cf507173a | 496 | void SDIO_DMACmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 497 | |
| emilmont | 77:869cf507173a | 498 | /* Command path state machine (CPSM) management functions *********************/ |
| emilmont | 77:869cf507173a | 499 | void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct); |
| emilmont | 77:869cf507173a | 500 | void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct); |
| emilmont | 77:869cf507173a | 501 | uint8_t SDIO_GetCommandResponse(void); |
| emilmont | 77:869cf507173a | 502 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); |
| emilmont | 77:869cf507173a | 503 | |
| emilmont | 77:869cf507173a | 504 | /* Data path state machine (DPSM) management functions ************************/ |
| emilmont | 77:869cf507173a | 505 | void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct); |
| emilmont | 77:869cf507173a | 506 | void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct); |
| emilmont | 77:869cf507173a | 507 | uint32_t SDIO_GetDataCounter(void); |
| emilmont | 77:869cf507173a | 508 | uint32_t SDIO_ReadData(void); |
| emilmont | 77:869cf507173a | 509 | void SDIO_WriteData(uint32_t Data); |
| emilmont | 77:869cf507173a | 510 | uint32_t SDIO_GetFIFOCount(void); |
| emilmont | 77:869cf507173a | 511 | |
| emilmont | 77:869cf507173a | 512 | /* SDIO IO Cards mode management functions ************************************/ |
| emilmont | 77:869cf507173a | 513 | void SDIO_StartSDIOReadWait(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 514 | void SDIO_StopSDIOReadWait(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 515 | void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode); |
| emilmont | 77:869cf507173a | 516 | void SDIO_SetSDIOOperation(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 517 | void SDIO_SendSDIOSuspendCmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 518 | |
| emilmont | 77:869cf507173a | 519 | /* CE-ATA mode management functions *******************************************/ |
| emilmont | 77:869cf507173a | 520 | void SDIO_CommandCompletionCmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 521 | void SDIO_CEATAITCmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 522 | void SDIO_SendCEATACmd(FunctionalState NewState); |
| emilmont | 77:869cf507173a | 523 | |
| emilmont | 77:869cf507173a | 524 | /* Interrupts and flags management functions **********************************/ |
| emilmont | 77:869cf507173a | 525 | void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState); |
| emilmont | 77:869cf507173a | 526 | FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); |
| emilmont | 77:869cf507173a | 527 | void SDIO_ClearFlag(uint32_t SDIO_FLAG); |
| emilmont | 77:869cf507173a | 528 | ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); |
| emilmont | 77:869cf507173a | 529 | void SDIO_ClearITPendingBit(uint32_t SDIO_IT); |
| emilmont | 77:869cf507173a | 530 | |
| emilmont | 77:869cf507173a | 531 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 532 | } |
| emilmont | 77:869cf507173a | 533 | #endif |
| emilmont | 77:869cf507173a | 534 | |
| emilmont | 77:869cf507173a | 535 | #endif /* __STM32L1xx_SDIO_H */ |
| emilmont | 77:869cf507173a | 536 | |
| emilmont | 77:869cf507173a | 537 | /** |
| emilmont | 77:869cf507173a | 538 | * @} |
| emilmont | 77:869cf507173a | 539 | */ |
| emilmont | 77:869cf507173a | 540 | |
| emilmont | 77:869cf507173a | 541 | /** |
| emilmont | 77:869cf507173a | 542 | * @} |
| emilmont | 77:869cf507173a | 543 | */ |
| emilmont | 77:869cf507173a | 544 | |
| emilmont | 77:869cf507173a | 545 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |