version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
81:7d30d6019079
version_2.0

Who changed what in which revision?

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emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32l1xx_lcd.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 31-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the LCD firmware
emilmont 77:869cf507173a 8 * library.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
bogdanm 81:7d30d6019079 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
bogdanm 81:7d30d6019079 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 81:7d30d6019079 15 * are permitted provided that the following conditions are met:
bogdanm 81:7d30d6019079 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 81:7d30d6019079 17 * this list of conditions and the following disclaimer.
bogdanm 81:7d30d6019079 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 81:7d30d6019079 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 81:7d30d6019079 20 * and/or other materials provided with the distribution.
bogdanm 81:7d30d6019079 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 81:7d30d6019079 22 * may be used to endorse or promote products derived from this software
bogdanm 81:7d30d6019079 23 * without specific prior written permission.
emilmont 77:869cf507173a 24 *
bogdanm 81:7d30d6019079 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 81:7d30d6019079 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 81:7d30d6019079 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 81:7d30d6019079 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 81:7d30d6019079 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 81:7d30d6019079 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 81:7d30d6019079 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 81:7d30d6019079 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 81:7d30d6019079 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 81:7d30d6019079 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 35 *
emilmont 77:869cf507173a 36 ******************************************************************************
emilmont 77:869cf507173a 37 */
emilmont 77:869cf507173a 38
emilmont 77:869cf507173a 39 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 40 #ifndef __STM32L1xx_LCD_H
emilmont 77:869cf507173a 41 #define __STM32L1xx_LCD_H
emilmont 77:869cf507173a 42
emilmont 77:869cf507173a 43 #ifdef __cplusplus
emilmont 77:869cf507173a 44 extern "C" {
emilmont 77:869cf507173a 45 #endif
emilmont 77:869cf507173a 46
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32l1xx.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32L1xx_StdPeriph_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup LCD
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57
emilmont 77:869cf507173a 58 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 /**
emilmont 77:869cf507173a 61 * @brief LCD Init structure definition
emilmont 77:869cf507173a 62 */
emilmont 77:869cf507173a 63
emilmont 77:869cf507173a 64 typedef struct
emilmont 77:869cf507173a 65 {
emilmont 77:869cf507173a 66 uint32_t LCD_Prescaler; /*!< Configures the LCD Prescaler.
emilmont 77:869cf507173a 67 This parameter can be one value of @ref LCD_Prescaler */
emilmont 77:869cf507173a 68 uint32_t LCD_Divider; /*!< Configures the LCD Divider.
emilmont 77:869cf507173a 69 This parameter can be one value of @ref LCD_Divider */
emilmont 77:869cf507173a 70 uint32_t LCD_Duty; /*!< Configures the LCD Duty.
emilmont 77:869cf507173a 71 This parameter can be one value of @ref LCD_Duty */
emilmont 77:869cf507173a 72 uint32_t LCD_Bias; /*!< Configures the LCD Bias.
emilmont 77:869cf507173a 73 This parameter can be one value of @ref LCD_Bias */
emilmont 77:869cf507173a 74 uint32_t LCD_VoltageSource; /*!< Selects the LCD Voltage source.
emilmont 77:869cf507173a 75 This parameter can be one value of @ref LCD_Voltage_Source */
emilmont 77:869cf507173a 76 }LCD_InitTypeDef;
emilmont 77:869cf507173a 77
emilmont 77:869cf507173a 78
emilmont 77:869cf507173a 79 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 /** @defgroup LCD_Exported_Constants
emilmont 77:869cf507173a 82 * @{
emilmont 77:869cf507173a 83 */
emilmont 77:869cf507173a 84
emilmont 77:869cf507173a 85 /** @defgroup LCD_Prescaler
emilmont 77:869cf507173a 86 * @{
emilmont 77:869cf507173a 87 */
emilmont 77:869cf507173a 88
emilmont 77:869cf507173a 89 #define LCD_Prescaler_1 ((uint32_t)0x00000000) /*!< CLKPS = LCDCLK */
emilmont 77:869cf507173a 90 #define LCD_Prescaler_2 ((uint32_t)0x00400000) /*!< CLKPS = LCDCLK/2 */
emilmont 77:869cf507173a 91 #define LCD_Prescaler_4 ((uint32_t)0x00800000) /*!< CLKPS = LCDCLK/4 */
emilmont 77:869cf507173a 92 #define LCD_Prescaler_8 ((uint32_t)0x00C00000) /*!< CLKPS = LCDCLK/8 */
emilmont 77:869cf507173a 93 #define LCD_Prescaler_16 ((uint32_t)0x01000000) /*!< CLKPS = LCDCLK/16 */
emilmont 77:869cf507173a 94 #define LCD_Prescaler_32 ((uint32_t)0x01400000) /*!< CLKPS = LCDCLK/32 */
emilmont 77:869cf507173a 95 #define LCD_Prescaler_64 ((uint32_t)0x01800000) /*!< CLKPS = LCDCLK/64 */
emilmont 77:869cf507173a 96 #define LCD_Prescaler_128 ((uint32_t)0x01C00000) /*!< CLKPS = LCDCLK/128 */
emilmont 77:869cf507173a 97 #define LCD_Prescaler_256 ((uint32_t)0x02000000) /*!< CLKPS = LCDCLK/256 */
emilmont 77:869cf507173a 98 #define LCD_Prescaler_512 ((uint32_t)0x02400000) /*!< CLKPS = LCDCLK/512 */
emilmont 77:869cf507173a 99 #define LCD_Prescaler_1024 ((uint32_t)0x02800000) /*!< CLKPS = LCDCLK/1024 */
emilmont 77:869cf507173a 100 #define LCD_Prescaler_2048 ((uint32_t)0x02C00000) /*!< CLKPS = LCDCLK/2048 */
emilmont 77:869cf507173a 101 #define LCD_Prescaler_4096 ((uint32_t)0x03000000) /*!< CLKPS = LCDCLK/4096 */
emilmont 77:869cf507173a 102 #define LCD_Prescaler_8192 ((uint32_t)0x03400000) /*!< CLKPS = LCDCLK/8192 */
emilmont 77:869cf507173a 103 #define LCD_Prescaler_16384 ((uint32_t)0x03800000) /*!< CLKPS = LCDCLK/16384 */
emilmont 77:869cf507173a 104 #define LCD_Prescaler_32768 ((uint32_t)0x03C00000) /*!< CLKPS = LCDCLK/32768 */
emilmont 77:869cf507173a 105
emilmont 77:869cf507173a 106 #define IS_LCD_PRESCALER(PRESCALER) (((PRESCALER) == LCD_Prescaler_1) || \
emilmont 77:869cf507173a 107 ((PRESCALER) == LCD_Prescaler_2) || \
emilmont 77:869cf507173a 108 ((PRESCALER) == LCD_Prescaler_4) || \
emilmont 77:869cf507173a 109 ((PRESCALER) == LCD_Prescaler_8) || \
emilmont 77:869cf507173a 110 ((PRESCALER) == LCD_Prescaler_16) || \
emilmont 77:869cf507173a 111 ((PRESCALER) == LCD_Prescaler_32) || \
emilmont 77:869cf507173a 112 ((PRESCALER) == LCD_Prescaler_64) || \
emilmont 77:869cf507173a 113 ((PRESCALER) == LCD_Prescaler_128) || \
emilmont 77:869cf507173a 114 ((PRESCALER) == LCD_Prescaler_256) || \
emilmont 77:869cf507173a 115 ((PRESCALER) == LCD_Prescaler_512) || \
emilmont 77:869cf507173a 116 ((PRESCALER) == LCD_Prescaler_1024) || \
emilmont 77:869cf507173a 117 ((PRESCALER) == LCD_Prescaler_2048) || \
emilmont 77:869cf507173a 118 ((PRESCALER) == LCD_Prescaler_4096) || \
emilmont 77:869cf507173a 119 ((PRESCALER) == LCD_Prescaler_8192) || \
emilmont 77:869cf507173a 120 ((PRESCALER) == LCD_Prescaler_16384) || \
emilmont 77:869cf507173a 121 ((PRESCALER) == LCD_Prescaler_32768))
emilmont 77:869cf507173a 122
emilmont 77:869cf507173a 123 /**
emilmont 77:869cf507173a 124 * @}
emilmont 77:869cf507173a 125 */
emilmont 77:869cf507173a 126
emilmont 77:869cf507173a 127 /** @defgroup LCD_Divider
emilmont 77:869cf507173a 128 * @{
emilmont 77:869cf507173a 129 */
emilmont 77:869cf507173a 130
emilmont 77:869cf507173a 131 #define LCD_Divider_16 ((uint32_t)0x00000000) /*!< LCD frequency = CLKPS/16 */
emilmont 77:869cf507173a 132 #define LCD_Divider_17 ((uint32_t)0x00040000) /*!< LCD frequency = CLKPS/17 */
emilmont 77:869cf507173a 133 #define LCD_Divider_18 ((uint32_t)0x00080000) /*!< LCD frequency = CLKPS/18 */
emilmont 77:869cf507173a 134 #define LCD_Divider_19 ((uint32_t)0x000C0000) /*!< LCD frequency = CLKPS/19 */
emilmont 77:869cf507173a 135 #define LCD_Divider_20 ((uint32_t)0x00100000) /*!< LCD frequency = CLKPS/20 */
emilmont 77:869cf507173a 136 #define LCD_Divider_21 ((uint32_t)0x00140000) /*!< LCD frequency = CLKPS/21 */
emilmont 77:869cf507173a 137 #define LCD_Divider_22 ((uint32_t)0x00180000) /*!< LCD frequency = CLKPS/22 */
emilmont 77:869cf507173a 138 #define LCD_Divider_23 ((uint32_t)0x001C0000) /*!< LCD frequency = CLKPS/23 */
emilmont 77:869cf507173a 139 #define LCD_Divider_24 ((uint32_t)0x00200000) /*!< LCD frequency = CLKPS/24 */
emilmont 77:869cf507173a 140 #define LCD_Divider_25 ((uint32_t)0x00240000) /*!< LCD frequency = CLKPS/25 */
emilmont 77:869cf507173a 141 #define LCD_Divider_26 ((uint32_t)0x00280000) /*!< LCD frequency = CLKPS/26 */
emilmont 77:869cf507173a 142 #define LCD_Divider_27 ((uint32_t)0x002C0000) /*!< LCD frequency = CLKPS/27 */
emilmont 77:869cf507173a 143 #define LCD_Divider_28 ((uint32_t)0x00300000) /*!< LCD frequency = CLKPS/28 */
emilmont 77:869cf507173a 144 #define LCD_Divider_29 ((uint32_t)0x00340000) /*!< LCD frequency = CLKPS/29 */
emilmont 77:869cf507173a 145 #define LCD_Divider_30 ((uint32_t)0x00380000) /*!< LCD frequency = CLKPS/30 */
emilmont 77:869cf507173a 146 #define LCD_Divider_31 ((uint32_t)0x003C0000) /*!< LCD frequency = CLKPS/31 */
emilmont 77:869cf507173a 147
emilmont 77:869cf507173a 148 #define IS_LCD_DIVIDER(DIVIDER) (((DIVIDER) == LCD_Divider_16) || \
emilmont 77:869cf507173a 149 ((DIVIDER) == LCD_Divider_17) || \
emilmont 77:869cf507173a 150 ((DIVIDER) == LCD_Divider_18) || \
emilmont 77:869cf507173a 151 ((DIVIDER) == LCD_Divider_19) || \
emilmont 77:869cf507173a 152 ((DIVIDER) == LCD_Divider_20) || \
emilmont 77:869cf507173a 153 ((DIVIDER) == LCD_Divider_21) || \
emilmont 77:869cf507173a 154 ((DIVIDER) == LCD_Divider_22) || \
emilmont 77:869cf507173a 155 ((DIVIDER) == LCD_Divider_23) || \
emilmont 77:869cf507173a 156 ((DIVIDER) == LCD_Divider_24) || \
emilmont 77:869cf507173a 157 ((DIVIDER) == LCD_Divider_25) || \
emilmont 77:869cf507173a 158 ((DIVIDER) == LCD_Divider_26) || \
emilmont 77:869cf507173a 159 ((DIVIDER) == LCD_Divider_27) || \
emilmont 77:869cf507173a 160 ((DIVIDER) == LCD_Divider_28) || \
emilmont 77:869cf507173a 161 ((DIVIDER) == LCD_Divider_29) || \
emilmont 77:869cf507173a 162 ((DIVIDER) == LCD_Divider_30) || \
emilmont 77:869cf507173a 163 ((DIVIDER) == LCD_Divider_31))
emilmont 77:869cf507173a 164
emilmont 77:869cf507173a 165 /**
emilmont 77:869cf507173a 166 * @}
emilmont 77:869cf507173a 167 */
emilmont 77:869cf507173a 168
emilmont 77:869cf507173a 169
emilmont 77:869cf507173a 170 /** @defgroup LCD_Duty
emilmont 77:869cf507173a 171 * @{
emilmont 77:869cf507173a 172 */
emilmont 77:869cf507173a 173
emilmont 77:869cf507173a 174 #define LCD_Duty_Static ((uint32_t)0x00000000) /*!< Static duty */
emilmont 77:869cf507173a 175 #define LCD_Duty_1_2 ((uint32_t)0x00000004) /*!< 1/2 duty */
emilmont 77:869cf507173a 176 #define LCD_Duty_1_3 ((uint32_t)0x00000008) /*!< 1/3 duty */
emilmont 77:869cf507173a 177 #define LCD_Duty_1_4 ((uint32_t)0x0000000C) /*!< 1/4 duty */
emilmont 77:869cf507173a 178 #define LCD_Duty_1_8 ((uint32_t)0x00000010) /*!< 1/4 duty */
emilmont 77:869cf507173a 179
emilmont 77:869cf507173a 180 #define IS_LCD_DUTY(DUTY) (((DUTY) == LCD_Duty_Static) || \
emilmont 77:869cf507173a 181 ((DUTY) == LCD_Duty_1_2) || \
emilmont 77:869cf507173a 182 ((DUTY) == LCD_Duty_1_3) || \
emilmont 77:869cf507173a 183 ((DUTY) == LCD_Duty_1_4) || \
emilmont 77:869cf507173a 184 ((DUTY) == LCD_Duty_1_8))
emilmont 77:869cf507173a 185
emilmont 77:869cf507173a 186 /**
emilmont 77:869cf507173a 187 * @}
emilmont 77:869cf507173a 188 */
emilmont 77:869cf507173a 189
emilmont 77:869cf507173a 190
emilmont 77:869cf507173a 191 /** @defgroup LCD_Bias
emilmont 77:869cf507173a 192 * @{
emilmont 77:869cf507173a 193 */
emilmont 77:869cf507173a 194
emilmont 77:869cf507173a 195 #define LCD_Bias_1_4 ((uint32_t)0x00000000) /*!< 1/4 Bias */
emilmont 77:869cf507173a 196 #define LCD_Bias_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */
emilmont 77:869cf507173a 197 #define LCD_Bias_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */
emilmont 77:869cf507173a 198
emilmont 77:869cf507173a 199 #define IS_LCD_BIAS(BIAS) (((BIAS) == LCD_Bias_1_4) || \
emilmont 77:869cf507173a 200 ((BIAS) == LCD_Bias_1_2) || \
emilmont 77:869cf507173a 201 ((BIAS) == LCD_Bias_1_3))
emilmont 77:869cf507173a 202 /**
emilmont 77:869cf507173a 203 * @}
emilmont 77:869cf507173a 204 */
emilmont 77:869cf507173a 205
emilmont 77:869cf507173a 206 /** @defgroup LCD_Voltage_Source
emilmont 77:869cf507173a 207 * @{
emilmont 77:869cf507173a 208 */
emilmont 77:869cf507173a 209
emilmont 77:869cf507173a 210 #define LCD_VoltageSource_Internal ((uint32_t)0x00000000) /*!< Internal voltage source for the LCD */
emilmont 77:869cf507173a 211 #define LCD_VoltageSource_External LCD_CR_VSEL /*!< External voltage source for the LCD */
emilmont 77:869cf507173a 212
emilmont 77:869cf507173a 213 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VoltageSource_Internal) || \
emilmont 77:869cf507173a 214 ((SOURCE) == LCD_VoltageSource_External))
emilmont 77:869cf507173a 215
emilmont 77:869cf507173a 216 /**
emilmont 77:869cf507173a 217 * @}
emilmont 77:869cf507173a 218 */
emilmont 77:869cf507173a 219
emilmont 77:869cf507173a 220 /** @defgroup LCD_Interrupts
emilmont 77:869cf507173a 221 * @{
emilmont 77:869cf507173a 222 */
emilmont 77:869cf507173a 223 #define LCD_IT_SOF LCD_FCR_SOFIE
emilmont 77:869cf507173a 224 #define LCD_IT_UDD LCD_FCR_UDDIE
emilmont 77:869cf507173a 225
emilmont 77:869cf507173a 226 #define IS_LCD_IT(IT) ((((IT) & (uint32_t)0xFFFFFFF5) == 0x00) && ((IT) != 0x00))
emilmont 77:869cf507173a 227
emilmont 77:869cf507173a 228 #define IS_LCD_GET_IT(IT) (((IT) == LCD_IT_SOF) || ((IT) == LCD_IT_UDD))
emilmont 77:869cf507173a 229
emilmont 77:869cf507173a 230 /**
emilmont 77:869cf507173a 231 * @}
emilmont 77:869cf507173a 232 */
emilmont 77:869cf507173a 233
emilmont 77:869cf507173a 234 /** @defgroup LCD_PulseOnDuration
emilmont 77:869cf507173a 235 * @{
emilmont 77:869cf507173a 236 */
emilmont 77:869cf507173a 237
emilmont 77:869cf507173a 238 #define LCD_PulseOnDuration_0 ((uint32_t)0x00000000) /*!< Pulse ON duration = 0 pulse */
emilmont 77:869cf507173a 239 #define LCD_PulseOnDuration_1 ((uint32_t)0x00000010) /*!< Pulse ON duration = 1/CK_PS */
emilmont 77:869cf507173a 240 #define LCD_PulseOnDuration_2 ((uint32_t)0x00000020) /*!< Pulse ON duration = 2/CK_PS */
emilmont 77:869cf507173a 241 #define LCD_PulseOnDuration_3 ((uint32_t)0x00000030) /*!< Pulse ON duration = 3/CK_PS */
emilmont 77:869cf507173a 242 #define LCD_PulseOnDuration_4 ((uint32_t)0x00000040) /*!< Pulse ON duration = 4/CK_PS */
emilmont 77:869cf507173a 243 #define LCD_PulseOnDuration_5 ((uint32_t)0x00000050) /*!< Pulse ON duration = 5/CK_PS */
emilmont 77:869cf507173a 244 #define LCD_PulseOnDuration_6 ((uint32_t)0x00000060) /*!< Pulse ON duration = 6/CK_PS */
emilmont 77:869cf507173a 245 #define LCD_PulseOnDuration_7 ((uint32_t)0x00000070) /*!< Pulse ON duration = 7/CK_PS */
emilmont 77:869cf507173a 246
emilmont 77:869cf507173a 247 #define IS_LCD_PULSE_ON_DURATION(DURATION) (((DURATION) == LCD_PulseOnDuration_0) || \
emilmont 77:869cf507173a 248 ((DURATION) == LCD_PulseOnDuration_1) || \
emilmont 77:869cf507173a 249 ((DURATION) == LCD_PulseOnDuration_2) || \
emilmont 77:869cf507173a 250 ((DURATION) == LCD_PulseOnDuration_3) || \
emilmont 77:869cf507173a 251 ((DURATION) == LCD_PulseOnDuration_4) || \
emilmont 77:869cf507173a 252 ((DURATION) == LCD_PulseOnDuration_5) || \
emilmont 77:869cf507173a 253 ((DURATION) == LCD_PulseOnDuration_6) || \
emilmont 77:869cf507173a 254 ((DURATION) == LCD_PulseOnDuration_7))
emilmont 77:869cf507173a 255 /**
emilmont 77:869cf507173a 256 * @}
emilmont 77:869cf507173a 257 */
emilmont 77:869cf507173a 258
emilmont 77:869cf507173a 259
emilmont 77:869cf507173a 260 /** @defgroup LCD_DeadTime
emilmont 77:869cf507173a 261 * @{
emilmont 77:869cf507173a 262 */
emilmont 77:869cf507173a 263
emilmont 77:869cf507173a 264 #define LCD_DeadTime_0 ((uint32_t)0x00000000) /*!< No dead Time */
emilmont 77:869cf507173a 265 #define LCD_DeadTime_1 ((uint32_t)0x00000080) /*!< One Phase between different couple of Frame */
emilmont 77:869cf507173a 266 #define LCD_DeadTime_2 ((uint32_t)0x00000100) /*!< Two Phase between different couple of Frame */
emilmont 77:869cf507173a 267 #define LCD_DeadTime_3 ((uint32_t)0x00000180) /*!< Three Phase between different couple of Frame */
emilmont 77:869cf507173a 268 #define LCD_DeadTime_4 ((uint32_t)0x00000200) /*!< Four Phase between different couple of Frame */
emilmont 77:869cf507173a 269 #define LCD_DeadTime_5 ((uint32_t)0x00000280) /*!< Five Phase between different couple of Frame */
emilmont 77:869cf507173a 270 #define LCD_DeadTime_6 ((uint32_t)0x00000300) /*!< Six Phase between different couple of Frame */
emilmont 77:869cf507173a 271 #define LCD_DeadTime_7 ((uint32_t)0x00000380) /*!< Seven Phase between different couple of Frame */
emilmont 77:869cf507173a 272
emilmont 77:869cf507173a 273 #define IS_LCD_DEAD_TIME(TIME) (((TIME) == LCD_DeadTime_0) || \
emilmont 77:869cf507173a 274 ((TIME) == LCD_DeadTime_1) || \
emilmont 77:869cf507173a 275 ((TIME) == LCD_DeadTime_2) || \
emilmont 77:869cf507173a 276 ((TIME) == LCD_DeadTime_3) || \
emilmont 77:869cf507173a 277 ((TIME) == LCD_DeadTime_4) || \
emilmont 77:869cf507173a 278 ((TIME) == LCD_DeadTime_5) || \
emilmont 77:869cf507173a 279 ((TIME) == LCD_DeadTime_6) || \
emilmont 77:869cf507173a 280 ((TIME) == LCD_DeadTime_7))
emilmont 77:869cf507173a 281 /**
emilmont 77:869cf507173a 282 * @}
emilmont 77:869cf507173a 283 */
emilmont 77:869cf507173a 284
emilmont 77:869cf507173a 285 /** @defgroup LCD_BlinkMode
emilmont 77:869cf507173a 286 * @{
emilmont 77:869cf507173a 287 */
emilmont 77:869cf507173a 288
emilmont 77:869cf507173a 289 #define LCD_BlinkMode_Off ((uint32_t)0x00000000) /*!< Blink disabled */
emilmont 77:869cf507173a 290 #define LCD_BlinkMode_SEG0_COM0 ((uint32_t)0x00010000) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */
emilmont 77:869cf507173a 291 #define LCD_BlinkMode_SEG0_AllCOM ((uint32_t)0x00020000) /*!< Blink enabled on SEG[0], all COM (up to
emilmont 77:869cf507173a 292 8 pixels according to the programmed duty) */
emilmont 77:869cf507173a 293 #define LCD_BlinkMode_AllSEG_AllCOM ((uint32_t)0x00030000) /*!< Blink enabled on all SEG and all COM (all pixels) */
emilmont 77:869cf507173a 294
emilmont 77:869cf507173a 295 #define IS_LCD_BLINK_MODE(MODE) (((MODE) == LCD_BlinkMode_Off) || \
emilmont 77:869cf507173a 296 ((MODE) == LCD_BlinkMode_SEG0_COM0) || \
emilmont 77:869cf507173a 297 ((MODE) == LCD_BlinkMode_SEG0_AllCOM) || \
emilmont 77:869cf507173a 298 ((MODE) == LCD_BlinkMode_AllSEG_AllCOM))
emilmont 77:869cf507173a 299 /**
emilmont 77:869cf507173a 300 * @}
emilmont 77:869cf507173a 301 */
emilmont 77:869cf507173a 302
emilmont 77:869cf507173a 303 /** @defgroup LCD_BlinkFrequency
emilmont 77:869cf507173a 304 * @{
emilmont 77:869cf507173a 305 */
emilmont 77:869cf507173a 306
emilmont 77:869cf507173a 307 #define LCD_BlinkFrequency_Div8 ((uint32_t)0x00000000) /*!< The Blink frequency = fLCD/8 */
emilmont 77:869cf507173a 308 #define LCD_BlinkFrequency_Div16 ((uint32_t)0x00002000) /*!< The Blink frequency = fLCD/16 */
emilmont 77:869cf507173a 309 #define LCD_BlinkFrequency_Div32 ((uint32_t)0x00004000) /*!< The Blink frequency = fLCD/32 */
emilmont 77:869cf507173a 310 #define LCD_BlinkFrequency_Div64 ((uint32_t)0x00006000) /*!< The Blink frequency = fLCD/64 */
emilmont 77:869cf507173a 311 #define LCD_BlinkFrequency_Div128 ((uint32_t)0x00008000) /*!< The Blink frequency = fLCD/128 */
emilmont 77:869cf507173a 312 #define LCD_BlinkFrequency_Div256 ((uint32_t)0x0000A000) /*!< The Blink frequency = fLCD/256 */
emilmont 77:869cf507173a 313 #define LCD_BlinkFrequency_Div512 ((uint32_t)0x0000C000) /*!< The Blink frequency = fLCD/512 */
emilmont 77:869cf507173a 314 #define LCD_BlinkFrequency_Div1024 ((uint32_t)0x0000E000) /*!< The Blink frequency = fLCD/1024 */
emilmont 77:869cf507173a 315
emilmont 77:869cf507173a 316 #define IS_LCD_BLINK_FREQUENCY(FREQUENCY) (((FREQUENCY) == LCD_BlinkFrequency_Div8) || \
emilmont 77:869cf507173a 317 ((FREQUENCY) == LCD_BlinkFrequency_Div16) || \
emilmont 77:869cf507173a 318 ((FREQUENCY) == LCD_BlinkFrequency_Div32) || \
emilmont 77:869cf507173a 319 ((FREQUENCY) == LCD_BlinkFrequency_Div64) || \
emilmont 77:869cf507173a 320 ((FREQUENCY) == LCD_BlinkFrequency_Div128) || \
emilmont 77:869cf507173a 321 ((FREQUENCY) == LCD_BlinkFrequency_Div256) || \
emilmont 77:869cf507173a 322 ((FREQUENCY) == LCD_BlinkFrequency_Div512) || \
emilmont 77:869cf507173a 323 ((FREQUENCY) == LCD_BlinkFrequency_Div1024))
emilmont 77:869cf507173a 324 /**
emilmont 77:869cf507173a 325 * @}
emilmont 77:869cf507173a 326 */
emilmont 77:869cf507173a 327
emilmont 77:869cf507173a 328 /** @defgroup LCD_Contrast
emilmont 77:869cf507173a 329 * @{
emilmont 77:869cf507173a 330 */
emilmont 77:869cf507173a 331
emilmont 77:869cf507173a 332 #define LCD_Contrast_Level_0 ((uint32_t)0x00000000) /*!< Maximum Voltage = 2.60V */
emilmont 77:869cf507173a 333 #define LCD_Contrast_Level_1 ((uint32_t)0x00000400) /*!< Maximum Voltage = 2.73V */
emilmont 77:869cf507173a 334 #define LCD_Contrast_Level_2 ((uint32_t)0x00000800) /*!< Maximum Voltage = 2.86V */
emilmont 77:869cf507173a 335 #define LCD_Contrast_Level_3 ((uint32_t)0x00000C00) /*!< Maximum Voltage = 2.99V */
emilmont 77:869cf507173a 336 #define LCD_Contrast_Level_4 ((uint32_t)0x00001000) /*!< Maximum Voltage = 3.12V */
emilmont 77:869cf507173a 337 #define LCD_Contrast_Level_5 ((uint32_t)0x00001400) /*!< Maximum Voltage = 3.25V */
emilmont 77:869cf507173a 338 #define LCD_Contrast_Level_6 ((uint32_t)0x00001800) /*!< Maximum Voltage = 3.38V */
emilmont 77:869cf507173a 339 #define LCD_Contrast_Level_7 ((uint32_t)0x00001C00) /*!< Maximum Voltage = 3.51V */
emilmont 77:869cf507173a 340
emilmont 77:869cf507173a 341 #define IS_LCD_CONTRAST(CONTRAST) (((CONTRAST) == LCD_Contrast_Level_0) || \
emilmont 77:869cf507173a 342 ((CONTRAST) == LCD_Contrast_Level_1) || \
emilmont 77:869cf507173a 343 ((CONTRAST) == LCD_Contrast_Level_2) || \
emilmont 77:869cf507173a 344 ((CONTRAST) == LCD_Contrast_Level_3) || \
emilmont 77:869cf507173a 345 ((CONTRAST) == LCD_Contrast_Level_4) || \
emilmont 77:869cf507173a 346 ((CONTRAST) == LCD_Contrast_Level_5) || \
emilmont 77:869cf507173a 347 ((CONTRAST) == LCD_Contrast_Level_6) || \
emilmont 77:869cf507173a 348 ((CONTRAST) == LCD_Contrast_Level_7))
emilmont 77:869cf507173a 349 /**
emilmont 77:869cf507173a 350 * @}
emilmont 77:869cf507173a 351 */
emilmont 77:869cf507173a 352
emilmont 77:869cf507173a 353 /** @defgroup LCD_Flag
emilmont 77:869cf507173a 354 * @{
emilmont 77:869cf507173a 355 */
emilmont 77:869cf507173a 356
emilmont 77:869cf507173a 357 #define LCD_FLAG_ENS LCD_SR_ENS
emilmont 77:869cf507173a 358 #define LCD_FLAG_SOF LCD_SR_SOF
emilmont 77:869cf507173a 359 #define LCD_FLAG_UDR LCD_SR_UDR
emilmont 77:869cf507173a 360 #define LCD_FLAG_UDD LCD_SR_UDD
emilmont 77:869cf507173a 361 #define LCD_FLAG_RDY LCD_SR_RDY
emilmont 77:869cf507173a 362 #define LCD_FLAG_FCRSF LCD_SR_FCRSR
emilmont 77:869cf507173a 363
emilmont 77:869cf507173a 364 #define IS_LCD_GET_FLAG(FLAG) (((FLAG) == LCD_FLAG_ENS) || ((FLAG) == LCD_FLAG_SOF) || \
emilmont 77:869cf507173a 365 ((FLAG) == LCD_FLAG_UDR) || ((FLAG) == LCD_FLAG_UDD) || \
emilmont 77:869cf507173a 366 ((FLAG) == LCD_FLAG_RDY) || ((FLAG) == LCD_FLAG_FCRSF))
emilmont 77:869cf507173a 367
emilmont 77:869cf507173a 368 #define IS_LCD_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF5) == 0x00) && ((FLAG) != 0x00))
emilmont 77:869cf507173a 369 /**
emilmont 77:869cf507173a 370 * @}
emilmont 77:869cf507173a 371 */
emilmont 77:869cf507173a 372
emilmont 77:869cf507173a 373 /** @defgroup LCD_RAMRegister
emilmont 77:869cf507173a 374 * @{
emilmont 77:869cf507173a 375 */
emilmont 77:869cf507173a 376
emilmont 77:869cf507173a 377 #define LCD_RAMRegister_0 ((uint32_t)0x00000000) /*!< LCD RAM Register 0 */
emilmont 77:869cf507173a 378 #define LCD_RAMRegister_1 ((uint32_t)0x00000001) /*!< LCD RAM Register 1 */
emilmont 77:869cf507173a 379 #define LCD_RAMRegister_2 ((uint32_t)0x00000002) /*!< LCD RAM Register 2 */
emilmont 77:869cf507173a 380 #define LCD_RAMRegister_3 ((uint32_t)0x00000003) /*!< LCD RAM Register 3 */
emilmont 77:869cf507173a 381 #define LCD_RAMRegister_4 ((uint32_t)0x00000004) /*!< LCD RAM Register 4 */
emilmont 77:869cf507173a 382 #define LCD_RAMRegister_5 ((uint32_t)0x00000005) /*!< LCD RAM Register 5 */
emilmont 77:869cf507173a 383 #define LCD_RAMRegister_6 ((uint32_t)0x00000006) /*!< LCD RAM Register 6 */
emilmont 77:869cf507173a 384 #define LCD_RAMRegister_7 ((uint32_t)0x00000007) /*!< LCD RAM Register 7 */
emilmont 77:869cf507173a 385 #define LCD_RAMRegister_8 ((uint32_t)0x00000008) /*!< LCD RAM Register 8 */
emilmont 77:869cf507173a 386 #define LCD_RAMRegister_9 ((uint32_t)0x00000009) /*!< LCD RAM Register 9 */
emilmont 77:869cf507173a 387 #define LCD_RAMRegister_10 ((uint32_t)0x0000000A) /*!< LCD RAM Register 10 */
emilmont 77:869cf507173a 388 #define LCD_RAMRegister_11 ((uint32_t)0x0000000B) /*!< LCD RAM Register 11 */
emilmont 77:869cf507173a 389 #define LCD_RAMRegister_12 ((uint32_t)0x0000000C) /*!< LCD RAM Register 12 */
emilmont 77:869cf507173a 390 #define LCD_RAMRegister_13 ((uint32_t)0x0000000D) /*!< LCD RAM Register 13 */
emilmont 77:869cf507173a 391 #define LCD_RAMRegister_14 ((uint32_t)0x0000000E) /*!< LCD RAM Register 14 */
emilmont 77:869cf507173a 392 #define LCD_RAMRegister_15 ((uint32_t)0x0000000F) /*!< LCD RAM Register 15 */
emilmont 77:869cf507173a 393
emilmont 77:869cf507173a 394 #define IS_LCD_RAM_REGISTER(REGISTER) (((REGISTER) == LCD_RAMRegister_0) || \
emilmont 77:869cf507173a 395 ((REGISTER) == LCD_RAMRegister_1) || \
emilmont 77:869cf507173a 396 ((REGISTER) == LCD_RAMRegister_2) || \
emilmont 77:869cf507173a 397 ((REGISTER) == LCD_RAMRegister_3) || \
emilmont 77:869cf507173a 398 ((REGISTER) == LCD_RAMRegister_4) || \
emilmont 77:869cf507173a 399 ((REGISTER) == LCD_RAMRegister_5) || \
emilmont 77:869cf507173a 400 ((REGISTER) == LCD_RAMRegister_6) || \
emilmont 77:869cf507173a 401 ((REGISTER) == LCD_RAMRegister_7) || \
emilmont 77:869cf507173a 402 ((REGISTER) == LCD_RAMRegister_8) || \
emilmont 77:869cf507173a 403 ((REGISTER) == LCD_RAMRegister_9) || \
emilmont 77:869cf507173a 404 ((REGISTER) == LCD_RAMRegister_10) || \
emilmont 77:869cf507173a 405 ((REGISTER) == LCD_RAMRegister_11) || \
emilmont 77:869cf507173a 406 ((REGISTER) == LCD_RAMRegister_12) || \
emilmont 77:869cf507173a 407 ((REGISTER) == LCD_RAMRegister_13) || \
emilmont 77:869cf507173a 408 ((REGISTER) == LCD_RAMRegister_14) || \
emilmont 77:869cf507173a 409 ((REGISTER) == LCD_RAMRegister_15))
emilmont 77:869cf507173a 410
emilmont 77:869cf507173a 411 /**
emilmont 77:869cf507173a 412 * @}
emilmont 77:869cf507173a 413 */
emilmont 77:869cf507173a 414
emilmont 77:869cf507173a 415 /**
emilmont 77:869cf507173a 416 * @}
emilmont 77:869cf507173a 417 */
emilmont 77:869cf507173a 418
emilmont 77:869cf507173a 419 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 420 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 421
emilmont 77:869cf507173a 422 /* Function used to set the LCD configuration to the default reset state *****/
emilmont 77:869cf507173a 423 void LCD_DeInit(void);
emilmont 77:869cf507173a 424
emilmont 77:869cf507173a 425 /* Initialization and Configuration functions *********************************/
emilmont 77:869cf507173a 426 void LCD_Init(LCD_InitTypeDef* LCD_InitStruct);
emilmont 77:869cf507173a 427 void LCD_StructInit(LCD_InitTypeDef* LCD_InitStruct);
emilmont 77:869cf507173a 428 void LCD_Cmd(FunctionalState NewState);
emilmont 77:869cf507173a 429 void LCD_WaitForSynchro(void);
emilmont 77:869cf507173a 430 void LCD_HighDriveCmd(FunctionalState NewState);
emilmont 77:869cf507173a 431 void LCD_MuxSegmentCmd(FunctionalState NewState);
emilmont 77:869cf507173a 432 void LCD_PulseOnDurationConfig(uint32_t LCD_PulseOnDuration);
emilmont 77:869cf507173a 433 void LCD_DeadTimeConfig(uint32_t LCD_DeadTime);
emilmont 77:869cf507173a 434 void LCD_BlinkConfig(uint32_t LCD_BlinkMode, uint32_t LCD_BlinkFrequency);
emilmont 77:869cf507173a 435 void LCD_ContrastConfig(uint32_t LCD_Contrast);
emilmont 77:869cf507173a 436
emilmont 77:869cf507173a 437 /* LCD RAM memory write functions *********************************************/
emilmont 77:869cf507173a 438 void LCD_Write(uint32_t LCD_RAMRegister, uint32_t LCD_Data);
emilmont 77:869cf507173a 439 void LCD_UpdateDisplayRequest(void);
emilmont 77:869cf507173a 440
emilmont 77:869cf507173a 441 /* Interrupts and flags management functions **********************************/
emilmont 77:869cf507173a 442 void LCD_ITConfig(uint32_t LCD_IT, FunctionalState NewState);
emilmont 77:869cf507173a 443 FlagStatus LCD_GetFlagStatus(uint32_t LCD_FLAG);
emilmont 77:869cf507173a 444 void LCD_ClearFlag(uint32_t LCD_FLAG);
emilmont 77:869cf507173a 445 ITStatus LCD_GetITStatus(uint32_t LCD_IT);
emilmont 77:869cf507173a 446 void LCD_ClearITPendingBit(uint32_t LCD_IT);
emilmont 77:869cf507173a 447
emilmont 77:869cf507173a 448 #ifdef __cplusplus
emilmont 77:869cf507173a 449 }
emilmont 77:869cf507173a 450 #endif
emilmont 77:869cf507173a 451
emilmont 77:869cf507173a 452 #endif /* __STM32L1xx_LCD_H */
emilmont 77:869cf507173a 453
emilmont 77:869cf507173a 454 /**
emilmont 77:869cf507173a 455 * @}
emilmont 77:869cf507173a 456 */
emilmont 77:869cf507173a 457
emilmont 77:869cf507173a 458 /**
emilmont 77:869cf507173a 459 * @}
emilmont 77:869cf507173a 460 */
emilmont 77:869cf507173a 461
emilmont 77:869cf507173a 462 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/