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TARGET_NUCLEO_F302R8/stm32f30x_syscfg.h@86:4f9a848d74c7, 2014-06-25 (annotated)

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
82:6473597d706e 
version_2.0

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bogdanm 82:6473597d706e 1 /**
bogdanm 82:6473597d706e 2 ******************************************************************************
bogdanm 82:6473597d706e 3 * @file stm32f30x_syscfg.h
bogdanm 82:6473597d706e 4 * @author MCD Application Team
bogdanm 82:6473597d706e 5 * @version V1.1.0
bogdanm 82:6473597d706e 6 * @date 27-February-2014
bogdanm 82:6473597d706e 7 * @brief This file contains all the functions prototypes for the SYSCFG firmware
bogdanm 82:6473597d706e 8 * library.
bogdanm 82:6473597d706e 9 ******************************************************************************
bogdanm 82:6473597d706e 10 * @attention
bogdanm 82:6473597d706e 11 *
bogdanm 82:6473597d706e 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 82:6473597d706e 13 *
bogdanm 82:6473597d706e 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 82:6473597d706e 15 * are permitted provided that the following conditions are met:
bogdanm 82:6473597d706e 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 82:6473597d706e 17 * this list of conditions and the following disclaimer.
bogdanm 82:6473597d706e 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 82:6473597d706e 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 82:6473597d706e 20 * and/or other materials provided with the distribution.
bogdanm 82:6473597d706e 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 82:6473597d706e 22 * may be used to endorse or promote products derived from this software
bogdanm 82:6473597d706e 23 * without specific prior written permission.
bogdanm 82:6473597d706e 24 *
bogdanm 82:6473597d706e 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 82:6473597d706e 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 82:6473597d706e 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 82:6473597d706e 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 82:6473597d706e 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 82:6473597d706e 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 82:6473597d706e 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 82:6473597d706e 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 82:6473597d706e 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 82:6473597d706e 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 82:6473597d706e 35 *
bogdanm 82:6473597d706e 36 ******************************************************************************
bogdanm 82:6473597d706e 37 */
bogdanm 82:6473597d706e 38
bogdanm 82:6473597d706e 39 /*!< Define to prevent recursive inclusion -----------------------------------*/
bogdanm 82:6473597d706e 40 #ifndef __STM32F30x_SYSCFG_H
bogdanm 82:6473597d706e 41 #define __STM32F30x_SYSCFG_H
bogdanm 82:6473597d706e 42
bogdanm 82:6473597d706e 43 #ifdef __cplusplus
bogdanm 82:6473597d706e 44 extern "C" {
bogdanm 82:6473597d706e 45 #endif
bogdanm 82:6473597d706e 46
bogdanm 82:6473597d706e 47 /*!< Includes ----------------------------------------------------------------*/
bogdanm 82:6473597d706e 48 #include "stm32f30x.h"
bogdanm 82:6473597d706e 49
bogdanm 82:6473597d706e 50 /** @addtogroup STM32F30x_StdPeriph_Driver
bogdanm 82:6473597d706e 51 * @{
bogdanm 82:6473597d706e 52 */
bogdanm 82:6473597d706e 53
bogdanm 82:6473597d706e 54 /** @addtogroup SYSCFG
bogdanm 82:6473597d706e 55 * @{
bogdanm 82:6473597d706e 56 */
bogdanm 82:6473597d706e 57
bogdanm 82:6473597d706e 58 /* Exported types ------------------------------------------------------------*/
bogdanm 82:6473597d706e 59 /* Exported constants --------------------------------------------------------*/
bogdanm 82:6473597d706e 60
bogdanm 82:6473597d706e 61 /** @defgroup SYSCFG_Exported_Constants
bogdanm 82:6473597d706e 62 * @{
bogdanm 82:6473597d706e 63 */
bogdanm 82:6473597d706e 64
bogdanm 82:6473597d706e 65 /** @defgroup SYSCFG_EXTI_Port_Sources
bogdanm 82:6473597d706e 66 * @{
bogdanm 82:6473597d706e 67 */
bogdanm 82:6473597d706e 68 #define EXTI_PortSourceGPIOA ((uint8_t)0x00)
bogdanm 82:6473597d706e 69 #define EXTI_PortSourceGPIOB ((uint8_t)0x01)
bogdanm 82:6473597d706e 70 #define EXTI_PortSourceGPIOC ((uint8_t)0x02)
bogdanm 82:6473597d706e 71 #define EXTI_PortSourceGPIOD ((uint8_t)0x03)
bogdanm 82:6473597d706e 72 #define EXTI_PortSourceGPIOE ((uint8_t)0x04)
bogdanm 82:6473597d706e 73 #define EXTI_PortSourceGPIOF ((uint8_t)0x05)
bogdanm 82:6473597d706e 74
bogdanm 82:6473597d706e 75 #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
bogdanm 82:6473597d706e 76 ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
bogdanm 82:6473597d706e 77 ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
bogdanm 82:6473597d706e 78 ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
bogdanm 82:6473597d706e 79 ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
bogdanm 82:6473597d706e 80 ((PORTSOURCE) == EXTI_PortSourceGPIOF))
bogdanm 82:6473597d706e 81 /**
bogdanm 82:6473597d706e 82 * @}
bogdanm 82:6473597d706e 83 */
bogdanm 82:6473597d706e 84
bogdanm 82:6473597d706e 85 /** @defgroup SYSCFG_EXTI_Pin_sources
bogdanm 82:6473597d706e 86 * @{
bogdanm 82:6473597d706e 87 */
bogdanm 82:6473597d706e 88 #define EXTI_PinSource0 ((uint8_t)0x00)
bogdanm 82:6473597d706e 89 #define EXTI_PinSource1 ((uint8_t)0x01)
bogdanm 82:6473597d706e 90 #define EXTI_PinSource2 ((uint8_t)0x02)
bogdanm 82:6473597d706e 91 #define EXTI_PinSource3 ((uint8_t)0x03)
bogdanm 82:6473597d706e 92 #define EXTI_PinSource4 ((uint8_t)0x04)
bogdanm 82:6473597d706e 93 #define EXTI_PinSource5 ((uint8_t)0x05)
bogdanm 82:6473597d706e 94 #define EXTI_PinSource6 ((uint8_t)0x06)
bogdanm 82:6473597d706e 95 #define EXTI_PinSource7 ((uint8_t)0x07)
bogdanm 82:6473597d706e 96 #define EXTI_PinSource8 ((uint8_t)0x08)
bogdanm 82:6473597d706e 97 #define EXTI_PinSource9 ((uint8_t)0x09)
bogdanm 82:6473597d706e 98 #define EXTI_PinSource10 ((uint8_t)0x0A)
bogdanm 82:6473597d706e 99 #define EXTI_PinSource11 ((uint8_t)0x0B)
bogdanm 82:6473597d706e 100 #define EXTI_PinSource12 ((uint8_t)0x0C)
bogdanm 82:6473597d706e 101 #define EXTI_PinSource13 ((uint8_t)0x0D)
bogdanm 82:6473597d706e 102 #define EXTI_PinSource14 ((uint8_t)0x0E)
bogdanm 82:6473597d706e 103 #define EXTI_PinSource15 ((uint8_t)0x0F)
bogdanm 82:6473597d706e 104
bogdanm 82:6473597d706e 105 #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
bogdanm 82:6473597d706e 106 ((PINSOURCE) == EXTI_PinSource1) || \
bogdanm 82:6473597d706e 107 ((PINSOURCE) == EXTI_PinSource2) || \
bogdanm 82:6473597d706e 108 ((PINSOURCE) == EXTI_PinSource3) || \
bogdanm 82:6473597d706e 109 ((PINSOURCE) == EXTI_PinSource4) || \
bogdanm 82:6473597d706e 110 ((PINSOURCE) == EXTI_PinSource5) || \
bogdanm 82:6473597d706e 111 ((PINSOURCE) == EXTI_PinSource6) || \
bogdanm 82:6473597d706e 112 ((PINSOURCE) == EXTI_PinSource7) || \
bogdanm 82:6473597d706e 113 ((PINSOURCE) == EXTI_PinSource8) || \
bogdanm 82:6473597d706e 114 ((PINSOURCE) == EXTI_PinSource9) || \
bogdanm 82:6473597d706e 115 ((PINSOURCE) == EXTI_PinSource10) || \
bogdanm 82:6473597d706e 116 ((PINSOURCE) == EXTI_PinSource11) || \
bogdanm 82:6473597d706e 117 ((PINSOURCE) == EXTI_PinSource12) || \
bogdanm 82:6473597d706e 118 ((PINSOURCE) == EXTI_PinSource13) || \
bogdanm 82:6473597d706e 119 ((PINSOURCE) == EXTI_PinSource14) || \
bogdanm 82:6473597d706e 120 ((PINSOURCE) == EXTI_PinSource15))
bogdanm 82:6473597d706e 121 /**
bogdanm 82:6473597d706e 122 * @}
bogdanm 82:6473597d706e 123 */
bogdanm 82:6473597d706e 124
bogdanm 82:6473597d706e 125 /** @defgroup SYSCFG_Memory_Remap_Config
bogdanm 82:6473597d706e 126 * @{
bogdanm 82:6473597d706e 127 */
bogdanm 82:6473597d706e 128 #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
bogdanm 82:6473597d706e 129 #define SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01)
bogdanm 82:6473597d706e 130 #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
bogdanm 82:6473597d706e 131
bogdanm 82:6473597d706e 132
bogdanm 82:6473597d706e 133 #define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
bogdanm 82:6473597d706e 134 ((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \
bogdanm 82:6473597d706e 135 ((REMAP) == SYSCFG_MemoryRemap_SRAM))
bogdanm 82:6473597d706e 136
bogdanm 82:6473597d706e 137 /**
bogdanm 82:6473597d706e 138 * @}
bogdanm 82:6473597d706e 139 */
bogdanm 82:6473597d706e 140
bogdanm 82:6473597d706e 141 /** @defgroup SYSCFG_DMA_Remap_Config
bogdanm 82:6473597d706e 142 * @{
bogdanm 82:6473597d706e 143 */
bogdanm 82:6473597d706e 144 #define SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP /*!< Remap TIM17 DMA requests from channel1 to channel2 */
bogdanm 82:6473597d706e 145 #define SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP /*!< Remap TIM16 DMA requests from channel3 to channel4 */
bogdanm 82:6473597d706e 146 #define SYSCFG_DMARemap_ADC2ADC4 SYSCFG_CFGR1_ADC24_DMA_RMP /*!< Remap ADC2 and ADC4 DMA requests */
bogdanm 82:6473597d706e 147
bogdanm 82:6473597d706e 148 #define SYSCFG_DMARemap_TIM6DAC1Ch1 SYSCFG_CFGR1_TIM6DAC1Ch1_DMA_RMP /* Remap TIM6/DAC1 Ch1 DMA requests */
bogdanm 82:6473597d706e 149 #define SYSCFG_DMARemap_TIM7DAC1Ch2 SYSCFG_CFGR1_TIM7DAC1Ch2_DMA_RMP /* Remap TIM7/DAC1 Ch2 DMA requests */
bogdanm 82:6473597d706e 150 #define SYSCFG_DMARemap_DAC2Ch1 SYSCFG_CFGR1_DAC2Ch1_DMA_RMP /* Remap DAC2 Ch1 DMA requests */
bogdanm 82:6473597d706e 151
bogdanm 82:6473597d706e 152 #define SYSCFG_DMARemapCh2_SPI1_RX ((uint32_t)0x80000003) /* Remap SPI1 RX DMA CH2 requests */
bogdanm 82:6473597d706e 153 #define SYSCFG_DMARemapCh4_SPI1_RX ((uint32_t)0x80000001) /* Remap SPI1 RX DMA CH4 requests */
bogdanm 82:6473597d706e 154 #define SYSCFG_DMARemapCh6_SPI1_RX ((uint32_t)0x80000002) /* Remap SPI1 RX DMA CH6 requests */
bogdanm 82:6473597d706e 155
bogdanm 82:6473597d706e 156 #define SYSCFG_DMARemapCh3_SPI1_TX ((uint32_t)0x8000000C) /* Remap SPI1 TX DMA CH2 requests */
bogdanm 82:6473597d706e 157 #define SYSCFG_DMARemapCh5_SPI1_TX ((uint32_t)0x80000004) /* Remap SPI1 TX DMA CH5 requests */
bogdanm 82:6473597d706e 158 #define SYSCFG_DMARemapCh7_SPI1_TX ((uint32_t)0x80000008) /* Remap SPI1 TX DMA CH7 requests */
bogdanm 82:6473597d706e 159
bogdanm 82:6473597d706e 160 #define SYSCFG_DMARemapCh7_I2C1_RX ((uint32_t)0x80000030) /* Remap I2C1 RX DMA CH7 requests */
bogdanm 82:6473597d706e 161 #define SYSCFG_DMARemapCh3_I2C1_RX ((uint32_t)0x80000010) /* Remap I2C1 RX DMA CH3 requests */
bogdanm 82:6473597d706e 162 #define SYSCFG_DMARemapCh5_I2C1_RX ((uint32_t)0x80000020) /* Remap I2C1 RX DMA CH5 requests */
bogdanm 82:6473597d706e 163
bogdanm 82:6473597d706e 164 #define SYSCFG_DMARemapCh6_I2C1_TX ((uint32_t)0x800000C0) /* Remap I2C1 TX DMA CH6 requests */
bogdanm 82:6473597d706e 165 #define SYSCFG_DMARemapCh2_I2C1_TX ((uint32_t)0x80000040) /* Remap I2C1 TX DMA CH2 requests */
bogdanm 82:6473597d706e 166 #define SYSCFG_DMARemapCh4_I2C1_TX ((uint32_t)0x80000080) /* Remap I2C1 TX DMA CH4 requests */
bogdanm 82:6473597d706e 167
bogdanm 82:6473597d706e 168 #define SYSCFG_DMARemapCh4_ADC2 ((uint32_t)0x80000300) /* Remap ADC2 DMA1 Ch4 requests */
bogdanm 82:6473597d706e 169 #define SYSCFG_DMARemapCh2_ADC2 ((uint32_t)0x80000200) /* Remap ADC2 DMA1 Ch2 requests */
bogdanm 82:6473597d706e 170
bogdanm 82:6473597d706e 171 /* SYSCFG_DMA_Remap_Legacy */
bogdanm 82:6473597d706e 172 #define SYSCFG_DMARemap_TIM6DAC1 SYSCFG_DMARemap_TIM6DAC1Ch1 /*!< Remap TIM6/DAC1 DMA requests */
bogdanm 82:6473597d706e 173 #define SYSCFG_DMARemap_TIM7DAC2 SYSCFG_DMARemap_TIM7DAC1Ch2 /*!< Remap TIM7/DAC2 DMA requests */
bogdanm 82:6473597d706e 174
bogdanm 82:6473597d706e 175 #define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \
bogdanm 82:6473597d706e 176 ((REMAP) == SYSCFG_DMARemap_TIM16) || \
bogdanm 82:6473597d706e 177 ((REMAP) == SYSCFG_DMARemap_ADC2ADC4) || \
bogdanm 82:6473597d706e 178 ((REMAP) == SYSCFG_DMARemap_TIM6DAC1Ch1) || \
bogdanm 82:6473597d706e 179 ((REMAP) == SYSCFG_DMARemap_TIM7DAC1Ch2) || \
bogdanm 82:6473597d706e 180 ((REMAP) == SYSCFG_DMARemap_DAC2Ch1) || \
bogdanm 82:6473597d706e 181 ((REMAP) == SYSCFG_DMARemapCh2_SPI1_RX) || \
bogdanm 82:6473597d706e 182 ((REMAP) == SYSCFG_DMARemapCh4_SPI1_RX) || \
bogdanm 82:6473597d706e 183 ((REMAP) == SYSCFG_DMARemapCh6_SPI1_RX) || \
bogdanm 82:6473597d706e 184 ((REMAP) == SYSCFG_DMARemapCh5_SPI1_TX) || \
bogdanm 82:6473597d706e 185 ((REMAP) == SYSCFG_DMARemapCh5_SPI1_TX) || \
bogdanm 82:6473597d706e 186 ((REMAP) == SYSCFG_DMARemapCh7_SPI1_TX) || \
bogdanm 82:6473597d706e 187 ((REMAP) == SYSCFG_DMARemapCh7_I2C1_RX) || \
bogdanm 82:6473597d706e 188 ((REMAP) == SYSCFG_DMARemapCh3_I2C1_RX) || \
bogdanm 82:6473597d706e 189 ((REMAP) == SYSCFG_DMARemapCh5_I2C1_RX) || \
bogdanm 82:6473597d706e 190 ((REMAP) == SYSCFG_DMARemapCh6_I2C1_TX) || \
bogdanm 82:6473597d706e 191 ((REMAP) == SYSCFG_DMARemapCh2_I2C1_TX) || \
bogdanm 82:6473597d706e 192 ((REMAP) == SYSCFG_DMARemapCh4_I2C1_TX) || \
bogdanm 82:6473597d706e 193 ((REMAP) == SYSCFG_DMARemapCh4_ADC2) || \
bogdanm 82:6473597d706e 194 ((REMAP) == SYSCFG_DMARemapCh2_ADC2))
bogdanm 82:6473597d706e 195
bogdanm 82:6473597d706e 196 /**
bogdanm 82:6473597d706e 197 * @}
bogdanm 82:6473597d706e 198 */
bogdanm 82:6473597d706e 199
bogdanm 82:6473597d706e 200 /** @defgroup SYSCFG_Trigger_Remap_Config
bogdanm 82:6473597d706e 201 * @{
bogdanm 82:6473597d706e 202 */
bogdanm 82:6473597d706e 203 #define SYSCFG_TriggerRemap_DACTIM3 SYSCFG_CFGR1_DAC1_TRIG1_RMP /*!< Remap DAC trigger to TIM3 */
bogdanm 82:6473597d706e 204 #define SYSCFG_TriggerRemap_TIM1TIM17 SYSCFG_CFGR1_TIM1_ITR3_RMP /*!< Remap TIM1 ITR3 to TIM17 OC */
bogdanm 82:6473597d706e 205 #define SYSCFG_TriggerRemap_DACHRTIM1_TRIG1 ((uint32_t)0x80010000) /*!< Remap DAC trigger to HRTIM1 TRIG1 */
bogdanm 82:6473597d706e 206 #define SYSCFG_TriggerRemap_DACHRTIM1_TRIG2 ((uint32_t)0x80020000) /*!< Remap DAC trigger to HRTIM1 TRIG2 */
bogdanm 82:6473597d706e 207
bogdanm 82:6473597d706e 208 #define IS_SYSCFG_TRIGGER_REMAP(REMAP) (((REMAP) == SYSCFG_TriggerRemap_DACTIM3) || \
bogdanm 82:6473597d706e 209 ((REMAP) == SYSCFG_TriggerRemap_DACHRTIM1_TRIG1) || \
bogdanm 82:6473597d706e 210 ((REMAP) == SYSCFG_TriggerRemap_DACHRTIM1_TRIG2) || \
bogdanm 82:6473597d706e 211 ((REMAP) == SYSCFG_TriggerRemap_TIM1TIM17))
bogdanm 82:6473597d706e 212
bogdanm 82:6473597d706e 213 /**
bogdanm 82:6473597d706e 214 * @}
bogdanm 82:6473597d706e 215 */
bogdanm 82:6473597d706e 216
bogdanm 82:6473597d706e 217 /** @defgroup SYSCFG_EncoderRemap_Config
bogdanm 82:6473597d706e 218 * @{
bogdanm 82:6473597d706e 219 */
bogdanm 82:6473597d706e 220 #define SYSCFG_EncoderRemap_No ((uint32_t)0x00000000) /*!< No redirection */
bogdanm 82:6473597d706e 221 #define SYSCFG_EncoderRemap_TIM2 SYSCFG_CFGR1_ENCODER_MODE_0 /*!< Timer 2 IC1 and IC2 connected to TIM15 IC1 and IC2 */
bogdanm 82:6473597d706e 222 #define SYSCFG_EncoderRemap_TIM3 SYSCFG_CFGR1_ENCODER_MODE_1 /*!< Timer 3 IC1 and IC2 connected to TIM15 IC1 and IC2 */
bogdanm 82:6473597d706e 223 #define SYSCFG_EncoderRemap_TIM4 SYSCFG_CFGR1_ENCODER_MODE /*!< Timer 4 IC1 and IC2 connected to TIM15 IC1 and IC2 */
bogdanm 82:6473597d706e 224
bogdanm 82:6473597d706e 225 #define IS_SYSCFG_ENCODER_REMAP(REMAP) (((REMAP) == SYSCFG_EncoderRemap_No) || \
bogdanm 82:6473597d706e 226 ((REMAP) == SYSCFG_EncoderRemap_TIM2) || \
bogdanm 82:6473597d706e 227 ((REMAP) == SYSCFG_EncoderRemap_TIM3) || \
bogdanm 82:6473597d706e 228 ((REMAP) == SYSCFG_EncoderRemap_TIM4))
bogdanm 82:6473597d706e 229
bogdanm 82:6473597d706e 230 /**
bogdanm 82:6473597d706e 231 * @}
bogdanm 82:6473597d706e 232 */
bogdanm 82:6473597d706e 233
bogdanm 82:6473597d706e 234 /** @defgroup SYSCFG_I2C_FastModePlus_Config
bogdanm 82:6473597d706e 235 * @{
bogdanm 82:6473597d706e 236 */
bogdanm 82:6473597d706e 237 #define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
bogdanm 82:6473597d706e 238 #define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
bogdanm 82:6473597d706e 239 #define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */
bogdanm 82:6473597d706e 240 #define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */
bogdanm 82:6473597d706e 241 #define SYSCFG_I2CFastModePlus_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
bogdanm 82:6473597d706e 242 #define SYSCFG_I2CFastModePlus_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
bogdanm 82:6473597d706e 243
bogdanm 82:6473597d706e 244 #define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \
bogdanm 82:6473597d706e 245 ((PIN) == SYSCFG_I2CFastModePlus_PB7) || \
bogdanm 82:6473597d706e 246 ((PIN) == SYSCFG_I2CFastModePlus_PB8) || \
bogdanm 82:6473597d706e 247 ((PIN) == SYSCFG_I2CFastModePlus_PB9) || \
bogdanm 82:6473597d706e 248 ((PIN) == SYSCFG_I2CFastModePlus_I2C1) || \
bogdanm 82:6473597d706e 249 ((PIN) == SYSCFG_I2CFastModePlus_I2C2))
bogdanm 82:6473597d706e 250
bogdanm 82:6473597d706e 251 /**
bogdanm 82:6473597d706e 252 * @}
bogdanm 82:6473597d706e 253 */
bogdanm 82:6473597d706e 254
bogdanm 82:6473597d706e 255 /** @defgroup SYSCFG_FPU_Interrupt_Config
bogdanm 82:6473597d706e 256 * @{
bogdanm 82:6473597d706e 257 */
bogdanm 82:6473597d706e 258 #define SYSCFG_IT_IXC SYSCFG_CFGR1_FPU_IE_5 /*!< Inexact Interrupt enable (interrupt disabled by default) */
bogdanm 82:6473597d706e 259 #define SYSCFG_IT_IDC SYSCFG_CFGR1_FPU_IE_4 /*!< Input denormal Interrupt enable */
bogdanm 82:6473597d706e 260 #define SYSCFG_IT_OFC SYSCFG_CFGR1_FPU_IE_3 /*!< Overflow Interrupt enable */
bogdanm 82:6473597d706e 261 #define SYSCFG_IT_UFC SYSCFG_CFGR1_FPU_IE_2 /*!< Underflow Interrupt enable */
bogdanm 82:6473597d706e 262 #define SYSCFG_IT_DZC SYSCFG_CFGR1_FPU_IE_1 /*!< Divide-by-zero Interrupt enable */
bogdanm 82:6473597d706e 263 #define SYSCFG_IT_IOC SYSCFG_CFGR1_FPU_IE_0 /*!< Invalid operation Interrupt enable */
bogdanm 82:6473597d706e 264
bogdanm 82:6473597d706e 265 #define IS_SYSCFG_IT(IT) ((((IT) & (uint32_t)0x03FFFFFF) == 0) && ((IT) != 0))
bogdanm 82:6473597d706e 266
bogdanm 82:6473597d706e 267 /**
bogdanm 82:6473597d706e 268 * @}
bogdanm 82:6473597d706e 269 */
bogdanm 82:6473597d706e 270
bogdanm 82:6473597d706e 271 /** @defgroup SYSCFG_Lock_Config
bogdanm 82:6473597d706e 272 * @{
bogdanm 82:6473597d706e 273 */
bogdanm 82:6473597d706e 274 #define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVD_EN and PVDSEL[2:0] bits of the Power Control Interface */
bogdanm 82:6473597d706e 275 #define SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK /*!< Enables and locks the SRAM_PARITY error signal with Break Input of TIM1/8/15/16/17 */
bogdanm 82:6473597d706e 276 #define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK /*!< Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/8/15/16/17 */
bogdanm 82:6473597d706e 277
bogdanm 82:6473597d706e 278 #define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \
bogdanm 82:6473597d706e 279 ((CONFIG) == SYSCFG_Break_SRAMParity) || \
bogdanm 82:6473597d706e 280 ((CONFIG) == SYSCFG_Break_Lockup))
bogdanm 82:6473597d706e 281
bogdanm 82:6473597d706e 282 /**
bogdanm 82:6473597d706e 283 * @}
bogdanm 82:6473597d706e 284 */
bogdanm 82:6473597d706e 285
bogdanm 82:6473597d706e 286 /** @defgroup SYSCFG_SRAMWRP_Config
bogdanm 82:6473597d706e 287 * @{
bogdanm 82:6473597d706e 288 */
bogdanm 82:6473597d706e 289 #define SYSCFG_SRAMWRP_Page0 SYSCFG_RCR_PAGE0 /*!< ICODE SRAM Write protection page 0 */
bogdanm 82:6473597d706e 290 #define SYSCFG_SRAMWRP_Page1 SYSCFG_RCR_PAGE1 /*!< ICODE SRAM Write protection page 1 */
bogdanm 82:6473597d706e 291 #define SYSCFG_SRAMWRP_Page2 SYSCFG_RCR_PAGE2 /*!< ICODE SRAM Write protection page 2 */
bogdanm 82:6473597d706e 292 #define SYSCFG_SRAMWRP_Page3 SYSCFG_RCR_PAGE3 /*!< ICODE SRAM Write protection page 3 */
bogdanm 82:6473597d706e 293 #define SYSCFG_SRAMWRP_Page4 SYSCFG_RCR_PAGE4 /*!< ICODE SRAM Write protection page 4 */
bogdanm 82:6473597d706e 294 #define SYSCFG_SRAMWRP_Page5 SYSCFG_RCR_PAGE5 /*!< ICODE SRAM Write protection page 5 */
bogdanm 82:6473597d706e 295 #define SYSCFG_SRAMWRP_Page6 SYSCFG_RCR_PAGE6 /*!< ICODE SRAM Write protection page 6 */
bogdanm 82:6473597d706e 296 #define SYSCFG_SRAMWRP_Page7 SYSCFG_RCR_PAGE7 /*!< ICODE SRAM Write protection page 7 */
bogdanm 82:6473597d706e 297
bogdanm 82:6473597d706e 298 #define IS_SYSCFG_PAGE(PAGE)((((PAGE) & (uint32_t)0xFFFFFF00) == 0x00000000) && ((PAGE) != 0x00000000))
bogdanm 82:6473597d706e 299
bogdanm 82:6473597d706e 300 /**
bogdanm 82:6473597d706e 301 * @}
bogdanm 82:6473597d706e 302 */
bogdanm 82:6473597d706e 303
bogdanm 82:6473597d706e 304 /** @defgroup SYSCFG_flags_definition
bogdanm 82:6473597d706e 305 * @{
bogdanm 82:6473597d706e 306 */
bogdanm 82:6473597d706e 307
bogdanm 82:6473597d706e 308 #define SYSCFG_FLAG_PE SYSCFG_CFGR2_SRAM_PE
bogdanm 82:6473597d706e 309
bogdanm 82:6473597d706e 310 #define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_PE))
bogdanm 82:6473597d706e 311
bogdanm 82:6473597d706e 312 /**
bogdanm 82:6473597d706e 313 * @}
bogdanm 82:6473597d706e 314 */
bogdanm 82:6473597d706e 315
bogdanm 82:6473597d706e 316 /**
bogdanm 82:6473597d706e 317 * @}
bogdanm 82:6473597d706e 318 */
bogdanm 82:6473597d706e 319
bogdanm 82:6473597d706e 320 /* Exported macro ------------------------------------------------------------*/
bogdanm 82:6473597d706e 321 /* Exported functions ------------------------------------------------------- */
bogdanm 82:6473597d706e 322
bogdanm 82:6473597d706e 323 /* Function used to set the SYSCFG configuration to the default reset state **/
bogdanm 82:6473597d706e 324 void SYSCFG_DeInit(void);
bogdanm 82:6473597d706e 325
bogdanm 82:6473597d706e 326 /* SYSCFG configuration functions *********************************************/
bogdanm 82:6473597d706e 327 void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap);
bogdanm 82:6473597d706e 328 void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState);
bogdanm 82:6473597d706e 329 void SYSCFG_TriggerRemapConfig(uint32_t SYSCFG_TriggerRemap, FunctionalState NewState);
bogdanm 82:6473597d706e 330 void SYSCFG_EncoderRemapConfig(uint32_t SYSCFG_EncoderRemap);
bogdanm 82:6473597d706e 331 void SYSCFG_USBInterruptLineRemapCmd(FunctionalState NewState);
bogdanm 82:6473597d706e 332 void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState);
bogdanm 82:6473597d706e 333 void SYSCFG_ITConfig(uint32_t SYSCFG_IT, FunctionalState NewState);
bogdanm 82:6473597d706e 334 void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
bogdanm 82:6473597d706e 335 void SYSCFG_BreakConfig(uint32_t SYSCFG_Break);
bogdanm 82:6473597d706e 336 void SYSCFG_BypassParityCheckDisable(void);
bogdanm 82:6473597d706e 337 void SYSCFG_SRAMWRPEnable(uint32_t SYSCFG_SRAMWRP);
bogdanm 82:6473597d706e 338 FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag);
bogdanm 82:6473597d706e 339 void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag);
bogdanm 82:6473597d706e 340
bogdanm 82:6473597d706e 341 #ifdef __cplusplus
bogdanm 82:6473597d706e 342 }
bogdanm 82:6473597d706e 343 #endif
bogdanm 82:6473597d706e 344
bogdanm 82:6473597d706e 345 #endif /*__STM32F30x_SYSCFG_H */
bogdanm 82:6473597d706e 346
bogdanm 82:6473597d706e 347 /**
bogdanm 82:6473597d706e 348 * @}
bogdanm 82:6473597d706e 349 */
bogdanm 82:6473597d706e 350
bogdanm 82:6473597d706e 351 /**
bogdanm 82:6473597d706e 352 * @}
bogdanm 82:6473597d706e 353 */
bogdanm 82:6473597d706e 354
bogdanm 82:6473597d706e 355 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/