version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
81:7d30d6019079
version_2.0

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emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f0xx_rtc.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 16-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the RTC firmware
emilmont 77:869cf507173a 8 * library.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
bogdanm 81:7d30d6019079 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
bogdanm 81:7d30d6019079 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 81:7d30d6019079 15 * are permitted provided that the following conditions are met:
bogdanm 81:7d30d6019079 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 81:7d30d6019079 17 * this list of conditions and the following disclaimer.
bogdanm 81:7d30d6019079 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 81:7d30d6019079 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 81:7d30d6019079 20 * and/or other materials provided with the distribution.
bogdanm 81:7d30d6019079 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 81:7d30d6019079 22 * may be used to endorse or promote products derived from this software
bogdanm 81:7d30d6019079 23 * without specific prior written permission.
emilmont 77:869cf507173a 24 *
bogdanm 81:7d30d6019079 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 81:7d30d6019079 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 81:7d30d6019079 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 81:7d30d6019079 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 81:7d30d6019079 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 81:7d30d6019079 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 81:7d30d6019079 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 81:7d30d6019079 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 81:7d30d6019079 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 81:7d30d6019079 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 35 *
emilmont 77:869cf507173a 36 ******************************************************************************
emilmont 77:869cf507173a 37 */
emilmont 77:869cf507173a 38
emilmont 77:869cf507173a 39 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 40 #ifndef __STM32F0XX_RTC_H
emilmont 77:869cf507173a 41 #define __STM32F0XX_RTC_H
emilmont 77:869cf507173a 42
emilmont 77:869cf507173a 43 #ifdef __cplusplus
emilmont 77:869cf507173a 44 extern "C" {
emilmont 77:869cf507173a 45 #endif
emilmont 77:869cf507173a 46
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32f0xx.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32F0xx_StdPeriph_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup RTC
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57
emilmont 77:869cf507173a 58 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 /**
emilmont 77:869cf507173a 61 * @brief RTC Init structures definition
emilmont 77:869cf507173a 62 */
emilmont 77:869cf507173a 63 typedef struct
emilmont 77:869cf507173a 64 {
emilmont 77:869cf507173a 65 uint32_t RTC_HourFormat; /*!< Specifies the RTC Hour Format.
emilmont 77:869cf507173a 66 This parameter can be a value of @ref RTC_Hour_Formats */
emilmont 77:869cf507173a 67
emilmont 77:869cf507173a 68 uint32_t RTC_AsynchPrediv; /*!< Specifies the RTC Asynchronous Predivider value.
emilmont 77:869cf507173a 69 This parameter must be set to a value lower than 0x7F */
emilmont 77:869cf507173a 70
emilmont 77:869cf507173a 71 uint32_t RTC_SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value.
emilmont 77:869cf507173a 72 This parameter must be set to a value lower than 0x1FFF */
emilmont 77:869cf507173a 73 }RTC_InitTypeDef;
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 /**
emilmont 77:869cf507173a 76 * @brief RTC Time structure definition
emilmont 77:869cf507173a 77 */
emilmont 77:869cf507173a 78 typedef struct
emilmont 77:869cf507173a 79 {
emilmont 77:869cf507173a 80 uint8_t RTC_Hours; /*!< Specifies the RTC Time Hour.
emilmont 77:869cf507173a 81 This parameter must be set to a value in the 0-12 range
emilmont 77:869cf507173a 82 if the RTC_HourFormat_12 is selected or 0-23 range if
emilmont 77:869cf507173a 83 the RTC_HourFormat_24 is selected. */
emilmont 77:869cf507173a 84
emilmont 77:869cf507173a 85 uint8_t RTC_Minutes; /*!< Specifies the RTC Time Minutes.
emilmont 77:869cf507173a 86 This parameter must be set to a value in the 0-59 range. */
emilmont 77:869cf507173a 87
emilmont 77:869cf507173a 88 uint8_t RTC_Seconds; /*!< Specifies the RTC Time Seconds.
emilmont 77:869cf507173a 89 This parameter must be set to a value in the 0-59 range. */
emilmont 77:869cf507173a 90
emilmont 77:869cf507173a 91 uint8_t RTC_H12; /*!< Specifies the RTC AM/PM Time.
emilmont 77:869cf507173a 92 This parameter can be a value of @ref RTC_AM_PM_Definitions */
emilmont 77:869cf507173a 93 }RTC_TimeTypeDef;
emilmont 77:869cf507173a 94
emilmont 77:869cf507173a 95 /**
emilmont 77:869cf507173a 96 * @brief RTC Date structure definition
emilmont 77:869cf507173a 97 */
emilmont 77:869cf507173a 98 typedef struct
emilmont 77:869cf507173a 99 {
emilmont 77:869cf507173a 100 uint8_t RTC_WeekDay; /*!< Specifies the RTC Date WeekDay.
emilmont 77:869cf507173a 101 This parameter can be a value of @ref RTC_WeekDay_Definitions */
emilmont 77:869cf507173a 102
emilmont 77:869cf507173a 103 uint8_t RTC_Month; /*!< Specifies the RTC Date Month.
emilmont 77:869cf507173a 104 This parameter can be a value of @ref RTC_Month_Date_Definitions */
emilmont 77:869cf507173a 105
emilmont 77:869cf507173a 106 uint8_t RTC_Date; /*!< Specifies the RTC Date.
emilmont 77:869cf507173a 107 This parameter must be set to a value in the 1-31 range. */
emilmont 77:869cf507173a 108
emilmont 77:869cf507173a 109 uint8_t RTC_Year; /*!< Specifies the RTC Date Year.
emilmont 77:869cf507173a 110 This parameter must be set to a value in the 0-99 range. */
emilmont 77:869cf507173a 111 }RTC_DateTypeDef;
emilmont 77:869cf507173a 112
emilmont 77:869cf507173a 113 /**
emilmont 77:869cf507173a 114 * @brief RTC Alarm structure definition
emilmont 77:869cf507173a 115 */
emilmont 77:869cf507173a 116 typedef struct
emilmont 77:869cf507173a 117 {
emilmont 77:869cf507173a 118 RTC_TimeTypeDef RTC_AlarmTime; /*!< Specifies the RTC Alarm Time members. */
emilmont 77:869cf507173a 119
emilmont 77:869cf507173a 120 uint32_t RTC_AlarmMask; /*!< Specifies the RTC Alarm Masks.
emilmont 77:869cf507173a 121 This parameter can be a value of @ref RTC_AlarmMask_Definitions */
emilmont 77:869cf507173a 122
emilmont 77:869cf507173a 123 uint32_t RTC_AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay.
emilmont 77:869cf507173a 124 This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
emilmont 77:869cf507173a 125
emilmont 77:869cf507173a 126 uint8_t RTC_AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay.
emilmont 77:869cf507173a 127 This parameter must be set to a value in the 1-31 range
emilmont 77:869cf507173a 128 if the Alarm Date is selected.
emilmont 77:869cf507173a 129 This parameter can be a value of @ref RTC_WeekDay_Definitions
emilmont 77:869cf507173a 130 if the Alarm WeekDay is selected. */
emilmont 77:869cf507173a 131 }RTC_AlarmTypeDef;
emilmont 77:869cf507173a 132
emilmont 77:869cf507173a 133 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 /** @defgroup RTC_Exported_Constants
emilmont 77:869cf507173a 136 * @{
emilmont 77:869cf507173a 137 */
emilmont 77:869cf507173a 138
emilmont 77:869cf507173a 139
emilmont 77:869cf507173a 140 /** @defgroup RTC_Hour_Formats
emilmont 77:869cf507173a 141 * @{
emilmont 77:869cf507173a 142 */
emilmont 77:869cf507173a 143 #define RTC_HourFormat_24 ((uint32_t)0x00000000)
emilmont 77:869cf507173a 144 #define RTC_HourFormat_12 ((uint32_t)0x00000040)
emilmont 77:869cf507173a 145 #define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HourFormat_12) || \
emilmont 77:869cf507173a 146 ((FORMAT) == RTC_HourFormat_24))
emilmont 77:869cf507173a 147 /**
emilmont 77:869cf507173a 148 * @}
emilmont 77:869cf507173a 149 */
emilmont 77:869cf507173a 150
emilmont 77:869cf507173a 151 /** @defgroup RTC_Asynchronous_Predivider
emilmont 77:869cf507173a 152 * @{
emilmont 77:869cf507173a 153 */
emilmont 77:869cf507173a 154 #define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7F)
emilmont 77:869cf507173a 155
emilmont 77:869cf507173a 156 /**
emilmont 77:869cf507173a 157 * @}
emilmont 77:869cf507173a 158 */
emilmont 77:869cf507173a 159
emilmont 77:869cf507173a 160
emilmont 77:869cf507173a 161 /** @defgroup RTC_Synchronous_Predivider
emilmont 77:869cf507173a 162 * @{
emilmont 77:869cf507173a 163 */
emilmont 77:869cf507173a 164 #define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FFF)
emilmont 77:869cf507173a 165
emilmont 77:869cf507173a 166 /**
emilmont 77:869cf507173a 167 * @}
emilmont 77:869cf507173a 168 */
emilmont 77:869cf507173a 169
emilmont 77:869cf507173a 170 /** @defgroup RTC_Time_Definitions
emilmont 77:869cf507173a 171 * @{
emilmont 77:869cf507173a 172 */
emilmont 77:869cf507173a 173 #define IS_RTC_HOUR12(HOUR) (((HOUR) > 0) && ((HOUR) <= 12))
emilmont 77:869cf507173a 174 #define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23)
emilmont 77:869cf507173a 175 #define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59)
emilmont 77:869cf507173a 176 #define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59)
emilmont 77:869cf507173a 177
emilmont 77:869cf507173a 178 /**
emilmont 77:869cf507173a 179 * @}
emilmont 77:869cf507173a 180 */
emilmont 77:869cf507173a 181
emilmont 77:869cf507173a 182 /** @defgroup RTC_AM_PM_Definitions
emilmont 77:869cf507173a 183 * @{
emilmont 77:869cf507173a 184 */
emilmont 77:869cf507173a 185 #define RTC_H12_AM ((uint8_t)0x00)
emilmont 77:869cf507173a 186 #define RTC_H12_PM ((uint8_t)0x40)
emilmont 77:869cf507173a 187 #define IS_RTC_H12(PM) (((PM) == RTC_H12_AM) || ((PM) == RTC_H12_PM))
emilmont 77:869cf507173a 188
emilmont 77:869cf507173a 189 /**
emilmont 77:869cf507173a 190 * @}
emilmont 77:869cf507173a 191 */
emilmont 77:869cf507173a 192
emilmont 77:869cf507173a 193 /** @defgroup RTC_Year_Date_Definitions
emilmont 77:869cf507173a 194 * @{
emilmont 77:869cf507173a 195 */
emilmont 77:869cf507173a 196 #define IS_RTC_YEAR(YEAR) ((YEAR) <= 99)
emilmont 77:869cf507173a 197
emilmont 77:869cf507173a 198 /**
emilmont 77:869cf507173a 199 * @}
emilmont 77:869cf507173a 200 */
emilmont 77:869cf507173a 201
emilmont 77:869cf507173a 202 /** @defgroup RTC_Month_Date_Definitions
emilmont 77:869cf507173a 203 * @{
emilmont 77:869cf507173a 204 */
emilmont 77:869cf507173a 205 #define RTC_Month_January ((uint8_t)0x01)
emilmont 77:869cf507173a 206 #define RTC_Month_February ((uint8_t)0x02)
emilmont 77:869cf507173a 207 #define RTC_Month_March ((uint8_t)0x03)
emilmont 77:869cf507173a 208 #define RTC_Month_April ((uint8_t)0x04)
emilmont 77:869cf507173a 209 #define RTC_Month_May ((uint8_t)0x05)
emilmont 77:869cf507173a 210 #define RTC_Month_June ((uint8_t)0x06)
emilmont 77:869cf507173a 211 #define RTC_Month_July ((uint8_t)0x07)
emilmont 77:869cf507173a 212 #define RTC_Month_August ((uint8_t)0x08)
emilmont 77:869cf507173a 213 #define RTC_Month_September ((uint8_t)0x09)
emilmont 77:869cf507173a 214 #define RTC_Month_October ((uint8_t)0x10)
emilmont 77:869cf507173a 215 #define RTC_Month_November ((uint8_t)0x11)
emilmont 77:869cf507173a 216 #define RTC_Month_December ((uint8_t)0x12)
emilmont 77:869cf507173a 217 #define IS_RTC_MONTH(MONTH) (((MONTH) >= 1) && ((MONTH) <= 12))
emilmont 77:869cf507173a 218 #define IS_RTC_DATE(DATE) (((DATE) >= 1) && ((DATE) <= 31))
emilmont 77:869cf507173a 219
emilmont 77:869cf507173a 220 /**
emilmont 77:869cf507173a 221 * @}
emilmont 77:869cf507173a 222 */
emilmont 77:869cf507173a 223
emilmont 77:869cf507173a 224 /** @defgroup RTC_WeekDay_Definitions
emilmont 77:869cf507173a 225 * @{
emilmont 77:869cf507173a 226 */
emilmont 77:869cf507173a 227
emilmont 77:869cf507173a 228 #define RTC_Weekday_Monday ((uint8_t)0x01)
emilmont 77:869cf507173a 229 #define RTC_Weekday_Tuesday ((uint8_t)0x02)
emilmont 77:869cf507173a 230 #define RTC_Weekday_Wednesday ((uint8_t)0x03)
emilmont 77:869cf507173a 231 #define RTC_Weekday_Thursday ((uint8_t)0x04)
emilmont 77:869cf507173a 232 #define RTC_Weekday_Friday ((uint8_t)0x05)
emilmont 77:869cf507173a 233 #define RTC_Weekday_Saturday ((uint8_t)0x6)
emilmont 77:869cf507173a 234 #define RTC_Weekday_Sunday ((uint8_t)0x07)
emilmont 77:869cf507173a 235 #define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) || \
emilmont 77:869cf507173a 236 ((WEEKDAY) == RTC_Weekday_Tuesday) || \
emilmont 77:869cf507173a 237 ((WEEKDAY) == RTC_Weekday_Wednesday) || \
emilmont 77:869cf507173a 238 ((WEEKDAY) == RTC_Weekday_Thursday) || \
emilmont 77:869cf507173a 239 ((WEEKDAY) == RTC_Weekday_Friday) || \
emilmont 77:869cf507173a 240 ((WEEKDAY) == RTC_Weekday_Saturday) || \
emilmont 77:869cf507173a 241 ((WEEKDAY) == RTC_Weekday_Sunday))
emilmont 77:869cf507173a 242 /**
emilmont 77:869cf507173a 243 * @}
emilmont 77:869cf507173a 244 */
emilmont 77:869cf507173a 245
emilmont 77:869cf507173a 246
emilmont 77:869cf507173a 247 /** @defgroup RTC_Alarm_Definitions
emilmont 77:869cf507173a 248 * @{
emilmont 77:869cf507173a 249 */
emilmont 77:869cf507173a 250 #define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) > 0) && ((DATE) <= 31))
emilmont 77:869cf507173a 251 #define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) || \
emilmont 77:869cf507173a 252 ((WEEKDAY) == RTC_Weekday_Tuesday) || \
emilmont 77:869cf507173a 253 ((WEEKDAY) == RTC_Weekday_Wednesday) || \
emilmont 77:869cf507173a 254 ((WEEKDAY) == RTC_Weekday_Thursday) || \
emilmont 77:869cf507173a 255 ((WEEKDAY) == RTC_Weekday_Friday) || \
emilmont 77:869cf507173a 256 ((WEEKDAY) == RTC_Weekday_Saturday) || \
emilmont 77:869cf507173a 257 ((WEEKDAY) == RTC_Weekday_Sunday))
emilmont 77:869cf507173a 258
emilmont 77:869cf507173a 259 /**
emilmont 77:869cf507173a 260 * @}
emilmont 77:869cf507173a 261 */
emilmont 77:869cf507173a 262
emilmont 77:869cf507173a 263
emilmont 77:869cf507173a 264 /** @defgroup RTC_AlarmDateWeekDay_Definitions
emilmont 77:869cf507173a 265 * @{
emilmont 77:869cf507173a 266 */
emilmont 77:869cf507173a 267 #define RTC_AlarmDateWeekDaySel_Date ((uint32_t)0x00000000)
emilmont 77:869cf507173a 268 #define RTC_AlarmDateWeekDaySel_WeekDay ((uint32_t)0x40000000)
emilmont 77:869cf507173a 269
emilmont 77:869cf507173a 270 #define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_AlarmDateWeekDaySel_Date) || \
emilmont 77:869cf507173a 271 ((SEL) == RTC_AlarmDateWeekDaySel_WeekDay))
emilmont 77:869cf507173a 272
emilmont 77:869cf507173a 273 /**
emilmont 77:869cf507173a 274 * @}
emilmont 77:869cf507173a 275 */
emilmont 77:869cf507173a 276
emilmont 77:869cf507173a 277
emilmont 77:869cf507173a 278 /** @defgroup RTC_AlarmMask_Definitions
emilmont 77:869cf507173a 279 * @{
emilmont 77:869cf507173a 280 */
emilmont 77:869cf507173a 281 #define RTC_AlarmMask_None ((uint32_t)0x00000000)
emilmont 77:869cf507173a 282 #define RTC_AlarmMask_DateWeekDay ((uint32_t)0x80000000)
emilmont 77:869cf507173a 283 #define RTC_AlarmMask_Hours ((uint32_t)0x00800000)
emilmont 77:869cf507173a 284 #define RTC_AlarmMask_Minutes ((uint32_t)0x00008000)
emilmont 77:869cf507173a 285 #define RTC_AlarmMask_Seconds ((uint32_t)0x00000080)
emilmont 77:869cf507173a 286 #define RTC_AlarmMask_All ((uint32_t)0x80808080)
emilmont 77:869cf507173a 287 #define IS_RTC_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET)
emilmont 77:869cf507173a 288
emilmont 77:869cf507173a 289 /**
emilmont 77:869cf507173a 290 * @}
emilmont 77:869cf507173a 291 */
emilmont 77:869cf507173a 292
emilmont 77:869cf507173a 293 /** @defgroup RTC_Alarms_Definitions
emilmont 77:869cf507173a 294 * @{
emilmont 77:869cf507173a 295 */
emilmont 77:869cf507173a 296 #define RTC_Alarm_A ((uint32_t)0x00000100)
emilmont 77:869cf507173a 297 #define IS_RTC_ALARM(ALARM) ((ALARM) == RTC_Alarm_A)
emilmont 77:869cf507173a 298 #define IS_RTC_CMD_ALARM(ALARM) (((ALARM) & (RTC_Alarm_A)) != (uint32_t)RESET)
emilmont 77:869cf507173a 299
emilmont 77:869cf507173a 300 /**
emilmont 77:869cf507173a 301 * @}
emilmont 77:869cf507173a 302 */
emilmont 77:869cf507173a 303
emilmont 77:869cf507173a 304 /** @defgroup RTC_Alarm_Sub_Seconds_Masks Definitions.
emilmont 77:869cf507173a 305 * @{
emilmont 77:869cf507173a 306 */
emilmont 77:869cf507173a 307 #define RTC_AlarmSubSecondMask_All ((uint8_t)0x00) /*!< All Alarm SS fields are masked.
emilmont 77:869cf507173a 308 There is no comparison on sub seconds
emilmont 77:869cf507173a 309 for Alarm */
emilmont 77:869cf507173a 310 #define RTC_AlarmSubSecondMask_SS14_1 ((uint8_t)0x01) /*!< SS[14:1] are don't care in Alarm
emilmont 77:869cf507173a 311 comparison. Only SS[0] is compared. */
emilmont 77:869cf507173a 312 #define RTC_AlarmSubSecondMask_SS14_2 ((uint8_t)0x02) /*!< SS[14:2] are don't care in Alarm
emilmont 77:869cf507173a 313 comparison. Only SS[1:0] are compared */
emilmont 77:869cf507173a 314 #define RTC_AlarmSubSecondMask_SS14_3 ((uint8_t)0x03) /*!< SS[14:3] are don't care in Alarm
emilmont 77:869cf507173a 315 comparison. Only SS[2:0] are compared */
emilmont 77:869cf507173a 316 #define RTC_AlarmSubSecondMask_SS14_4 ((uint8_t)0x04) /*!< SS[14:4] are don't care in Alarm
emilmont 77:869cf507173a 317 comparison. Only SS[3:0] are compared */
emilmont 77:869cf507173a 318 #define RTC_AlarmSubSecondMask_SS14_5 ((uint8_t)0x05) /*!< SS[14:5] are don't care in Alarm
emilmont 77:869cf507173a 319 comparison. Only SS[4:0] are compared */
emilmont 77:869cf507173a 320 #define RTC_AlarmSubSecondMask_SS14_6 ((uint8_t)0x06) /*!< SS[14:6] are don't care in Alarm
emilmont 77:869cf507173a 321 comparison. Only SS[5:0] are compared */
emilmont 77:869cf507173a 322 #define RTC_AlarmSubSecondMask_SS14_7 ((uint8_t)0x07) /*!< SS[14:7] are don't care in Alarm
emilmont 77:869cf507173a 323 comparison. Only SS[6:0] are compared */
emilmont 77:869cf507173a 324 #define RTC_AlarmSubSecondMask_SS14_8 ((uint8_t)0x08) /*!< SS[14:8] are don't care in Alarm
emilmont 77:869cf507173a 325 comparison. Only SS[7:0] are compared */
emilmont 77:869cf507173a 326 #define RTC_AlarmSubSecondMask_SS14_9 ((uint8_t)0x09) /*!< SS[14:9] are don't care in Alarm
emilmont 77:869cf507173a 327 comparison. Only SS[8:0] are compared */
emilmont 77:869cf507173a 328 #define RTC_AlarmSubSecondMask_SS14_10 ((uint8_t)0x0A) /*!< SS[14:10] are don't care in Alarm
emilmont 77:869cf507173a 329 comparison. Only SS[9:0] are compared */
emilmont 77:869cf507173a 330 #define RTC_AlarmSubSecondMask_SS14_11 ((uint8_t)0x0B) /*!< SS[14:11] are don't care in Alarm
emilmont 77:869cf507173a 331 comparison. Only SS[10:0] are compared */
emilmont 77:869cf507173a 332 #define RTC_AlarmSubSecondMask_SS14_12 ((uint8_t)0x0C) /*!< SS[14:12] are don't care in Alarm
emilmont 77:869cf507173a 333 comparison.Only SS[11:0] are compared */
emilmont 77:869cf507173a 334 #define RTC_AlarmSubSecondMask_SS14_13 ((uint8_t)0x0D) /*!< SS[14:13] are don't care in Alarm
emilmont 77:869cf507173a 335 comparison. Only SS[12:0] are compared */
emilmont 77:869cf507173a 336 #define RTC_AlarmSubSecondMask_SS14 ((uint8_t)0x0E) /*!< SS[14] is don't care in Alarm
emilmont 77:869cf507173a 337 comparison.Only SS[13:0] are compared */
emilmont 77:869cf507173a 338 #define RTC_AlarmSubSecondMask_None ((uint8_t)0x0F) /*!< SS[14:0] are compared and must match
emilmont 77:869cf507173a 339 to activate alarm. */
emilmont 77:869cf507173a 340 #define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_AlarmSubSecondMask_All) || \
emilmont 77:869cf507173a 341 ((MASK) == RTC_AlarmSubSecondMask_SS14_1) || \
emilmont 77:869cf507173a 342 ((MASK) == RTC_AlarmSubSecondMask_SS14_2) || \
emilmont 77:869cf507173a 343 ((MASK) == RTC_AlarmSubSecondMask_SS14_3) || \
emilmont 77:869cf507173a 344 ((MASK) == RTC_AlarmSubSecondMask_SS14_4) || \
emilmont 77:869cf507173a 345 ((MASK) == RTC_AlarmSubSecondMask_SS14_5) || \
emilmont 77:869cf507173a 346 ((MASK) == RTC_AlarmSubSecondMask_SS14_6) || \
emilmont 77:869cf507173a 347 ((MASK) == RTC_AlarmSubSecondMask_SS14_7) || \
emilmont 77:869cf507173a 348 ((MASK) == RTC_AlarmSubSecondMask_SS14_8) || \
emilmont 77:869cf507173a 349 ((MASK) == RTC_AlarmSubSecondMask_SS14_9) || \
emilmont 77:869cf507173a 350 ((MASK) == RTC_AlarmSubSecondMask_SS14_10) || \
emilmont 77:869cf507173a 351 ((MASK) == RTC_AlarmSubSecondMask_SS14_11) || \
emilmont 77:869cf507173a 352 ((MASK) == RTC_AlarmSubSecondMask_SS14_12) || \
emilmont 77:869cf507173a 353 ((MASK) == RTC_AlarmSubSecondMask_SS14_13) || \
emilmont 77:869cf507173a 354 ((MASK) == RTC_AlarmSubSecondMask_SS14) || \
emilmont 77:869cf507173a 355 ((MASK) == RTC_AlarmSubSecondMask_None))
emilmont 77:869cf507173a 356 /**
emilmont 77:869cf507173a 357 * @}
emilmont 77:869cf507173a 358 */
emilmont 77:869cf507173a 359
emilmont 77:869cf507173a 360 /** @defgroup RTC_Alarm_Sub_Seconds_Value
emilmont 77:869cf507173a 361 * @{
emilmont 77:869cf507173a 362 */
emilmont 77:869cf507173a 363
emilmont 77:869cf507173a 364 #define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= 0x00007FFF)
emilmont 77:869cf507173a 365
emilmont 77:869cf507173a 366 /**
emilmont 77:869cf507173a 367 * @}
emilmont 77:869cf507173a 368 */
emilmont 77:869cf507173a 369
emilmont 77:869cf507173a 370 /** @defgroup RTC_Wakeup_Timer_Definitions
emilmont 77:869cf507173a 371 * @brief These parameters are only available for STM32F072 devices
emilmont 77:869cf507173a 372 * @{
emilmont 77:869cf507173a 373 */
emilmont 77:869cf507173a 374 #define RTC_WakeUpClock_RTCCLK_Div16 ((uint32_t)0x00000000)
emilmont 77:869cf507173a 375 #define RTC_WakeUpClock_RTCCLK_Div8 ((uint32_t)0x00000001)
emilmont 77:869cf507173a 376 #define RTC_WakeUpClock_RTCCLK_Div4 ((uint32_t)0x00000002)
emilmont 77:869cf507173a 377 #define RTC_WakeUpClock_RTCCLK_Div2 ((uint32_t)0x00000003)
emilmont 77:869cf507173a 378 #define RTC_WakeUpClock_CK_SPRE_16bits ((uint32_t)0x00000004)
emilmont 77:869cf507173a 379 #define RTC_WakeUpClock_CK_SPRE_17bits ((uint32_t)0x00000006)
emilmont 77:869cf507173a 380 #define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WakeUpClock_RTCCLK_Div16) || \
emilmont 77:869cf507173a 381 ((CLOCK) == RTC_WakeUpClock_RTCCLK_Div8) || \
emilmont 77:869cf507173a 382 ((CLOCK) == RTC_WakeUpClock_RTCCLK_Div4) || \
emilmont 77:869cf507173a 383 ((CLOCK) == RTC_WakeUpClock_RTCCLK_Div2) || \
emilmont 77:869cf507173a 384 ((CLOCK) == RTC_WakeUpClock_CK_SPRE_16bits) || \
emilmont 77:869cf507173a 385 ((CLOCK) == RTC_WakeUpClock_CK_SPRE_17bits))
emilmont 77:869cf507173a 386 #define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFF)
emilmont 77:869cf507173a 387 /**
emilmont 77:869cf507173a 388 * @}
emilmont 77:869cf507173a 389 */
emilmont 77:869cf507173a 390
emilmont 77:869cf507173a 391 /** @defgroup RTC_Time_Stamp_Edges_definitions
emilmont 77:869cf507173a 392 * @{
emilmont 77:869cf507173a 393 */
emilmont 77:869cf507173a 394 #define RTC_TimeStampEdge_Rising ((uint32_t)0x00000000)
emilmont 77:869cf507173a 395 #define RTC_TimeStampEdge_Falling ((uint32_t)0x00000008)
emilmont 77:869cf507173a 396 #define IS_RTC_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TimeStampEdge_Rising) || \
emilmont 77:869cf507173a 397 ((EDGE) == RTC_TimeStampEdge_Falling))
emilmont 77:869cf507173a 398 /**
emilmont 77:869cf507173a 399 * @}
emilmont 77:869cf507173a 400 */
emilmont 77:869cf507173a 401
emilmont 77:869cf507173a 402 /** @defgroup RTC_Output_selection_Definitions
emilmont 77:869cf507173a 403 * @{
emilmont 77:869cf507173a 404 */
emilmont 77:869cf507173a 405 #define RTC_Output_Disable ((uint32_t)0x00000000)
emilmont 77:869cf507173a 406 #define RTC_Output_AlarmA ((uint32_t)0x00200000)
emilmont 77:869cf507173a 407 #define RTC_Output_WakeUp ((uint32_t)0x00600000) /*!< available only for STM32F072 devices */
emilmont 77:869cf507173a 408
emilmont 77:869cf507173a 409 #define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_Output_Disable) || \
emilmont 77:869cf507173a 410 ((OUTPUT) == RTC_Output_AlarmA) || \
emilmont 77:869cf507173a 411 ((OUTPUT) == RTC_Output_WakeUp))
emilmont 77:869cf507173a 412
emilmont 77:869cf507173a 413 /**
emilmont 77:869cf507173a 414 * @}
emilmont 77:869cf507173a 415 */
emilmont 77:869cf507173a 416
emilmont 77:869cf507173a 417 /** @defgroup RTC_Output_Polarity_Definitions
emilmont 77:869cf507173a 418 * @{
emilmont 77:869cf507173a 419 */
emilmont 77:869cf507173a 420 #define RTC_OutputPolarity_High ((uint32_t)0x00000000)
emilmont 77:869cf507173a 421 #define RTC_OutputPolarity_Low ((uint32_t)0x00100000)
emilmont 77:869cf507173a 422 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OutputPolarity_High) || \
emilmont 77:869cf507173a 423 ((POL) == RTC_OutputPolarity_Low))
emilmont 77:869cf507173a 424 /**
emilmont 77:869cf507173a 425 * @}
emilmont 77:869cf507173a 426 */
emilmont 77:869cf507173a 427
emilmont 77:869cf507173a 428
emilmont 77:869cf507173a 429 /** @defgroup RTC_Calib_Output_selection_Definitions
emilmont 77:869cf507173a 430 * @{
emilmont 77:869cf507173a 431 */
emilmont 77:869cf507173a 432 #define RTC_CalibOutput_512Hz ((uint32_t)0x00000000)
emilmont 77:869cf507173a 433 #define RTC_CalibOutput_1Hz ((uint32_t)0x00080000)
emilmont 77:869cf507173a 434 #define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CalibOutput_512Hz) || \
emilmont 77:869cf507173a 435 ((OUTPUT) == RTC_CalibOutput_1Hz))
emilmont 77:869cf507173a 436 /**
emilmont 77:869cf507173a 437 * @}
emilmont 77:869cf507173a 438 */
emilmont 77:869cf507173a 439
emilmont 77:869cf507173a 440 /** @defgroup RTC_Smooth_calib_period_Definitions
emilmont 77:869cf507173a 441 * @{
emilmont 77:869cf507173a 442 */
emilmont 77:869cf507173a 443 #define RTC_SmoothCalibPeriod_32sec ((uint32_t)0x00000000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
emilmont 77:869cf507173a 444 period is 32s, else 2exp20 RTCCLK seconds */
emilmont 77:869cf507173a 445 #define RTC_SmoothCalibPeriod_16sec ((uint32_t)0x00002000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
emilmont 77:869cf507173a 446 period is 16s, else 2exp19 RTCCLK seconds */
emilmont 77:869cf507173a 447 #define RTC_SmoothCalibPeriod_8sec ((uint32_t)0x00004000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
emilmont 77:869cf507173a 448 period is 8s, else 2exp18 RTCCLK seconds */
emilmont 77:869cf507173a 449 #define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SmoothCalibPeriod_32sec) || \
emilmont 77:869cf507173a 450 ((PERIOD) == RTC_SmoothCalibPeriod_16sec) || \
emilmont 77:869cf507173a 451 ((PERIOD) == RTC_SmoothCalibPeriod_8sec))
emilmont 77:869cf507173a 452
emilmont 77:869cf507173a 453 /**
emilmont 77:869cf507173a 454 * @}
emilmont 77:869cf507173a 455 */
emilmont 77:869cf507173a 456
emilmont 77:869cf507173a 457 /** @defgroup RTC_Smooth_calib_Plus_pulses_Definitions
emilmont 77:869cf507173a 458 * @{
emilmont 77:869cf507173a 459 */
emilmont 77:869cf507173a 460 #define RTC_SmoothCalibPlusPulses_Set ((uint32_t)0x00008000) /*!< The number of RTCCLK pulses added
emilmont 77:869cf507173a 461 during a X -second window = Y - CALM[8:0].
emilmont 77:869cf507173a 462 with Y = 512, 256, 128 when X = 32, 16, 8 */
emilmont 77:869cf507173a 463 #define RTC_SmoothCalibPlusPulses_Reset ((uint32_t)0x00000000) /*!< The number of RTCCLK pulses subbstited
emilmont 77:869cf507173a 464 during a 32-second window = CALM[8:0]. */
emilmont 77:869cf507173a 465 #define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SmoothCalibPlusPulses_Set) || \
emilmont 77:869cf507173a 466 ((PLUS) == RTC_SmoothCalibPlusPulses_Reset))
emilmont 77:869cf507173a 467
emilmont 77:869cf507173a 468 /**
emilmont 77:869cf507173a 469 * @}
emilmont 77:869cf507173a 470 */
emilmont 77:869cf507173a 471
emilmont 77:869cf507173a 472 /** @defgroup RTC_Smooth_calib_Minus_pulses_Definitions
emilmont 77:869cf507173a 473 * @{
emilmont 77:869cf507173a 474 */
emilmont 77:869cf507173a 475 #define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= 0x000001FF)
emilmont 77:869cf507173a 476
emilmont 77:869cf507173a 477 /**
emilmont 77:869cf507173a 478 * @}
emilmont 77:869cf507173a 479 */
emilmont 77:869cf507173a 480
emilmont 77:869cf507173a 481 /** @defgroup RTC_DayLightSaving_Definitions
emilmont 77:869cf507173a 482 * @{
emilmont 77:869cf507173a 483 */
emilmont 77:869cf507173a 484 #define RTC_DayLightSaving_SUB1H ((uint32_t)0x00020000)
emilmont 77:869cf507173a 485 #define RTC_DayLightSaving_ADD1H ((uint32_t)0x00010000)
emilmont 77:869cf507173a 486 #define IS_RTC_DAYLIGHT_SAVING(SAVING) (((SAVING) == RTC_DayLightSaving_SUB1H) || \
emilmont 77:869cf507173a 487 ((SAVING) == RTC_DayLightSaving_ADD1H))
emilmont 77:869cf507173a 488
emilmont 77:869cf507173a 489 #define RTC_StoreOperation_Reset ((uint32_t)0x00000000)
emilmont 77:869cf507173a 490 #define RTC_StoreOperation_Set ((uint32_t)0x00040000)
emilmont 77:869cf507173a 491 #define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_StoreOperation_Reset) || \
emilmont 77:869cf507173a 492 ((OPERATION) == RTC_StoreOperation_Set))
emilmont 77:869cf507173a 493 /**
emilmont 77:869cf507173a 494 * @}
emilmont 77:869cf507173a 495 */
emilmont 77:869cf507173a 496
emilmont 77:869cf507173a 497 /** @defgroup RTC_Tamper_Trigger_Definitions
emilmont 77:869cf507173a 498 * @{
emilmont 77:869cf507173a 499 */
emilmont 77:869cf507173a 500 #define RTC_TamperTrigger_RisingEdge ((uint32_t)0x00000000)
emilmont 77:869cf507173a 501 #define RTC_TamperTrigger_FallingEdge ((uint32_t)0x00000001)
emilmont 77:869cf507173a 502 #define RTC_TamperTrigger_LowLevel ((uint32_t)0x00000000)
emilmont 77:869cf507173a 503 #define RTC_TamperTrigger_HighLevel ((uint32_t)0x00000001)
emilmont 77:869cf507173a 504 #define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TamperTrigger_RisingEdge) || \
emilmont 77:869cf507173a 505 ((TRIGGER) == RTC_TamperTrigger_FallingEdge) || \
emilmont 77:869cf507173a 506 ((TRIGGER) == RTC_TamperTrigger_LowLevel) || \
emilmont 77:869cf507173a 507 ((TRIGGER) == RTC_TamperTrigger_HighLevel))
emilmont 77:869cf507173a 508
emilmont 77:869cf507173a 509 /**
emilmont 77:869cf507173a 510 * @}
emilmont 77:869cf507173a 511 */
emilmont 77:869cf507173a 512
emilmont 77:869cf507173a 513 /** @defgroup RTC_Tamper_Filter_Definitions
emilmont 77:869cf507173a 514 * @{
emilmont 77:869cf507173a 515 */
emilmont 77:869cf507173a 516 #define RTC_TamperFilter_Disable ((uint32_t)0x00000000) /*!< Tamper filter is disabled */
emilmont 77:869cf507173a 517
emilmont 77:869cf507173a 518 #define RTC_TamperFilter_2Sample ((uint32_t)0x00000800) /*!< Tamper is activated after 2
emilmont 77:869cf507173a 519 consecutive samples at the active level */
emilmont 77:869cf507173a 520 #define RTC_TamperFilter_4Sample ((uint32_t)0x00001000) /*!< Tamper is activated after 4
emilmont 77:869cf507173a 521 consecutive samples at the active level */
emilmont 77:869cf507173a 522 #define RTC_TamperFilter_8Sample ((uint32_t)0x00001800) /*!< Tamper is activated after 8
emilmont 77:869cf507173a 523 consecutive samples at the active leve. */
emilmont 77:869cf507173a 524 #define IS_RTC_TAMPER_FILTER(FILTER) (((FILTER) == RTC_TamperFilter_Disable) || \
emilmont 77:869cf507173a 525 ((FILTER) == RTC_TamperFilter_2Sample) || \
emilmont 77:869cf507173a 526 ((FILTER) == RTC_TamperFilter_4Sample) || \
emilmont 77:869cf507173a 527 ((FILTER) == RTC_TamperFilter_8Sample))
emilmont 77:869cf507173a 528 /**
emilmont 77:869cf507173a 529 * @}
emilmont 77:869cf507173a 530 */
emilmont 77:869cf507173a 531
emilmont 77:869cf507173a 532 /** @defgroup RTC_Tamper_Sampling_Frequencies_Definitions
emilmont 77:869cf507173a 533 * @{
emilmont 77:869cf507173a 534 */
emilmont 77:869cf507173a 535 #define RTC_TamperSamplingFreq_RTCCLK_Div32768 ((uint32_t)0x00000000) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 536 with a frequency = RTCCLK / 32768 */
emilmont 77:869cf507173a 537 #define RTC_TamperSamplingFreq_RTCCLK_Div16384 ((uint32_t)0x00000100) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 538 with a frequency = RTCCLK / 16384 */
emilmont 77:869cf507173a 539 #define RTC_TamperSamplingFreq_RTCCLK_Div8192 ((uint32_t)0x00000200) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 540 with a frequency = RTCCLK / 8192 */
emilmont 77:869cf507173a 541 #define RTC_TamperSamplingFreq_RTCCLK_Div4096 ((uint32_t)0x00000300) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 542 with a frequency = RTCCLK / 4096 */
emilmont 77:869cf507173a 543 #define RTC_TamperSamplingFreq_RTCCLK_Div2048 ((uint32_t)0x00000400) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 544 with a frequency = RTCCLK / 2048 */
emilmont 77:869cf507173a 545 #define RTC_TamperSamplingFreq_RTCCLK_Div1024 ((uint32_t)0x00000500) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 546 with a frequency = RTCCLK / 1024 */
emilmont 77:869cf507173a 547 #define RTC_TamperSamplingFreq_RTCCLK_Div512 ((uint32_t)0x00000600) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 548 with a frequency = RTCCLK / 512 */
emilmont 77:869cf507173a 549 #define RTC_TamperSamplingFreq_RTCCLK_Div256 ((uint32_t)0x00000700) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 550 with a frequency = RTCCLK / 256 */
emilmont 77:869cf507173a 551 #define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div32768) || \
emilmont 77:869cf507173a 552 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div16384) || \
emilmont 77:869cf507173a 553 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div8192) || \
emilmont 77:869cf507173a 554 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div4096) || \
emilmont 77:869cf507173a 555 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div2048) || \
emilmont 77:869cf507173a 556 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div1024) || \
emilmont 77:869cf507173a 557 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div512) || \
emilmont 77:869cf507173a 558 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div256))
emilmont 77:869cf507173a 559
emilmont 77:869cf507173a 560 /**
emilmont 77:869cf507173a 561 * @}
emilmont 77:869cf507173a 562 */
emilmont 77:869cf507173a 563
emilmont 77:869cf507173a 564 /** @defgroup RTC_Tamper_Pin_Precharge_Duration_Definitions
emilmont 77:869cf507173a 565 * @{
emilmont 77:869cf507173a 566 */
emilmont 77:869cf507173a 567 #define RTC_TamperPrechargeDuration_1RTCCLK ((uint32_t)0x00000000) /*!< Tamper pins are pre-charged before
emilmont 77:869cf507173a 568 sampling during 1 RTCCLK cycle */
emilmont 77:869cf507173a 569 #define RTC_TamperPrechargeDuration_2RTCCLK ((uint32_t)0x00002000) /*!< Tamper pins are pre-charged before
emilmont 77:869cf507173a 570 sampling during 2 RTCCLK cycles */
emilmont 77:869cf507173a 571 #define RTC_TamperPrechargeDuration_4RTCCLK ((uint32_t)0x00004000) /*!< Tamper pins are pre-charged before
emilmont 77:869cf507173a 572 sampling during 4 RTCCLK cycles */
emilmont 77:869cf507173a 573 #define RTC_TamperPrechargeDuration_8RTCCLK ((uint32_t)0x00006000) /*!< Tamper pins are pre-charged before
emilmont 77:869cf507173a 574 sampling during 8 RTCCLK cycles */
emilmont 77:869cf507173a 575
emilmont 77:869cf507173a 576 #define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TamperPrechargeDuration_1RTCCLK) || \
emilmont 77:869cf507173a 577 ((DURATION) == RTC_TamperPrechargeDuration_2RTCCLK) || \
emilmont 77:869cf507173a 578 ((DURATION) == RTC_TamperPrechargeDuration_4RTCCLK) || \
emilmont 77:869cf507173a 579 ((DURATION) == RTC_TamperPrechargeDuration_8RTCCLK))
emilmont 77:869cf507173a 580 /**
emilmont 77:869cf507173a 581 * @}
emilmont 77:869cf507173a 582 */
emilmont 77:869cf507173a 583
emilmont 77:869cf507173a 584 /** @defgroup RTC_Tamper_Pins_Definitions
emilmont 77:869cf507173a 585 * @{
emilmont 77:869cf507173a 586 */
emilmont 77:869cf507173a 587 #define RTC_Tamper_1 RTC_TAFCR_TAMP1E /*!< Tamper detection enable for
emilmont 77:869cf507173a 588 input tamper 1 */
emilmont 77:869cf507173a 589 #define RTC_Tamper_2 RTC_TAFCR_TAMP2E /*!< Tamper detection enable for
emilmont 77:869cf507173a 590 input tamper 2 */
emilmont 77:869cf507173a 591 #define RTC_Tamper_3 RTC_TAFCR_TAMP3E /*!< Tamper detection enable for
emilmont 77:869cf507173a 592 input tamper 3, available only
emilmont 77:869cf507173a 593 for STM32F072 devices */
emilmont 77:869cf507173a 594 #define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & (uint32_t)0xFFFFFFD6) == 0x00) && ((TAMPER) != (uint32_t)RESET))
emilmont 77:869cf507173a 595
emilmont 77:869cf507173a 596 /**
emilmont 77:869cf507173a 597 * @}
emilmont 77:869cf507173a 598 */
emilmont 77:869cf507173a 599
emilmont 77:869cf507173a 600 /** @defgroup RTC_Output_Type_ALARM_OUT
emilmont 77:869cf507173a 601 * @{
emilmont 77:869cf507173a 602 */
emilmont 77:869cf507173a 603 #define RTC_OutputType_OpenDrain ((uint32_t)0x00000000)
emilmont 77:869cf507173a 604 #define RTC_OutputType_PushPull ((uint32_t)0x00040000)
emilmont 77:869cf507173a 605 #define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OutputType_OpenDrain) || \
emilmont 77:869cf507173a 606 ((TYPE) == RTC_OutputType_PushPull))
emilmont 77:869cf507173a 607
emilmont 77:869cf507173a 608 /**
emilmont 77:869cf507173a 609 * @}
emilmont 77:869cf507173a 610 */
emilmont 77:869cf507173a 611
emilmont 77:869cf507173a 612 /** @defgroup RTC_Add_1_Second_Parameter_Definitions
emilmont 77:869cf507173a 613 * @{
emilmont 77:869cf507173a 614 */
emilmont 77:869cf507173a 615 #define RTC_ShiftAdd1S_Reset ((uint32_t)0x00000000)
emilmont 77:869cf507173a 616 #define RTC_ShiftAdd1S_Set ((uint32_t)0x80000000)
emilmont 77:869cf507173a 617 #define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_ShiftAdd1S_Reset) || \
emilmont 77:869cf507173a 618 ((SEL) == RTC_ShiftAdd1S_Set))
emilmont 77:869cf507173a 619 /**
emilmont 77:869cf507173a 620 * @}
emilmont 77:869cf507173a 621 */
emilmont 77:869cf507173a 622
emilmont 77:869cf507173a 623 /** @defgroup RTC_Substract_Fraction_Of_Second_Value
emilmont 77:869cf507173a 624 * @{
emilmont 77:869cf507173a 625 */
emilmont 77:869cf507173a 626 #define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= 0x00007FFF)
emilmont 77:869cf507173a 627
emilmont 77:869cf507173a 628 /**
emilmont 77:869cf507173a 629 * @}
emilmont 77:869cf507173a 630 */
emilmont 77:869cf507173a 631
emilmont 77:869cf507173a 632 /** @defgroup RTC_Backup_Registers_Definitions
emilmont 77:869cf507173a 633 * @{
emilmont 77:869cf507173a 634 */
emilmont 77:869cf507173a 635
emilmont 77:869cf507173a 636 #define RTC_BKP_DR0 ((uint32_t)0x00000000)
emilmont 77:869cf507173a 637 #define RTC_BKP_DR1 ((uint32_t)0x00000001)
emilmont 77:869cf507173a 638 #define RTC_BKP_DR2 ((uint32_t)0x00000002)
emilmont 77:869cf507173a 639 #define RTC_BKP_DR3 ((uint32_t)0x00000003)
emilmont 77:869cf507173a 640 #define RTC_BKP_DR4 ((uint32_t)0x00000004)
emilmont 77:869cf507173a 641 #define IS_RTC_BKP(BKP) (((BKP) == RTC_BKP_DR0) || \
emilmont 77:869cf507173a 642 ((BKP) == RTC_BKP_DR1) || \
emilmont 77:869cf507173a 643 ((BKP) == RTC_BKP_DR2) || \
emilmont 77:869cf507173a 644 ((BKP) == RTC_BKP_DR3) || \
emilmont 77:869cf507173a 645 ((BKP) == RTC_BKP_DR4))
emilmont 77:869cf507173a 646 /**
emilmont 77:869cf507173a 647 * @}
emilmont 77:869cf507173a 648 */
emilmont 77:869cf507173a 649
emilmont 77:869cf507173a 650 /** @defgroup RTC_Input_parameter_format_definitions
emilmont 77:869cf507173a 651 * @{
emilmont 77:869cf507173a 652 */
emilmont 77:869cf507173a 653 #define RTC_Format_BIN ((uint32_t)0x000000000)
emilmont 77:869cf507173a 654 #define RTC_Format_BCD ((uint32_t)0x000000001)
emilmont 77:869cf507173a 655 #define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_Format_BIN) || ((FORMAT) == RTC_Format_BCD))
emilmont 77:869cf507173a 656
emilmont 77:869cf507173a 657 /**
emilmont 77:869cf507173a 658 * @}
emilmont 77:869cf507173a 659 */
emilmont 77:869cf507173a 660
emilmont 77:869cf507173a 661 /** @defgroup RTC_Flags_Definitions
emilmont 77:869cf507173a 662 * @{
emilmont 77:869cf507173a 663 */
emilmont 77:869cf507173a 664 #define RTC_FLAG_RECALPF RTC_ISR_RECALPF
emilmont 77:869cf507173a 665 #define RTC_FLAG_TAMP3F RTC_ISR_TAMP3F /*!< Only available for STM32F072 devices */
emilmont 77:869cf507173a 666 #define RTC_FLAG_TAMP2F RTC_ISR_TAMP2F
emilmont 77:869cf507173a 667 #define RTC_FLAG_TAMP1F RTC_ISR_TAMP1F
emilmont 77:869cf507173a 668 #define RTC_FLAG_TSOVF RTC_ISR_TSOVF
emilmont 77:869cf507173a 669 #define RTC_FLAG_TSF RTC_ISR_TSF
emilmont 77:869cf507173a 670 #define RTC_FLAG_WUTF RTC_ISR_WUTF /*!< Only available for STM32F072 devices */
emilmont 77:869cf507173a 671 #define RTC_FLAG_ALRAF RTC_ISR_ALRAF
emilmont 77:869cf507173a 672 #define RTC_FLAG_INITF RTC_ISR_INITF
emilmont 77:869cf507173a 673 #define RTC_FLAG_RSF RTC_ISR_RSF
emilmont 77:869cf507173a 674 #define RTC_FLAG_INITS RTC_ISR_INITS
emilmont 77:869cf507173a 675 #define RTC_FLAG_SHPF RTC_ISR_SHPF
emilmont 77:869cf507173a 676 #define RTC_FLAG_WUTWF RTC_ISR_WUTWF /*!< Only available for STM32F072 devices */
emilmont 77:869cf507173a 677 #define RTC_FLAG_ALRAWF RTC_ISR_ALRAWF
emilmont 77:869cf507173a 678
emilmont 77:869cf507173a 679 #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_TSOVF) || ((FLAG) == RTC_FLAG_TSF) || \
emilmont 77:869cf507173a 680 ((FLAG) == RTC_FLAG_WUTF) || ((FLAG) == RTC_FLAG_ALRAWF) || \
emilmont 77:869cf507173a 681 ((FLAG) == RTC_FLAG_ALRAF) || ((FLAG) == RTC_FLAG_INITF) || \
emilmont 77:869cf507173a 682 ((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_WUTWF) || \
emilmont 77:869cf507173a 683 ((FLAG) == RTC_FLAG_TAMP1F) || ((FLAG) == RTC_FLAG_TAMP2F) || \
emilmont 77:869cf507173a 684 ((FLAG) == RTC_FLAG_TAMP3F) || ((FLAG) == RTC_FLAG_RECALPF) || \
emilmont 77:869cf507173a 685 ((FLAG) == RTC_FLAG_SHPF))
emilmont 77:869cf507173a 686 #define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF02DF) == (uint32_t)RESET))
emilmont 77:869cf507173a 687
emilmont 77:869cf507173a 688 /**
emilmont 77:869cf507173a 689 * @}
emilmont 77:869cf507173a 690 */
emilmont 77:869cf507173a 691
emilmont 77:869cf507173a 692 /** @defgroup RTC_Interrupts_Definitions
emilmont 77:869cf507173a 693 * @{
emilmont 77:869cf507173a 694 */
emilmont 77:869cf507173a 695 #define RTC_IT_TS ((uint32_t)0x00008000)
emilmont 77:869cf507173a 696 #define RTC_IT_WUT ((uint32_t)0x00004000) /* Available only for STM32F072 devices */
emilmont 77:869cf507173a 697 #define RTC_IT_ALRA ((uint32_t)0x00001000)
emilmont 77:869cf507173a 698 #define RTC_IT_TAMP ((uint32_t)0x00000004) /* Used only to Enable the Tamper Interrupt */
emilmont 77:869cf507173a 699 #define RTC_IT_TAMP1 ((uint32_t)0x00020000)
emilmont 77:869cf507173a 700 #define RTC_IT_TAMP2 ((uint32_t)0x00040000)
emilmont 77:869cf507173a 701 #define RTC_IT_TAMP3 ((uint32_t)0x00080000) /* Available only for STM32F072 devices */
emilmont 77:869cf507173a 702
emilmont 77:869cf507173a 703 #define IS_RTC_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFF2FFB) == (uint32_t)RESET))
emilmont 77:869cf507173a 704 #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_TS) || ((IT) == RTC_IT_ALRA) || \
emilmont 77:869cf507173a 705 ((IT) == RTC_IT_TAMP1) || ((IT) == RTC_IT_WUT) || \
emilmont 77:869cf507173a 706 ((IT) == RTC_IT_TAMP2) || ((IT) == RTC_IT_TAMP3))
emilmont 77:869cf507173a 707
emilmont 77:869cf507173a 708 #define IS_RTC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFF12FFF) == (uint32_t)RESET))
emilmont 77:869cf507173a 709
emilmont 77:869cf507173a 710 /**
emilmont 77:869cf507173a 711 * @}
emilmont 77:869cf507173a 712 */
emilmont 77:869cf507173a 713
emilmont 77:869cf507173a 714 /**
emilmont 77:869cf507173a 715 * @}
emilmont 77:869cf507173a 716 */
emilmont 77:869cf507173a 717
emilmont 77:869cf507173a 718
emilmont 77:869cf507173a 719 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 720 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 721 /* Function used to set the RTC configuration to the default reset state *****/
emilmont 77:869cf507173a 722 ErrorStatus RTC_DeInit(void);
emilmont 77:869cf507173a 723
emilmont 77:869cf507173a 724
emilmont 77:869cf507173a 725 /* Initialization and Configuration functions *********************************/
emilmont 77:869cf507173a 726 ErrorStatus RTC_Init(RTC_InitTypeDef* RTC_InitStruct);
emilmont 77:869cf507173a 727 void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct);
emilmont 77:869cf507173a 728 void RTC_WriteProtectionCmd(FunctionalState NewState);
emilmont 77:869cf507173a 729 ErrorStatus RTC_EnterInitMode(void);
emilmont 77:869cf507173a 730 void RTC_ExitInitMode(void);
emilmont 77:869cf507173a 731 ErrorStatus RTC_WaitForSynchro(void);
emilmont 77:869cf507173a 732 ErrorStatus RTC_RefClockCmd(FunctionalState NewState);
emilmont 77:869cf507173a 733 void RTC_BypassShadowCmd(FunctionalState NewState);
emilmont 77:869cf507173a 734
emilmont 77:869cf507173a 735 /* Time and Date configuration functions **************************************/
emilmont 77:869cf507173a 736 ErrorStatus RTC_SetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
emilmont 77:869cf507173a 737 void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct);
emilmont 77:869cf507173a 738 void RTC_GetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
emilmont 77:869cf507173a 739 uint32_t RTC_GetSubSecond(void);
emilmont 77:869cf507173a 740 ErrorStatus RTC_SetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
emilmont 77:869cf507173a 741 void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct);
emilmont 77:869cf507173a 742 void RTC_GetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
emilmont 77:869cf507173a 743
emilmont 77:869cf507173a 744 /* Alarms (Alarm A) configuration functions **********************************/
emilmont 77:869cf507173a 745 void RTC_SetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
emilmont 77:869cf507173a 746 void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct);
emilmont 77:869cf507173a 747 void RTC_GetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
emilmont 77:869cf507173a 748 ErrorStatus RTC_AlarmCmd(uint32_t RTC_Alarm, FunctionalState NewState);
emilmont 77:869cf507173a 749 void RTC_AlarmSubSecondConfig(uint32_t RTC_Alarm, uint32_t RTC_AlarmSubSecondValue, uint8_t RTC_AlarmSubSecondMask);
emilmont 77:869cf507173a 750 uint32_t RTC_GetAlarmSubSecond(uint32_t RTC_Alarm);
emilmont 77:869cf507173a 751
emilmont 77:869cf507173a 752 /* WakeUp Timer configuration functions ***************************************/
emilmont 77:869cf507173a 753 void RTC_WakeUpClockConfig(uint32_t RTC_WakeUpClock); /*!< available only for STM32F072 devices */
emilmont 77:869cf507173a 754 void RTC_SetWakeUpCounter(uint32_t RTC_WakeUpCounter); /*!< available only for STM32F072 devices */
emilmont 77:869cf507173a 755 uint32_t RTC_GetWakeUpCounter(void); /*!< available only for STM32F072 devices */
emilmont 77:869cf507173a 756 ErrorStatus RTC_WakeUpCmd(FunctionalState NewState); /*!< available only for STM32F072 devices */
emilmont 77:869cf507173a 757
emilmont 77:869cf507173a 758 /* Daylight Saving configuration functions ************************************/
emilmont 77:869cf507173a 759 void RTC_DayLightSavingConfig(uint32_t RTC_DayLightSaving, uint32_t RTC_StoreOperation);
emilmont 77:869cf507173a 760 uint32_t RTC_GetStoreOperation(void);
emilmont 77:869cf507173a 761
emilmont 77:869cf507173a 762 /* Output pin Configuration function ******************************************/
emilmont 77:869cf507173a 763 void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity);
emilmont 77:869cf507173a 764
emilmont 77:869cf507173a 765 /* Digital Calibration configuration functions ********************************/
emilmont 77:869cf507173a 766 void RTC_CalibOutputCmd(FunctionalState NewState);
emilmont 77:869cf507173a 767 void RTC_CalibOutputConfig(uint32_t RTC_CalibOutput);
emilmont 77:869cf507173a 768 ErrorStatus RTC_SmoothCalibConfig(uint32_t RTC_SmoothCalibPeriod,
emilmont 77:869cf507173a 769 uint32_t RTC_SmoothCalibPlusPulses,
emilmont 77:869cf507173a 770 uint32_t RTC_SmouthCalibMinusPulsesValue);
emilmont 77:869cf507173a 771
emilmont 77:869cf507173a 772 /* TimeStamp configuration functions ******************************************/
emilmont 77:869cf507173a 773 void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState);
emilmont 77:869cf507173a 774 void RTC_GetTimeStamp(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_StampTimeStruct, RTC_DateTypeDef* RTC_StampDateStruct);
emilmont 77:869cf507173a 775 uint32_t RTC_GetTimeStampSubSecond(void);
emilmont 77:869cf507173a 776
emilmont 77:869cf507173a 777 /* Tampers configuration functions ********************************************/
emilmont 77:869cf507173a 778 void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger);
emilmont 77:869cf507173a 779 void RTC_TamperCmd(uint32_t RTC_Tamper, FunctionalState NewState);
emilmont 77:869cf507173a 780 void RTC_TamperFilterConfig(uint32_t RTC_TamperFilter);
emilmont 77:869cf507173a 781 void RTC_TamperSamplingFreqConfig(uint32_t RTC_TamperSamplingFreq);
emilmont 77:869cf507173a 782 void RTC_TamperPinsPrechargeDuration(uint32_t RTC_TamperPrechargeDuration);
emilmont 77:869cf507173a 783 void RTC_TimeStampOnTamperDetectionCmd(FunctionalState NewState);
emilmont 77:869cf507173a 784 void RTC_TamperPullUpCmd(FunctionalState NewState);
emilmont 77:869cf507173a 785
emilmont 77:869cf507173a 786 /* Backup Data Registers configuration functions ******************************/
emilmont 77:869cf507173a 787 void RTC_WriteBackupRegister(uint32_t RTC_BKP_DR, uint32_t Data);
emilmont 77:869cf507173a 788 uint32_t RTC_ReadBackupRegister(uint32_t RTC_BKP_DR);
emilmont 77:869cf507173a 789
emilmont 77:869cf507173a 790 /* Output Type Config configuration functions *********************************/
emilmont 77:869cf507173a 791 void RTC_OutputTypeConfig(uint32_t RTC_OutputType);
emilmont 77:869cf507173a 792
emilmont 77:869cf507173a 793 /* RTC_Shift_control_synchonisation_functions *********************************/
emilmont 77:869cf507173a 794 ErrorStatus RTC_SynchroShiftConfig(uint32_t RTC_ShiftAdd1S, uint32_t RTC_ShiftSubFS);
emilmont 77:869cf507173a 795
emilmont 77:869cf507173a 796 /* Interrupts and flags management functions **********************************/
emilmont 77:869cf507173a 797 void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState);
emilmont 77:869cf507173a 798 FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG);
emilmont 77:869cf507173a 799 void RTC_ClearFlag(uint32_t RTC_FLAG);
emilmont 77:869cf507173a 800 ITStatus RTC_GetITStatus(uint32_t RTC_IT);
emilmont 77:869cf507173a 801 void RTC_ClearITPendingBit(uint32_t RTC_IT);
emilmont 77:869cf507173a 802
emilmont 77:869cf507173a 803 #ifdef __cplusplus
emilmont 77:869cf507173a 804 }
emilmont 77:869cf507173a 805 #endif
emilmont 77:869cf507173a 806
emilmont 77:869cf507173a 807 #endif /*__STM32F0XX_RTC_H */
emilmont 77:869cf507173a 808
emilmont 77:869cf507173a 809 /**
emilmont 77:869cf507173a 810 * @}
emilmont 77:869cf507173a 811 */
emilmont 77:869cf507173a 812
emilmont 77:869cf507173a 813 /**
emilmont 77:869cf507173a 814 * @}
emilmont 77:869cf507173a 815 */
emilmont 77:869cf507173a 816
emilmont 77:869cf507173a 817 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/