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TARGET_NUCLEO_F030R8/stm32f0xx_misc.h@86:4f9a848d74c7, 2014-06-25 (annotated)

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
81:7d30d6019079 
version_2.0

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emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f0xx_misc.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 16-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the miscellaneous
emilmont 77:869cf507173a 8 * firmware library functions (add-on to CMSIS functions).
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
bogdanm 81:7d30d6019079 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
bogdanm 81:7d30d6019079 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 81:7d30d6019079 15 * are permitted provided that the following conditions are met:
bogdanm 81:7d30d6019079 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 81:7d30d6019079 17 * this list of conditions and the following disclaimer.
bogdanm 81:7d30d6019079 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 81:7d30d6019079 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 81:7d30d6019079 20 * and/or other materials provided with the distribution.
bogdanm 81:7d30d6019079 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 81:7d30d6019079 22 * may be used to endorse or promote products derived from this software
bogdanm 81:7d30d6019079 23 * without specific prior written permission.
emilmont 77:869cf507173a 24 *
bogdanm 81:7d30d6019079 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 81:7d30d6019079 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 81:7d30d6019079 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 81:7d30d6019079 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 81:7d30d6019079 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 81:7d30d6019079 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 81:7d30d6019079 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 81:7d30d6019079 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 81:7d30d6019079 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 81:7d30d6019079 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 35 *
emilmont 77:869cf507173a 36 ******************************************************************************
emilmont 77:869cf507173a 37 */
emilmont 77:869cf507173a 38
emilmont 77:869cf507173a 39 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 40 #ifndef __STM32F0XX_MISC_H
emilmont 77:869cf507173a 41 #define __STM32F0XX_MISC_H
emilmont 77:869cf507173a 42
emilmont 77:869cf507173a 43 #ifdef __cplusplus
emilmont 77:869cf507173a 44 extern "C" {
emilmont 77:869cf507173a 45 #endif
emilmont 77:869cf507173a 46
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32f0xx.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32F0xx_StdPeriph_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup MISC
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57
emilmont 77:869cf507173a 58 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 /**
emilmont 77:869cf507173a 61 * @brief NVIC Init Structure definition
emilmont 77:869cf507173a 62 */
emilmont 77:869cf507173a 63
emilmont 77:869cf507173a 64 typedef struct
emilmont 77:869cf507173a 65 {
emilmont 77:869cf507173a 66 uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
emilmont 77:869cf507173a 67 This parameter can be a value of @ref IRQn_Type
emilmont 77:869cf507173a 68 (For the complete STM32 Devices IRQ Channels list,
emilmont 77:869cf507173a 69 please refer to stm32f0xx.h file) */
emilmont 77:869cf507173a 70
emilmont 77:869cf507173a 71 uint8_t NVIC_IRQChannelPriority; /*!< Specifies the priority level for the IRQ channel specified
emilmont 77:869cf507173a 72 in NVIC_IRQChannel. This parameter can be a value
emilmont 77:869cf507173a 73 between 0 and 3. */
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
emilmont 77:869cf507173a 76 will be enabled or disabled.
emilmont 77:869cf507173a 77 This parameter can be set either to ENABLE or DISABLE */
emilmont 77:869cf507173a 78 } NVIC_InitTypeDef;
emilmont 77:869cf507173a 79
emilmont 77:869cf507173a 80 /**
emilmont 77:869cf507173a 81 *
emilmont 77:869cf507173a 82 @verbatim
emilmont 77:869cf507173a 83
emilmont 77:869cf507173a 84 @endverbatim
emilmont 77:869cf507173a 85 */
emilmont 77:869cf507173a 86
emilmont 77:869cf507173a 87 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 88
emilmont 77:869cf507173a 89 /** @defgroup MISC_Exported_Constants
emilmont 77:869cf507173a 90 * @{
emilmont 77:869cf507173a 91 */
emilmont 77:869cf507173a 92
emilmont 77:869cf507173a 93 /** @defgroup MISC_System_Low_Power
emilmont 77:869cf507173a 94 * @{
emilmont 77:869cf507173a 95 */
emilmont 77:869cf507173a 96
emilmont 77:869cf507173a 97 #define NVIC_LP_SEVONPEND ((uint8_t)0x10)
emilmont 77:869cf507173a 98 #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
emilmont 77:869cf507173a 99 #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
emilmont 77:869cf507173a 100 #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
emilmont 77:869cf507173a 101 ((LP) == NVIC_LP_SLEEPDEEP) || \
emilmont 77:869cf507173a 102 ((LP) == NVIC_LP_SLEEPONEXIT))
emilmont 77:869cf507173a 103 /**
emilmont 77:869cf507173a 104 * @}
emilmont 77:869cf507173a 105 */
emilmont 77:869cf507173a 106
emilmont 77:869cf507173a 107 /** @defgroup MISC_Preemption_Priority_Group
emilmont 77:869cf507173a 108 * @{
emilmont 77:869cf507173a 109 */
emilmont 77:869cf507173a 110 #define IS_NVIC_PRIORITY(PRIORITY) ((PRIORITY) < 0x04)
emilmont 77:869cf507173a 111
emilmont 77:869cf507173a 112 /**
emilmont 77:869cf507173a 113 * @}
emilmont 77:869cf507173a 114 */
emilmont 77:869cf507173a 115
emilmont 77:869cf507173a 116 /** @defgroup MISC_SysTick_clock_source
emilmont 77:869cf507173a 117 * @{
emilmont 77:869cf507173a 118 */
emilmont 77:869cf507173a 119
emilmont 77:869cf507173a 120 #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
emilmont 77:869cf507173a 121 #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
emilmont 77:869cf507173a 122 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
emilmont 77:869cf507173a 123 ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
emilmont 77:869cf507173a 124 /**
emilmont 77:869cf507173a 125 * @}
emilmont 77:869cf507173a 126 */
emilmont 77:869cf507173a 127
emilmont 77:869cf507173a 128 /**
emilmont 77:869cf507173a 129 * @}
emilmont 77:869cf507173a 130 */
emilmont 77:869cf507173a 131
emilmont 77:869cf507173a 132 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 133 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
emilmont 77:869cf507173a 136 void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
emilmont 77:869cf507173a 137 void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
emilmont 77:869cf507173a 138
emilmont 77:869cf507173a 139 #ifdef __cplusplus
emilmont 77:869cf507173a 140 }
emilmont 77:869cf507173a 141 #endif
emilmont 77:869cf507173a 142
emilmont 77:869cf507173a 143 #endif /* __STM32F0XX_MISC_H */
emilmont 77:869cf507173a 144
emilmont 77:869cf507173a 145 /**
emilmont 77:869cf507173a 146 * @}
emilmont 77:869cf507173a 147 */
emilmont 77:869cf507173a 148
emilmont 77:869cf507173a 149 /**
emilmont 77:869cf507173a 150 * @}
emilmont 77:869cf507173a 151 */
emilmont 77:869cf507173a 152
emilmont 77:869cf507173a 153 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/