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TARGET_NUCLEO_F030R8/stm32f0xx_gpio.h@86:4f9a848d74c7, 2014-06-25 (annotated)

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
81:7d30d6019079 
version_2.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f0xx_gpio.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 16-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the GPIO
emilmont 77:869cf507173a 8 * firmware library.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
bogdanm 81:7d30d6019079 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
bogdanm 81:7d30d6019079 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 81:7d30d6019079 15 * are permitted provided that the following conditions are met:
bogdanm 81:7d30d6019079 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 81:7d30d6019079 17 * this list of conditions and the following disclaimer.
bogdanm 81:7d30d6019079 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 81:7d30d6019079 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 81:7d30d6019079 20 * and/or other materials provided with the distribution.
bogdanm 81:7d30d6019079 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 81:7d30d6019079 22 * may be used to endorse or promote products derived from this software
bogdanm 81:7d30d6019079 23 * without specific prior written permission.
emilmont 77:869cf507173a 24 *
bogdanm 81:7d30d6019079 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 81:7d30d6019079 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 81:7d30d6019079 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 81:7d30d6019079 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 81:7d30d6019079 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 81:7d30d6019079 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 81:7d30d6019079 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 81:7d30d6019079 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 81:7d30d6019079 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 81:7d30d6019079 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 35 *
emilmont 77:869cf507173a 36 ******************************************************************************
emilmont 77:869cf507173a 37 */
emilmont 77:869cf507173a 38
emilmont 77:869cf507173a 39 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 40 #ifndef __STM32F0XX_GPIO_H
emilmont 77:869cf507173a 41 #define __STM32F0XX_GPIO_H
emilmont 77:869cf507173a 42
emilmont 77:869cf507173a 43 #ifdef __cplusplus
emilmont 77:869cf507173a 44 extern "C" {
emilmont 77:869cf507173a 45 #endif
emilmont 77:869cf507173a 46
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32f0xx.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32F0xx_StdPeriph_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup GPIO
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 #define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
emilmont 77:869cf507173a 60 ((PERIPH) == GPIOB) || \
emilmont 77:869cf507173a 61 ((PERIPH) == GPIOC) || \
emilmont 77:869cf507173a 62 ((PERIPH) == GPIOD) || \
emilmont 77:869cf507173a 63 ((PERIPH) == GPIOE) || \
emilmont 77:869cf507173a 64 ((PERIPH) == GPIOF))
emilmont 77:869cf507173a 65
emilmont 77:869cf507173a 66 #define IS_GPIO_LIST_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
emilmont 77:869cf507173a 67 ((PERIPH) == GPIOB))
emilmont 77:869cf507173a 68
emilmont 77:869cf507173a 69 /** @defgroup Configuration_Mode_enumeration
emilmont 77:869cf507173a 70 * @{
emilmont 77:869cf507173a 71 */
emilmont 77:869cf507173a 72 typedef enum
emilmont 77:869cf507173a 73 {
emilmont 77:869cf507173a 74 GPIO_Mode_IN = 0x00, /*!< GPIO Input Mode */
emilmont 77:869cf507173a 75 GPIO_Mode_OUT = 0x01, /*!< GPIO Output Mode */
emilmont 77:869cf507173a 76 GPIO_Mode_AF = 0x02, /*!< GPIO Alternate function Mode */
emilmont 77:869cf507173a 77 GPIO_Mode_AN = 0x03 /*!< GPIO Analog In/Out Mode */
emilmont 77:869cf507173a 78 }GPIOMode_TypeDef;
emilmont 77:869cf507173a 79
emilmont 77:869cf507173a 80 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_IN)|| ((MODE) == GPIO_Mode_OUT) || \
emilmont 77:869cf507173a 81 ((MODE) == GPIO_Mode_AF)|| ((MODE) == GPIO_Mode_AN))
emilmont 77:869cf507173a 82 /**
emilmont 77:869cf507173a 83 * @}
emilmont 77:869cf507173a 84 */
emilmont 77:869cf507173a 85
emilmont 77:869cf507173a 86 /** @defgroup Output_type_enumeration
emilmont 77:869cf507173a 87 * @{
emilmont 77:869cf507173a 88 */
emilmont 77:869cf507173a 89 typedef enum
emilmont 77:869cf507173a 90 {
emilmont 77:869cf507173a 91 GPIO_OType_PP = 0x00,
emilmont 77:869cf507173a 92 GPIO_OType_OD = 0x01
emilmont 77:869cf507173a 93 }GPIOOType_TypeDef;
emilmont 77:869cf507173a 94
emilmont 77:869cf507173a 95 #define IS_GPIO_OTYPE(OTYPE) (((OTYPE) == GPIO_OType_PP) || ((OTYPE) == GPIO_OType_OD))
emilmont 77:869cf507173a 96
emilmont 77:869cf507173a 97 /**
emilmont 77:869cf507173a 98 * @}
emilmont 77:869cf507173a 99 */
emilmont 77:869cf507173a 100
emilmont 77:869cf507173a 101 /** @defgroup Output_Maximum_frequency_enumeration
emilmont 77:869cf507173a 102 * @{
emilmont 77:869cf507173a 103 */
emilmont 77:869cf507173a 104 typedef enum
emilmont 77:869cf507173a 105 {
emilmont 77:869cf507173a 106 GPIO_Speed_Level_1 = 0x00, /*!< I/O output speed: Low 2 MHz */
emilmont 77:869cf507173a 107 GPIO_Speed_Level_2 = 0x01, /*!< I/O output speed: Medium 10 MHz */
emilmont 77:869cf507173a 108 GPIO_Speed_Level_3 = 0x03 /*!< I/O output speed: High 50 MHz */
emilmont 77:869cf507173a 109 }GPIOSpeed_TypeDef;
emilmont 77:869cf507173a 110
emilmont 77:869cf507173a 111 #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_Level_1) || ((SPEED) == GPIO_Speed_Level_2) || \
emilmont 77:869cf507173a 112 ((SPEED) == GPIO_Speed_Level_3))
emilmont 77:869cf507173a 113 /**
emilmont 77:869cf507173a 114 * @}
emilmont 77:869cf507173a 115 */
emilmont 77:869cf507173a 116
emilmont 77:869cf507173a 117 /** @defgroup Configuration_Pull-Up_Pull-Down_enumeration
emilmont 77:869cf507173a 118 * @{
emilmont 77:869cf507173a 119 */
emilmont 77:869cf507173a 120 typedef enum
emilmont 77:869cf507173a 121 {
emilmont 77:869cf507173a 122 GPIO_PuPd_NOPULL = 0x00,
emilmont 77:869cf507173a 123 GPIO_PuPd_UP = 0x01,
emilmont 77:869cf507173a 124 GPIO_PuPd_DOWN = 0x02
emilmont 77:869cf507173a 125 }GPIOPuPd_TypeDef;
emilmont 77:869cf507173a 126
emilmont 77:869cf507173a 127 #define IS_GPIO_PUPD(PUPD) (((PUPD) == GPIO_PuPd_NOPULL) || ((PUPD) == GPIO_PuPd_UP) || \
emilmont 77:869cf507173a 128 ((PUPD) == GPIO_PuPd_DOWN))
emilmont 77:869cf507173a 129 /**
emilmont 77:869cf507173a 130 * @}
emilmont 77:869cf507173a 131 */
emilmont 77:869cf507173a 132
emilmont 77:869cf507173a 133 /** @defgroup Bit_SET_and_Bit_RESET_enumeration
emilmont 77:869cf507173a 134 * @{
emilmont 77:869cf507173a 135 */
emilmont 77:869cf507173a 136 typedef enum
emilmont 77:869cf507173a 137 {
emilmont 77:869cf507173a 138 Bit_RESET = 0,
emilmont 77:869cf507173a 139 Bit_SET
emilmont 77:869cf507173a 140 }BitAction;
emilmont 77:869cf507173a 141
emilmont 77:869cf507173a 142 #define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
emilmont 77:869cf507173a 143 /**
emilmont 77:869cf507173a 144 * @}
emilmont 77:869cf507173a 145 */
emilmont 77:869cf507173a 146
emilmont 77:869cf507173a 147 /**
emilmont 77:869cf507173a 148 * @brief GPIO Init structure definition
emilmont 77:869cf507173a 149 */
emilmont 77:869cf507173a 150 typedef struct
emilmont 77:869cf507173a 151 {
emilmont 77:869cf507173a 152 uint32_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
emilmont 77:869cf507173a 153 This parameter can be any value of @ref GPIO_pins_define */
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
emilmont 77:869cf507173a 156 This parameter can be a value of @ref GPIOMode_TypeDef */
emilmont 77:869cf507173a 157
emilmont 77:869cf507173a 158 GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
emilmont 77:869cf507173a 159 This parameter can be a value of @ref GPIOSpeed_TypeDef */
emilmont 77:869cf507173a 160
emilmont 77:869cf507173a 161 GPIOOType_TypeDef GPIO_OType; /*!< Specifies the operating output type for the selected pins.
emilmont 77:869cf507173a 162 This parameter can be a value of @ref GPIOOType_TypeDef */
emilmont 77:869cf507173a 163
emilmont 77:869cf507173a 164 GPIOPuPd_TypeDef GPIO_PuPd; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
emilmont 77:869cf507173a 165 This parameter can be a value of @ref GPIOPuPd_TypeDef */
emilmont 77:869cf507173a 166 }GPIO_InitTypeDef;
emilmont 77:869cf507173a 167
emilmont 77:869cf507173a 168 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 169
emilmont 77:869cf507173a 170 /** @defgroup GPIO_Exported_Constants
emilmont 77:869cf507173a 171 * @{
emilmont 77:869cf507173a 172 */
emilmont 77:869cf507173a 173
emilmont 77:869cf507173a 174 /** @defgroup GPIO_pins_define
emilmont 77:869cf507173a 175 * @{
emilmont 77:869cf507173a 176 */
emilmont 77:869cf507173a 177 #define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
emilmont 77:869cf507173a 178 #define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
emilmont 77:869cf507173a 179 #define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
emilmont 77:869cf507173a 180 #define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
emilmont 77:869cf507173a 181 #define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
emilmont 77:869cf507173a 182 #define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
emilmont 77:869cf507173a 183 #define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
emilmont 77:869cf507173a 184 #define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
emilmont 77:869cf507173a 185 #define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
emilmont 77:869cf507173a 186 #define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
emilmont 77:869cf507173a 187 #define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
emilmont 77:869cf507173a 188 #define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
emilmont 77:869cf507173a 189 #define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
emilmont 77:869cf507173a 190 #define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
emilmont 77:869cf507173a 191 #define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
emilmont 77:869cf507173a 192 #define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
emilmont 77:869cf507173a 193 #define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
emilmont 77:869cf507173a 194
emilmont 77:869cf507173a 195 #define IS_GPIO_PIN(PIN) ((PIN) != (uint16_t)0x00)
emilmont 77:869cf507173a 196
emilmont 77:869cf507173a 197 #define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
emilmont 77:869cf507173a 198 ((PIN) == GPIO_Pin_1) || \
emilmont 77:869cf507173a 199 ((PIN) == GPIO_Pin_2) || \
emilmont 77:869cf507173a 200 ((PIN) == GPIO_Pin_3) || \
emilmont 77:869cf507173a 201 ((PIN) == GPIO_Pin_4) || \
emilmont 77:869cf507173a 202 ((PIN) == GPIO_Pin_5) || \
emilmont 77:869cf507173a 203 ((PIN) == GPIO_Pin_6) || \
emilmont 77:869cf507173a 204 ((PIN) == GPIO_Pin_7) || \
emilmont 77:869cf507173a 205 ((PIN) == GPIO_Pin_8) || \
emilmont 77:869cf507173a 206 ((PIN) == GPIO_Pin_9) || \
emilmont 77:869cf507173a 207 ((PIN) == GPIO_Pin_10) || \
emilmont 77:869cf507173a 208 ((PIN) == GPIO_Pin_11) || \
emilmont 77:869cf507173a 209 ((PIN) == GPIO_Pin_12) || \
emilmont 77:869cf507173a 210 ((PIN) == GPIO_Pin_13) || \
emilmont 77:869cf507173a 211 ((PIN) == GPIO_Pin_14) || \
emilmont 77:869cf507173a 212 ((PIN) == GPIO_Pin_15))
emilmont 77:869cf507173a 213
emilmont 77:869cf507173a 214 /**
emilmont 77:869cf507173a 215 * @}
emilmont 77:869cf507173a 216 */
emilmont 77:869cf507173a 217
emilmont 77:869cf507173a 218 /** @defgroup GPIO_Pin_sources
emilmont 77:869cf507173a 219 * @{
emilmont 77:869cf507173a 220 */
emilmont 77:869cf507173a 221 #define GPIO_PinSource0 ((uint8_t)0x00)
emilmont 77:869cf507173a 222 #define GPIO_PinSource1 ((uint8_t)0x01)
emilmont 77:869cf507173a 223 #define GPIO_PinSource2 ((uint8_t)0x02)
emilmont 77:869cf507173a 224 #define GPIO_PinSource3 ((uint8_t)0x03)
emilmont 77:869cf507173a 225 #define GPIO_PinSource4 ((uint8_t)0x04)
emilmont 77:869cf507173a 226 #define GPIO_PinSource5 ((uint8_t)0x05)
emilmont 77:869cf507173a 227 #define GPIO_PinSource6 ((uint8_t)0x06)
emilmont 77:869cf507173a 228 #define GPIO_PinSource7 ((uint8_t)0x07)
emilmont 77:869cf507173a 229 #define GPIO_PinSource8 ((uint8_t)0x08)
emilmont 77:869cf507173a 230 #define GPIO_PinSource9 ((uint8_t)0x09)
emilmont 77:869cf507173a 231 #define GPIO_PinSource10 ((uint8_t)0x0A)
emilmont 77:869cf507173a 232 #define GPIO_PinSource11 ((uint8_t)0x0B)
emilmont 77:869cf507173a 233 #define GPIO_PinSource12 ((uint8_t)0x0C)
emilmont 77:869cf507173a 234 #define GPIO_PinSource13 ((uint8_t)0x0D)
emilmont 77:869cf507173a 235 #define GPIO_PinSource14 ((uint8_t)0x0E)
emilmont 77:869cf507173a 236 #define GPIO_PinSource15 ((uint8_t)0x0F)
emilmont 77:869cf507173a 237
emilmont 77:869cf507173a 238 #define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
emilmont 77:869cf507173a 239 ((PINSOURCE) == GPIO_PinSource1) || \
emilmont 77:869cf507173a 240 ((PINSOURCE) == GPIO_PinSource2) || \
emilmont 77:869cf507173a 241 ((PINSOURCE) == GPIO_PinSource3) || \
emilmont 77:869cf507173a 242 ((PINSOURCE) == GPIO_PinSource4) || \
emilmont 77:869cf507173a 243 ((PINSOURCE) == GPIO_PinSource5) || \
emilmont 77:869cf507173a 244 ((PINSOURCE) == GPIO_PinSource6) || \
emilmont 77:869cf507173a 245 ((PINSOURCE) == GPIO_PinSource7) || \
emilmont 77:869cf507173a 246 ((PINSOURCE) == GPIO_PinSource8) || \
emilmont 77:869cf507173a 247 ((PINSOURCE) == GPIO_PinSource9) || \
emilmont 77:869cf507173a 248 ((PINSOURCE) == GPIO_PinSource10) || \
emilmont 77:869cf507173a 249 ((PINSOURCE) == GPIO_PinSource11) || \
emilmont 77:869cf507173a 250 ((PINSOURCE) == GPIO_PinSource12) || \
emilmont 77:869cf507173a 251 ((PINSOURCE) == GPIO_PinSource13) || \
emilmont 77:869cf507173a 252 ((PINSOURCE) == GPIO_PinSource14) || \
emilmont 77:869cf507173a 253 ((PINSOURCE) == GPIO_PinSource15))
emilmont 77:869cf507173a 254 /**
emilmont 77:869cf507173a 255 * @}
emilmont 77:869cf507173a 256 */
emilmont 77:869cf507173a 257
emilmont 77:869cf507173a 258 /** @defgroup GPIO_Alternate_function_selection_define
emilmont 77:869cf507173a 259 * @{
emilmont 77:869cf507173a 260 */
emilmont 77:869cf507173a 261
emilmont 77:869cf507173a 262 /**
emilmont 77:869cf507173a 263 * @brief AF 0 selection
emilmont 77:869cf507173a 264 */
emilmont 77:869cf507173a 265 #define GPIO_AF_0 ((uint8_t)0x00) /* WKUP, EVENTOUT, TIM15, SPI1, TIM17,
emilmont 77:869cf507173a 266 MCO, SWDAT, SWCLK, TIM14, BOOT,
emilmont 77:869cf507173a 267 USART1, CEC, IR_OUT, SPI2, TS, TIM3,
emilmont 77:869cf507173a 268 USART4, CAN, TIM3, USART2, USART3,
emilmont 77:869cf507173a 269 CRS, TIM16, TIM1 */
emilmont 77:869cf507173a 270 /**
emilmont 77:869cf507173a 271 * @brief AF 1 selection
emilmont 77:869cf507173a 272 */
emilmont 77:869cf507173a 273 #define GPIO_AF_1 ((uint8_t)0x01) /* USART2, CEC, TIM3, USART1, IR,
emilmont 77:869cf507173a 274 EVENTOUT, I2C1, I2C2, TIM15, SPI2,
emilmont 77:869cf507173a 275 USART3, TS, SPI1 */
emilmont 77:869cf507173a 276 /**
emilmont 77:869cf507173a 277 * @brief AF 2 selection
emilmont 77:869cf507173a 278 */
emilmont 77:869cf507173a 279 #define GPIO_AF_2 ((uint8_t)0x02) /* TIM2, TIM1, EVENTOUT, TIM16, TIM17,
emilmont 77:869cf507173a 280 USB */
emilmont 77:869cf507173a 281 /**
emilmont 77:869cf507173a 282 * @brief AF 3 selection
emilmont 77:869cf507173a 283 */
emilmont 77:869cf507173a 284 #define GPIO_AF_3 ((uint8_t)0x03) /* TS, I2C1, TIM15, EVENTOUT */
emilmont 77:869cf507173a 285
emilmont 77:869cf507173a 286 /**
emilmont 77:869cf507173a 287 * @brief AF 4 selection
emilmont 77:869cf507173a 288 */
emilmont 77:869cf507173a 289 #define GPIO_AF_4 ((uint8_t)0x04) /* TIM14, USART4, USART3, CRS, CAN,
emilmont 77:869cf507173a 290 I2C1 */
emilmont 77:869cf507173a 291
emilmont 77:869cf507173a 292 /**
emilmont 77:869cf507173a 293 * @brief AF 5 selection
emilmont 77:869cf507173a 294 */
emilmont 77:869cf507173a 295 #define GPIO_AF_5 ((uint8_t)0x05) /* TIM16, TIM17, TIM15, SPI2, I2C2,
emilmont 77:869cf507173a 296 MCO, I2C1, USB */
emilmont 77:869cf507173a 297
emilmont 77:869cf507173a 298 /**
emilmont 77:869cf507173a 299 * @brief AF 6 selection
emilmont 77:869cf507173a 300 */
emilmont 77:869cf507173a 301 #define GPIO_AF_6 ((uint8_t)0x06) /* EVENTOUT */
emilmont 77:869cf507173a 302 /**
emilmont 77:869cf507173a 303 * @brief AF 7 selection
emilmont 77:869cf507173a 304 */
emilmont 77:869cf507173a 305 #define GPIO_AF_7 ((uint8_t)0x07) /* COMP1 OUT and COMP2 OUT */
emilmont 77:869cf507173a 306
emilmont 77:869cf507173a 307 #define IS_GPIO_AF(AF) (((AF) == GPIO_AF_0) || ((AF) == GPIO_AF_1) || \
emilmont 77:869cf507173a 308 ((AF) == GPIO_AF_2) || ((AF) == GPIO_AF_3) || \
emilmont 77:869cf507173a 309 ((AF) == GPIO_AF_4) || ((AF) == GPIO_AF_5) || \
emilmont 77:869cf507173a 310 ((AF) == GPIO_AF_6) || ((AF) == GPIO_AF_7))
emilmont 77:869cf507173a 311
emilmont 77:869cf507173a 312 /**
emilmont 77:869cf507173a 313 * @}
emilmont 77:869cf507173a 314 */
emilmont 77:869cf507173a 315
emilmont 77:869cf507173a 316 /** @defgroup GPIO_Speed_Legacy
emilmont 77:869cf507173a 317 * @{
emilmont 77:869cf507173a 318 */
emilmont 77:869cf507173a 319
emilmont 77:869cf507173a 320 #define GPIO_Speed_2MHz GPIO_Speed_Level_1 /*!< I/O output speed: Low 2 MHz */
emilmont 77:869cf507173a 321 #define GPIO_Speed_10MHz GPIO_Speed_Level_2 /*!< I/O output speed: Medium 10 MHz */
emilmont 77:869cf507173a 322 #define GPIO_Speed_50MHz GPIO_Speed_Level_3 /*!< I/O output speed: High 50 MHz */
emilmont 77:869cf507173a 323
emilmont 77:869cf507173a 324 /**
emilmont 77:869cf507173a 325 * @}
emilmont 77:869cf507173a 326 */
emilmont 77:869cf507173a 327
emilmont 77:869cf507173a 328 /**
emilmont 77:869cf507173a 329 * @}
emilmont 77:869cf507173a 330 */
emilmont 77:869cf507173a 331
emilmont 77:869cf507173a 332 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 333 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 334 /* Function used to set the GPIO configuration to the default reset state *****/
emilmont 77:869cf507173a 335 void GPIO_DeInit(GPIO_TypeDef* GPIOx);
emilmont 77:869cf507173a 336
emilmont 77:869cf507173a 337 /* Initialization and Configuration functions *********************************/
emilmont 77:869cf507173a 338 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
emilmont 77:869cf507173a 339 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
emilmont 77:869cf507173a 340 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
emilmont 77:869cf507173a 341
emilmont 77:869cf507173a 342 /* GPIO Read and Write functions **********************************************/
emilmont 77:869cf507173a 343 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
emilmont 77:869cf507173a 344 uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
emilmont 77:869cf507173a 345 uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
emilmont 77:869cf507173a 346 uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
emilmont 77:869cf507173a 347 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
emilmont 77:869cf507173a 348 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
emilmont 77:869cf507173a 349 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
emilmont 77:869cf507173a 350 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
emilmont 77:869cf507173a 351
emilmont 77:869cf507173a 352 /* GPIO Alternate functions configuration functions ***************************/
emilmont 77:869cf507173a 353 void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF);
emilmont 77:869cf507173a 354
emilmont 77:869cf507173a 355 #ifdef __cplusplus
emilmont 77:869cf507173a 356 }
emilmont 77:869cf507173a 357 #endif
emilmont 77:869cf507173a 358
emilmont 77:869cf507173a 359 #endif /* __STM32F0XX_GPIO_H */
emilmont 77:869cf507173a 360 /**
emilmont 77:869cf507173a 361 * @}
emilmont 77:869cf507173a 362 */
emilmont 77:869cf507173a 363
emilmont 77:869cf507173a 364 /**
emilmont 77:869cf507173a 365 * @}
emilmont 77:869cf507173a 366 */
emilmont 77:869cf507173a 367
emilmont 77:869cf507173a 368 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/