erez i / mbed

version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

TARGET_LPC11U68/core_cmInstr.h@86:4f9a848d74c7, 2014-06-25 (annotated)

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
84:0b3ab51c8877 
version_2.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**************************************************************************//**
bogdanm 84:0b3ab51c8877 2 * @file core_cmInstr.h
bogdanm 84:0b3ab51c8877 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
bogdanm 84:0b3ab51c8877 4 * @version V3.20
bogdanm 84:0b3ab51c8877 5 * @date 05. March 2013
bogdanm 84:0b3ab51c8877 6 *
bogdanm 84:0b3ab51c8877 7 * @note
bogdanm 84:0b3ab51c8877 8 *
bogdanm 84:0b3ab51c8877 9 ******************************************************************************/
bogdanm 84:0b3ab51c8877 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 84:0b3ab51c8877 11
bogdanm 84:0b3ab51c8877 12 All rights reserved.
bogdanm 84:0b3ab51c8877 13 Redistribution and use in source and binary forms, with or without
bogdanm 84:0b3ab51c8877 14 modification, are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 - Redistributions of source code must retain the above copyright
bogdanm 84:0b3ab51c8877 16 notice, this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 84:0b3ab51c8877 18 notice, this list of conditions and the following disclaimer in the
bogdanm 84:0b3ab51c8877 19 documentation and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 84:0b3ab51c8877 21 to endorse or promote products derived from this software without
bogdanm 84:0b3ab51c8877 22 specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 84:0b3ab51c8877 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 84:0b3ab51c8877 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 84:0b3ab51c8877 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 84:0b3ab51c8877 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 84:0b3ab51c8877 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 84:0b3ab51c8877 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 84:0b3ab51c8877 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 84:0b3ab51c8877 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 35 ---------------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 36
bogdanm 84:0b3ab51c8877 37
bogdanm 84:0b3ab51c8877 38 #ifndef __CORE_CMINSTR_H
bogdanm 84:0b3ab51c8877 39 #define __CORE_CMINSTR_H
bogdanm 84:0b3ab51c8877 40
bogdanm 84:0b3ab51c8877 41
bogdanm 84:0b3ab51c8877 42 /* ########################## Core Instruction Access ######################### */
bogdanm 84:0b3ab51c8877 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 84:0b3ab51c8877 44 Access to dedicated instructions
bogdanm 84:0b3ab51c8877 45 @{
bogdanm 84:0b3ab51c8877 46 */
bogdanm 84:0b3ab51c8877 47
bogdanm 84:0b3ab51c8877 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 84:0b3ab51c8877 49 /* ARM armcc specific functions */
bogdanm 84:0b3ab51c8877 50
bogdanm 84:0b3ab51c8877 51 #if (__ARMCC_VERSION < 400677)
bogdanm 84:0b3ab51c8877 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 84:0b3ab51c8877 53 #endif
bogdanm 84:0b3ab51c8877 54
bogdanm 84:0b3ab51c8877 55
bogdanm 84:0b3ab51c8877 56 /** \brief No Operation
bogdanm 84:0b3ab51c8877 57
bogdanm 84:0b3ab51c8877 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 84:0b3ab51c8877 59 */
bogdanm 84:0b3ab51c8877 60 #define __NOP __nop
bogdanm 84:0b3ab51c8877 61
bogdanm 84:0b3ab51c8877 62
bogdanm 84:0b3ab51c8877 63 /** \brief Wait For Interrupt
bogdanm 84:0b3ab51c8877 64
bogdanm 84:0b3ab51c8877 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 84:0b3ab51c8877 66 until one of a number of events occurs.
bogdanm 84:0b3ab51c8877 67 */
bogdanm 84:0b3ab51c8877 68 #define __WFI __wfi
bogdanm 84:0b3ab51c8877 69
bogdanm 84:0b3ab51c8877 70
bogdanm 84:0b3ab51c8877 71 /** \brief Wait For Event
bogdanm 84:0b3ab51c8877 72
bogdanm 84:0b3ab51c8877 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 84:0b3ab51c8877 74 a low-power state until one of a number of events occurs.
bogdanm 84:0b3ab51c8877 75 */
bogdanm 84:0b3ab51c8877 76 #define __WFE __wfe
bogdanm 84:0b3ab51c8877 77
bogdanm 84:0b3ab51c8877 78
bogdanm 84:0b3ab51c8877 79 /** \brief Send Event
bogdanm 84:0b3ab51c8877 80
bogdanm 84:0b3ab51c8877 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 84:0b3ab51c8877 82 */
bogdanm 84:0b3ab51c8877 83 #define __SEV __sev
bogdanm 84:0b3ab51c8877 84
bogdanm 84:0b3ab51c8877 85
bogdanm 84:0b3ab51c8877 86 /** \brief Instruction Synchronization Barrier
bogdanm 84:0b3ab51c8877 87
bogdanm 84:0b3ab51c8877 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 84:0b3ab51c8877 89 so that all instructions following the ISB are fetched from cache or
bogdanm 84:0b3ab51c8877 90 memory, after the instruction has been completed.
bogdanm 84:0b3ab51c8877 91 */
bogdanm 84:0b3ab51c8877 92 #define __ISB() __isb(0xF)
bogdanm 84:0b3ab51c8877 93
bogdanm 84:0b3ab51c8877 94
bogdanm 84:0b3ab51c8877 95 /** \brief Data Synchronization Barrier
bogdanm 84:0b3ab51c8877 96
bogdanm 84:0b3ab51c8877 97 This function acts as a special kind of Data Memory Barrier.
bogdanm 84:0b3ab51c8877 98 It completes when all explicit memory accesses before this instruction complete.
bogdanm 84:0b3ab51c8877 99 */
bogdanm 84:0b3ab51c8877 100 #define __DSB() __dsb(0xF)
bogdanm 84:0b3ab51c8877 101
bogdanm 84:0b3ab51c8877 102
bogdanm 84:0b3ab51c8877 103 /** \brief Data Memory Barrier
bogdanm 84:0b3ab51c8877 104
bogdanm 84:0b3ab51c8877 105 This function ensures the apparent order of the explicit memory operations before
bogdanm 84:0b3ab51c8877 106 and after the instruction, without ensuring their completion.
bogdanm 84:0b3ab51c8877 107 */
bogdanm 84:0b3ab51c8877 108 #define __DMB() __dmb(0xF)
bogdanm 84:0b3ab51c8877 109
bogdanm 84:0b3ab51c8877 110
bogdanm 84:0b3ab51c8877 111 /** \brief Reverse byte order (32 bit)
bogdanm 84:0b3ab51c8877 112
bogdanm 84:0b3ab51c8877 113 This function reverses the byte order in integer value.
bogdanm 84:0b3ab51c8877 114
bogdanm 84:0b3ab51c8877 115 \param [in] value Value to reverse
bogdanm 84:0b3ab51c8877 116 \return Reversed value
bogdanm 84:0b3ab51c8877 117 */
bogdanm 84:0b3ab51c8877 118 #define __REV __rev
bogdanm 84:0b3ab51c8877 119
bogdanm 84:0b3ab51c8877 120
bogdanm 84:0b3ab51c8877 121 /** \brief Reverse byte order (16 bit)
bogdanm 84:0b3ab51c8877 122
bogdanm 84:0b3ab51c8877 123 This function reverses the byte order in two unsigned short values.
bogdanm 84:0b3ab51c8877 124
bogdanm 84:0b3ab51c8877 125 \param [in] value Value to reverse
bogdanm 84:0b3ab51c8877 126 \return Reversed value
bogdanm 84:0b3ab51c8877 127 */
bogdanm 84:0b3ab51c8877 128 #ifndef __NO_EMBEDDED_ASM
bogdanm 84:0b3ab51c8877 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 84:0b3ab51c8877 130 {
bogdanm 84:0b3ab51c8877 131 rev16 r0, r0
bogdanm 84:0b3ab51c8877 132 bx lr
bogdanm 84:0b3ab51c8877 133 }
bogdanm 84:0b3ab51c8877 134 #endif
bogdanm 84:0b3ab51c8877 135
bogdanm 84:0b3ab51c8877 136 /** \brief Reverse byte order in signed short value
bogdanm 84:0b3ab51c8877 137
bogdanm 84:0b3ab51c8877 138 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 84:0b3ab51c8877 139
bogdanm 84:0b3ab51c8877 140 \param [in] value Value to reverse
bogdanm 84:0b3ab51c8877 141 \return Reversed value
bogdanm 84:0b3ab51c8877 142 */
bogdanm 84:0b3ab51c8877 143 #ifndef __NO_EMBEDDED_ASM
bogdanm 84:0b3ab51c8877 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 84:0b3ab51c8877 145 {
bogdanm 84:0b3ab51c8877 146 revsh r0, r0
bogdanm 84:0b3ab51c8877 147 bx lr
bogdanm 84:0b3ab51c8877 148 }
bogdanm 84:0b3ab51c8877 149 #endif
bogdanm 84:0b3ab51c8877 150
bogdanm 84:0b3ab51c8877 151
bogdanm 84:0b3ab51c8877 152 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 84:0b3ab51c8877 153
bogdanm 84:0b3ab51c8877 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 84:0b3ab51c8877 155
bogdanm 84:0b3ab51c8877 156 \param [in] value Value to rotate
bogdanm 84:0b3ab51c8877 157 \param [in] value Number of Bits to rotate
bogdanm 84:0b3ab51c8877 158 \return Rotated value
bogdanm 84:0b3ab51c8877 159 */
bogdanm 84:0b3ab51c8877 160 #define __ROR __ror
bogdanm 84:0b3ab51c8877 161
bogdanm 84:0b3ab51c8877 162
bogdanm 84:0b3ab51c8877 163 /** \brief Breakpoint
bogdanm 84:0b3ab51c8877 164
bogdanm 84:0b3ab51c8877 165 This function causes the processor to enter Debug state.
bogdanm 84:0b3ab51c8877 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 84:0b3ab51c8877 167
bogdanm 84:0b3ab51c8877 168 \param [in] value is ignored by the processor.
bogdanm 84:0b3ab51c8877 169 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 84:0b3ab51c8877 170 */
bogdanm 84:0b3ab51c8877 171 #define __BKPT(value) __breakpoint(value)
bogdanm 84:0b3ab51c8877 172
bogdanm 84:0b3ab51c8877 173
bogdanm 84:0b3ab51c8877 174 #if (__CORTEX_M >= 0x03)
bogdanm 84:0b3ab51c8877 175
bogdanm 84:0b3ab51c8877 176 /** \brief Reverse bit order of value
bogdanm 84:0b3ab51c8877 177
bogdanm 84:0b3ab51c8877 178 This function reverses the bit order of the given value.
bogdanm 84:0b3ab51c8877 179
bogdanm 84:0b3ab51c8877 180 \param [in] value Value to reverse
bogdanm 84:0b3ab51c8877 181 \return Reversed value
bogdanm 84:0b3ab51c8877 182 */
bogdanm 84:0b3ab51c8877 183 #define __RBIT __rbit
bogdanm 84:0b3ab51c8877 184
bogdanm 84:0b3ab51c8877 185
bogdanm 84:0b3ab51c8877 186 /** \brief LDR Exclusive (8 bit)
bogdanm 84:0b3ab51c8877 187
bogdanm 84:0b3ab51c8877 188 This function performs a exclusive LDR command for 8 bit value.
bogdanm 84:0b3ab51c8877 189
bogdanm 84:0b3ab51c8877 190 \param [in] ptr Pointer to data
bogdanm 84:0b3ab51c8877 191 \return value of type uint8_t at (*ptr)
bogdanm 84:0b3ab51c8877 192 */
bogdanm 84:0b3ab51c8877 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 84:0b3ab51c8877 194
bogdanm 84:0b3ab51c8877 195
bogdanm 84:0b3ab51c8877 196 /** \brief LDR Exclusive (16 bit)
bogdanm 84:0b3ab51c8877 197
bogdanm 84:0b3ab51c8877 198 This function performs a exclusive LDR command for 16 bit values.
bogdanm 84:0b3ab51c8877 199
bogdanm 84:0b3ab51c8877 200 \param [in] ptr Pointer to data
bogdanm 84:0b3ab51c8877 201 \return value of type uint16_t at (*ptr)
bogdanm 84:0b3ab51c8877 202 */
bogdanm 84:0b3ab51c8877 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 84:0b3ab51c8877 204
bogdanm 84:0b3ab51c8877 205
bogdanm 84:0b3ab51c8877 206 /** \brief LDR Exclusive (32 bit)
bogdanm 84:0b3ab51c8877 207
bogdanm 84:0b3ab51c8877 208 This function performs a exclusive LDR command for 32 bit values.
bogdanm 84:0b3ab51c8877 209
bogdanm 84:0b3ab51c8877 210 \param [in] ptr Pointer to data
bogdanm 84:0b3ab51c8877 211 \return value of type uint32_t at (*ptr)
bogdanm 84:0b3ab51c8877 212 */
bogdanm 84:0b3ab51c8877 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 84:0b3ab51c8877 214
bogdanm 84:0b3ab51c8877 215
bogdanm 84:0b3ab51c8877 216 /** \brief STR Exclusive (8 bit)
bogdanm 84:0b3ab51c8877 217
bogdanm 84:0b3ab51c8877 218 This function performs a exclusive STR command for 8 bit values.
bogdanm 84:0b3ab51c8877 219
bogdanm 84:0b3ab51c8877 220 \param [in] value Value to store
bogdanm 84:0b3ab51c8877 221 \param [in] ptr Pointer to location
bogdanm 84:0b3ab51c8877 222 \return 0 Function succeeded
bogdanm 84:0b3ab51c8877 223 \return 1 Function failed
bogdanm 84:0b3ab51c8877 224 */
bogdanm 84:0b3ab51c8877 225 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 84:0b3ab51c8877 226
bogdanm 84:0b3ab51c8877 227
bogdanm 84:0b3ab51c8877 228 /** \brief STR Exclusive (16 bit)
bogdanm 84:0b3ab51c8877 229
bogdanm 84:0b3ab51c8877 230 This function performs a exclusive STR command for 16 bit values.
bogdanm 84:0b3ab51c8877 231
bogdanm 84:0b3ab51c8877 232 \param [in] value Value to store
bogdanm 84:0b3ab51c8877 233 \param [in] ptr Pointer to location
bogdanm 84:0b3ab51c8877 234 \return 0 Function succeeded
bogdanm 84:0b3ab51c8877 235 \return 1 Function failed
bogdanm 84:0b3ab51c8877 236 */
bogdanm 84:0b3ab51c8877 237 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 84:0b3ab51c8877 238
bogdanm 84:0b3ab51c8877 239
bogdanm 84:0b3ab51c8877 240 /** \brief STR Exclusive (32 bit)
bogdanm 84:0b3ab51c8877 241
bogdanm 84:0b3ab51c8877 242 This function performs a exclusive STR command for 32 bit values.
bogdanm 84:0b3ab51c8877 243
bogdanm 84:0b3ab51c8877 244 \param [in] value Value to store
bogdanm 84:0b3ab51c8877 245 \param [in] ptr Pointer to location
bogdanm 84:0b3ab51c8877 246 \return 0 Function succeeded
bogdanm 84:0b3ab51c8877 247 \return 1 Function failed
bogdanm 84:0b3ab51c8877 248 */
bogdanm 84:0b3ab51c8877 249 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 84:0b3ab51c8877 250
bogdanm 84:0b3ab51c8877 251
bogdanm 84:0b3ab51c8877 252 /** \brief Remove the exclusive lock
bogdanm 84:0b3ab51c8877 253
bogdanm 84:0b3ab51c8877 254 This function removes the exclusive lock which is created by LDREX.
bogdanm 84:0b3ab51c8877 255
bogdanm 84:0b3ab51c8877 256 */
bogdanm 84:0b3ab51c8877 257 #define __CLREX __clrex
bogdanm 84:0b3ab51c8877 258
bogdanm 84:0b3ab51c8877 259
bogdanm 84:0b3ab51c8877 260 /** \brief Signed Saturate
bogdanm 84:0b3ab51c8877 261
bogdanm 84:0b3ab51c8877 262 This function saturates a signed value.
bogdanm 84:0b3ab51c8877 263
bogdanm 84:0b3ab51c8877 264 \param [in] value Value to be saturated
bogdanm 84:0b3ab51c8877 265 \param [in] sat Bit position to saturate to (1..32)
bogdanm 84:0b3ab51c8877 266 \return Saturated value
bogdanm 84:0b3ab51c8877 267 */
bogdanm 84:0b3ab51c8877 268 #define __SSAT __ssat
bogdanm 84:0b3ab51c8877 269
bogdanm 84:0b3ab51c8877 270
bogdanm 84:0b3ab51c8877 271 /** \brief Unsigned Saturate
bogdanm 84:0b3ab51c8877 272
bogdanm 84:0b3ab51c8877 273 This function saturates an unsigned value.
bogdanm 84:0b3ab51c8877 274
bogdanm 84:0b3ab51c8877 275 \param [in] value Value to be saturated
bogdanm 84:0b3ab51c8877 276 \param [in] sat Bit position to saturate to (0..31)
bogdanm 84:0b3ab51c8877 277 \return Saturated value
bogdanm 84:0b3ab51c8877 278 */
bogdanm 84:0b3ab51c8877 279 #define __USAT __usat
bogdanm 84:0b3ab51c8877 280
bogdanm 84:0b3ab51c8877 281
bogdanm 84:0b3ab51c8877 282 /** \brief Count leading zeros
bogdanm 84:0b3ab51c8877 283
bogdanm 84:0b3ab51c8877 284 This function counts the number of leading zeros of a data value.
bogdanm 84:0b3ab51c8877 285
bogdanm 84:0b3ab51c8877 286 \param [in] value Value to count the leading zeros
bogdanm 84:0b3ab51c8877 287 \return number of leading zeros in value
bogdanm 84:0b3ab51c8877 288 */
bogdanm 84:0b3ab51c8877 289 #define __CLZ __clz
bogdanm 84:0b3ab51c8877 290
bogdanm 84:0b3ab51c8877 291 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 84:0b3ab51c8877 292
bogdanm 84:0b3ab51c8877 293
bogdanm 84:0b3ab51c8877 294
bogdanm 84:0b3ab51c8877 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 84:0b3ab51c8877 296 /* IAR iccarm specific functions */
bogdanm 84:0b3ab51c8877 297
bogdanm 84:0b3ab51c8877 298 #include <cmsis_iar.h>
bogdanm 84:0b3ab51c8877 299
bogdanm 84:0b3ab51c8877 300
bogdanm 84:0b3ab51c8877 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 84:0b3ab51c8877 302 /* TI CCS specific functions */
bogdanm 84:0b3ab51c8877 303
bogdanm 84:0b3ab51c8877 304 #include <cmsis_ccs.h>
bogdanm 84:0b3ab51c8877 305
bogdanm 84:0b3ab51c8877 306
bogdanm 84:0b3ab51c8877 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 84:0b3ab51c8877 308 /* GNU gcc specific functions */
bogdanm 84:0b3ab51c8877 309
bogdanm 84:0b3ab51c8877 310 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 84:0b3ab51c8877 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 84:0b3ab51c8877 312 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 84:0b3ab51c8877 313 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 84:0b3ab51c8877 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 84:0b3ab51c8877 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 84:0b3ab51c8877 316 #else
bogdanm 84:0b3ab51c8877 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 84:0b3ab51c8877 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 84:0b3ab51c8877 319 #endif
bogdanm 84:0b3ab51c8877 320
bogdanm 84:0b3ab51c8877 321 /** \brief No Operation
bogdanm 84:0b3ab51c8877 322
bogdanm 84:0b3ab51c8877 323 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 84:0b3ab51c8877 324 */
bogdanm 84:0b3ab51c8877 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
bogdanm 84:0b3ab51c8877 326 {
bogdanm 84:0b3ab51c8877 327 __ASM volatile ("nop");
bogdanm 84:0b3ab51c8877 328 }
bogdanm 84:0b3ab51c8877 329
bogdanm 84:0b3ab51c8877 330
bogdanm 84:0b3ab51c8877 331 /** \brief Wait For Interrupt
bogdanm 84:0b3ab51c8877 332
bogdanm 84:0b3ab51c8877 333 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 84:0b3ab51c8877 334 until one of a number of events occurs.
bogdanm 84:0b3ab51c8877 335 */
bogdanm 84:0b3ab51c8877 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
bogdanm 84:0b3ab51c8877 337 {
bogdanm 84:0b3ab51c8877 338 __ASM volatile ("wfi");
bogdanm 84:0b3ab51c8877 339 }
bogdanm 84:0b3ab51c8877 340
bogdanm 84:0b3ab51c8877 341
bogdanm 84:0b3ab51c8877 342 /** \brief Wait For Event
bogdanm 84:0b3ab51c8877 343
bogdanm 84:0b3ab51c8877 344 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 84:0b3ab51c8877 345 a low-power state until one of a number of events occurs.
bogdanm 84:0b3ab51c8877 346 */
bogdanm 84:0b3ab51c8877 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
bogdanm 84:0b3ab51c8877 348 {
bogdanm 84:0b3ab51c8877 349 __ASM volatile ("wfe");
bogdanm 84:0b3ab51c8877 350 }
bogdanm 84:0b3ab51c8877 351
bogdanm 84:0b3ab51c8877 352
bogdanm 84:0b3ab51c8877 353 /** \brief Send Event
bogdanm 84:0b3ab51c8877 354
bogdanm 84:0b3ab51c8877 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 84:0b3ab51c8877 356 */
bogdanm 84:0b3ab51c8877 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
bogdanm 84:0b3ab51c8877 358 {
bogdanm 84:0b3ab51c8877 359 __ASM volatile ("sev");
bogdanm 84:0b3ab51c8877 360 }
bogdanm 84:0b3ab51c8877 361
bogdanm 84:0b3ab51c8877 362
bogdanm 84:0b3ab51c8877 363 /** \brief Instruction Synchronization Barrier
bogdanm 84:0b3ab51c8877 364
bogdanm 84:0b3ab51c8877 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 84:0b3ab51c8877 366 so that all instructions following the ISB are fetched from cache or
bogdanm 84:0b3ab51c8877 367 memory, after the instruction has been completed.
bogdanm 84:0b3ab51c8877 368 */
bogdanm 84:0b3ab51c8877 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
bogdanm 84:0b3ab51c8877 370 {
bogdanm 84:0b3ab51c8877 371 __ASM volatile ("isb");
bogdanm 84:0b3ab51c8877 372 }
bogdanm 84:0b3ab51c8877 373
bogdanm 84:0b3ab51c8877 374
bogdanm 84:0b3ab51c8877 375 /** \brief Data Synchronization Barrier
bogdanm 84:0b3ab51c8877 376
bogdanm 84:0b3ab51c8877 377 This function acts as a special kind of Data Memory Barrier.
bogdanm 84:0b3ab51c8877 378 It completes when all explicit memory accesses before this instruction complete.
bogdanm 84:0b3ab51c8877 379 */
bogdanm 84:0b3ab51c8877 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
bogdanm 84:0b3ab51c8877 381 {
bogdanm 84:0b3ab51c8877 382 __ASM volatile ("dsb");
bogdanm 84:0b3ab51c8877 383 }
bogdanm 84:0b3ab51c8877 384
bogdanm 84:0b3ab51c8877 385
bogdanm 84:0b3ab51c8877 386 /** \brief Data Memory Barrier
bogdanm 84:0b3ab51c8877 387
bogdanm 84:0b3ab51c8877 388 This function ensures the apparent order of the explicit memory operations before
bogdanm 84:0b3ab51c8877 389 and after the instruction, without ensuring their completion.
bogdanm 84:0b3ab51c8877 390 */
bogdanm 84:0b3ab51c8877 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
bogdanm 84:0b3ab51c8877 392 {
bogdanm 84:0b3ab51c8877 393 __ASM volatile ("dmb");
bogdanm 84:0b3ab51c8877 394 }
bogdanm 84:0b3ab51c8877 395
bogdanm 84:0b3ab51c8877 396
bogdanm 84:0b3ab51c8877 397 /** \brief Reverse byte order (32 bit)
bogdanm 84:0b3ab51c8877 398
bogdanm 84:0b3ab51c8877 399 This function reverses the byte order in integer value.
bogdanm 84:0b3ab51c8877 400
bogdanm 84:0b3ab51c8877 401 \param [in] value Value to reverse
bogdanm 84:0b3ab51c8877 402 \return Reversed value
bogdanm 84:0b3ab51c8877 403 */
bogdanm 84:0b3ab51c8877 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 84:0b3ab51c8877 405 {
bogdanm 84:0b3ab51c8877 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 84:0b3ab51c8877 407 return __builtin_bswap32(value);
bogdanm 84:0b3ab51c8877 408 #else
bogdanm 84:0b3ab51c8877 409 uint32_t result;
bogdanm 84:0b3ab51c8877 410
bogdanm 84:0b3ab51c8877 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 84:0b3ab51c8877 412 return(result);
bogdanm 84:0b3ab51c8877 413 #endif
bogdanm 84:0b3ab51c8877 414 }
bogdanm 84:0b3ab51c8877 415
bogdanm 84:0b3ab51c8877 416
bogdanm 84:0b3ab51c8877 417 /** \brief Reverse byte order (16 bit)
bogdanm 84:0b3ab51c8877 418
bogdanm 84:0b3ab51c8877 419 This function reverses the byte order in two unsigned short values.
bogdanm 84:0b3ab51c8877 420
bogdanm 84:0b3ab51c8877 421 \param [in] value Value to reverse
bogdanm 84:0b3ab51c8877 422 \return Reversed value
bogdanm 84:0b3ab51c8877 423 */
bogdanm 84:0b3ab51c8877 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 84:0b3ab51c8877 425 {
bogdanm 84:0b3ab51c8877 426 uint32_t result;
bogdanm 84:0b3ab51c8877 427
bogdanm 84:0b3ab51c8877 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 84:0b3ab51c8877 429 return(result);
bogdanm 84:0b3ab51c8877 430 }
bogdanm 84:0b3ab51c8877 431
bogdanm 84:0b3ab51c8877 432
bogdanm 84:0b3ab51c8877 433 /** \brief Reverse byte order in signed short value
bogdanm 84:0b3ab51c8877 434
bogdanm 84:0b3ab51c8877 435 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 84:0b3ab51c8877 436
bogdanm 84:0b3ab51c8877 437 \param [in] value Value to reverse
bogdanm 84:0b3ab51c8877 438 \return Reversed value
bogdanm 84:0b3ab51c8877 439 */
bogdanm 84:0b3ab51c8877 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 84:0b3ab51c8877 441 {
bogdanm 84:0b3ab51c8877 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 84:0b3ab51c8877 443 return (short)__builtin_bswap16(value);
bogdanm 84:0b3ab51c8877 444 #else
bogdanm 84:0b3ab51c8877 445 uint32_t result;
bogdanm 84:0b3ab51c8877 446
bogdanm 84:0b3ab51c8877 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 84:0b3ab51c8877 448 return(result);
bogdanm 84:0b3ab51c8877 449 #endif
bogdanm 84:0b3ab51c8877 450 }
bogdanm 84:0b3ab51c8877 451
bogdanm 84:0b3ab51c8877 452
bogdanm 84:0b3ab51c8877 453 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 84:0b3ab51c8877 454
bogdanm 84:0b3ab51c8877 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 84:0b3ab51c8877 456
bogdanm 84:0b3ab51c8877 457 \param [in] value Value to rotate
bogdanm 84:0b3ab51c8877 458 \param [in] value Number of Bits to rotate
bogdanm 84:0b3ab51c8877 459 \return Rotated value
bogdanm 84:0b3ab51c8877 460 */
bogdanm 84:0b3ab51c8877 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 84:0b3ab51c8877 462 {
bogdanm 84:0b3ab51c8877 463 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 84:0b3ab51c8877 464 }
bogdanm 84:0b3ab51c8877 465
bogdanm 84:0b3ab51c8877 466
bogdanm 84:0b3ab51c8877 467 /** \brief Breakpoint
bogdanm 84:0b3ab51c8877 468
bogdanm 84:0b3ab51c8877 469 This function causes the processor to enter Debug state.
bogdanm 84:0b3ab51c8877 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 84:0b3ab51c8877 471
bogdanm 84:0b3ab51c8877 472 \param [in] value is ignored by the processor.
bogdanm 84:0b3ab51c8877 473 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 84:0b3ab51c8877 474 */
bogdanm 84:0b3ab51c8877 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 84:0b3ab51c8877 476
bogdanm 84:0b3ab51c8877 477
bogdanm 84:0b3ab51c8877 478 #if (__CORTEX_M >= 0x03)
bogdanm 84:0b3ab51c8877 479
bogdanm 84:0b3ab51c8877 480 /** \brief Reverse bit order of value
bogdanm 84:0b3ab51c8877 481
bogdanm 84:0b3ab51c8877 482 This function reverses the bit order of the given value.
bogdanm 84:0b3ab51c8877 483
bogdanm 84:0b3ab51c8877 484 \param [in] value Value to reverse
bogdanm 84:0b3ab51c8877 485 \return Reversed value
bogdanm 84:0b3ab51c8877 486 */
bogdanm 84:0b3ab51c8877 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 84:0b3ab51c8877 488 {
bogdanm 84:0b3ab51c8877 489 uint32_t result;
bogdanm 84:0b3ab51c8877 490
bogdanm 84:0b3ab51c8877 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
bogdanm 84:0b3ab51c8877 492 return(result);
bogdanm 84:0b3ab51c8877 493 }
bogdanm 84:0b3ab51c8877 494
bogdanm 84:0b3ab51c8877 495
bogdanm 84:0b3ab51c8877 496 /** \brief LDR Exclusive (8 bit)
bogdanm 84:0b3ab51c8877 497
bogdanm 84:0b3ab51c8877 498 This function performs a exclusive LDR command for 8 bit value.
bogdanm 84:0b3ab51c8877 499
bogdanm 84:0b3ab51c8877 500 \param [in] ptr Pointer to data
bogdanm 84:0b3ab51c8877 501 \return value of type uint8_t at (*ptr)
bogdanm 84:0b3ab51c8877 502 */
bogdanm 84:0b3ab51c8877 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 84:0b3ab51c8877 504 {
bogdanm 84:0b3ab51c8877 505 uint32_t result;
bogdanm 84:0b3ab51c8877 506
bogdanm 84:0b3ab51c8877 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 84:0b3ab51c8877 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 84:0b3ab51c8877 509 #else
bogdanm 84:0b3ab51c8877 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 84:0b3ab51c8877 511 accepted by assembler. So has to use following less efficient pattern.
bogdanm 84:0b3ab51c8877 512 */
bogdanm 84:0b3ab51c8877 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 84:0b3ab51c8877 514 #endif
bogdanm 84:0b3ab51c8877 515 return(result);
bogdanm 84:0b3ab51c8877 516 }
bogdanm 84:0b3ab51c8877 517
bogdanm 84:0b3ab51c8877 518
bogdanm 84:0b3ab51c8877 519 /** \brief LDR Exclusive (16 bit)
bogdanm 84:0b3ab51c8877 520
bogdanm 84:0b3ab51c8877 521 This function performs a exclusive LDR command for 16 bit values.
bogdanm 84:0b3ab51c8877 522
bogdanm 84:0b3ab51c8877 523 \param [in] ptr Pointer to data
bogdanm 84:0b3ab51c8877 524 \return value of type uint16_t at (*ptr)
bogdanm 84:0b3ab51c8877 525 */
bogdanm 84:0b3ab51c8877 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 84:0b3ab51c8877 527 {
bogdanm 84:0b3ab51c8877 528 uint32_t result;
bogdanm 84:0b3ab51c8877 529
bogdanm 84:0b3ab51c8877 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 84:0b3ab51c8877 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 84:0b3ab51c8877 532 #else
bogdanm 84:0b3ab51c8877 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 84:0b3ab51c8877 534 accepted by assembler. So has to use following less efficient pattern.
bogdanm 84:0b3ab51c8877 535 */
bogdanm 84:0b3ab51c8877 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 84:0b3ab51c8877 537 #endif
bogdanm 84:0b3ab51c8877 538 return(result);
bogdanm 84:0b3ab51c8877 539 }
bogdanm 84:0b3ab51c8877 540
bogdanm 84:0b3ab51c8877 541
bogdanm 84:0b3ab51c8877 542 /** \brief LDR Exclusive (32 bit)
bogdanm 84:0b3ab51c8877 543
bogdanm 84:0b3ab51c8877 544 This function performs a exclusive LDR command for 32 bit values.
bogdanm 84:0b3ab51c8877 545
bogdanm 84:0b3ab51c8877 546 \param [in] ptr Pointer to data
bogdanm 84:0b3ab51c8877 547 \return value of type uint32_t at (*ptr)
bogdanm 84:0b3ab51c8877 548 */
bogdanm 84:0b3ab51c8877 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 84:0b3ab51c8877 550 {
bogdanm 84:0b3ab51c8877 551 uint32_t result;
bogdanm 84:0b3ab51c8877 552
bogdanm 84:0b3ab51c8877 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 84:0b3ab51c8877 554 return(result);
bogdanm 84:0b3ab51c8877 555 }
bogdanm 84:0b3ab51c8877 556
bogdanm 84:0b3ab51c8877 557
bogdanm 84:0b3ab51c8877 558 /** \brief STR Exclusive (8 bit)
bogdanm 84:0b3ab51c8877 559
bogdanm 84:0b3ab51c8877 560 This function performs a exclusive STR command for 8 bit values.
bogdanm 84:0b3ab51c8877 561
bogdanm 84:0b3ab51c8877 562 \param [in] value Value to store
bogdanm 84:0b3ab51c8877 563 \param [in] ptr Pointer to location
bogdanm 84:0b3ab51c8877 564 \return 0 Function succeeded
bogdanm 84:0b3ab51c8877 565 \return 1 Function failed
bogdanm 84:0b3ab51c8877 566 */
bogdanm 84:0b3ab51c8877 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 84:0b3ab51c8877 568 {
bogdanm 84:0b3ab51c8877 569 uint32_t result;
bogdanm 84:0b3ab51c8877 570
bogdanm 84:0b3ab51c8877 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 84:0b3ab51c8877 572 return(result);
bogdanm 84:0b3ab51c8877 573 }
bogdanm 84:0b3ab51c8877 574
bogdanm 84:0b3ab51c8877 575
bogdanm 84:0b3ab51c8877 576 /** \brief STR Exclusive (16 bit)
bogdanm 84:0b3ab51c8877 577
bogdanm 84:0b3ab51c8877 578 This function performs a exclusive STR command for 16 bit values.
bogdanm 84:0b3ab51c8877 579
bogdanm 84:0b3ab51c8877 580 \param [in] value Value to store
bogdanm 84:0b3ab51c8877 581 \param [in] ptr Pointer to location
bogdanm 84:0b3ab51c8877 582 \return 0 Function succeeded
bogdanm 84:0b3ab51c8877 583 \return 1 Function failed
bogdanm 84:0b3ab51c8877 584 */
bogdanm 84:0b3ab51c8877 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 84:0b3ab51c8877 586 {
bogdanm 84:0b3ab51c8877 587 uint32_t result;
bogdanm 84:0b3ab51c8877 588
bogdanm 84:0b3ab51c8877 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 84:0b3ab51c8877 590 return(result);
bogdanm 84:0b3ab51c8877 591 }
bogdanm 84:0b3ab51c8877 592
bogdanm 84:0b3ab51c8877 593
bogdanm 84:0b3ab51c8877 594 /** \brief STR Exclusive (32 bit)
bogdanm 84:0b3ab51c8877 595
bogdanm 84:0b3ab51c8877 596 This function performs a exclusive STR command for 32 bit values.
bogdanm 84:0b3ab51c8877 597
bogdanm 84:0b3ab51c8877 598 \param [in] value Value to store
bogdanm 84:0b3ab51c8877 599 \param [in] ptr Pointer to location
bogdanm 84:0b3ab51c8877 600 \return 0 Function succeeded
bogdanm 84:0b3ab51c8877 601 \return 1 Function failed
bogdanm 84:0b3ab51c8877 602 */
bogdanm 84:0b3ab51c8877 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 84:0b3ab51c8877 604 {
bogdanm 84:0b3ab51c8877 605 uint32_t result;
bogdanm 84:0b3ab51c8877 606
bogdanm 84:0b3ab51c8877 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 84:0b3ab51c8877 608 return(result);
bogdanm 84:0b3ab51c8877 609 }
bogdanm 84:0b3ab51c8877 610
bogdanm 84:0b3ab51c8877 611
bogdanm 84:0b3ab51c8877 612 /** \brief Remove the exclusive lock
bogdanm 84:0b3ab51c8877 613
bogdanm 84:0b3ab51c8877 614 This function removes the exclusive lock which is created by LDREX.
bogdanm 84:0b3ab51c8877 615
bogdanm 84:0b3ab51c8877 616 */
bogdanm 84:0b3ab51c8877 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
bogdanm 84:0b3ab51c8877 618 {
bogdanm 84:0b3ab51c8877 619 __ASM volatile ("clrex" ::: "memory");
bogdanm 84:0b3ab51c8877 620 }
bogdanm 84:0b3ab51c8877 621
bogdanm 84:0b3ab51c8877 622
bogdanm 84:0b3ab51c8877 623 /** \brief Signed Saturate
bogdanm 84:0b3ab51c8877 624
bogdanm 84:0b3ab51c8877 625 This function saturates a signed value.
bogdanm 84:0b3ab51c8877 626
bogdanm 84:0b3ab51c8877 627 \param [in] value Value to be saturated
bogdanm 84:0b3ab51c8877 628 \param [in] sat Bit position to saturate to (1..32)
bogdanm 84:0b3ab51c8877 629 \return Saturated value
bogdanm 84:0b3ab51c8877 630 */
bogdanm 84:0b3ab51c8877 631 #define __SSAT(ARG1,ARG2) \
bogdanm 84:0b3ab51c8877 632 ({ \
bogdanm 84:0b3ab51c8877 633 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 84:0b3ab51c8877 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 84:0b3ab51c8877 635 __RES; \
bogdanm 84:0b3ab51c8877 636 })
bogdanm 84:0b3ab51c8877 637
bogdanm 84:0b3ab51c8877 638
bogdanm 84:0b3ab51c8877 639 /** \brief Unsigned Saturate
bogdanm 84:0b3ab51c8877 640
bogdanm 84:0b3ab51c8877 641 This function saturates an unsigned value.
bogdanm 84:0b3ab51c8877 642
bogdanm 84:0b3ab51c8877 643 \param [in] value Value to be saturated
bogdanm 84:0b3ab51c8877 644 \param [in] sat Bit position to saturate to (0..31)
bogdanm 84:0b3ab51c8877 645 \return Saturated value
bogdanm 84:0b3ab51c8877 646 */
bogdanm 84:0b3ab51c8877 647 #define __USAT(ARG1,ARG2) \
bogdanm 84:0b3ab51c8877 648 ({ \
bogdanm 84:0b3ab51c8877 649 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 84:0b3ab51c8877 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 84:0b3ab51c8877 651 __RES; \
bogdanm 84:0b3ab51c8877 652 })
bogdanm 84:0b3ab51c8877 653
bogdanm 84:0b3ab51c8877 654
bogdanm 84:0b3ab51c8877 655 /** \brief Count leading zeros
bogdanm 84:0b3ab51c8877 656
bogdanm 84:0b3ab51c8877 657 This function counts the number of leading zeros of a data value.
bogdanm 84:0b3ab51c8877 658
bogdanm 84:0b3ab51c8877 659 \param [in] value Value to count the leading zeros
bogdanm 84:0b3ab51c8877 660 \return number of leading zeros in value
bogdanm 84:0b3ab51c8877 661 */
bogdanm 84:0b3ab51c8877 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
bogdanm 84:0b3ab51c8877 663 {
bogdanm 84:0b3ab51c8877 664 uint32_t result;
bogdanm 84:0b3ab51c8877 665
bogdanm 84:0b3ab51c8877 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
bogdanm 84:0b3ab51c8877 667 return(result);
bogdanm 84:0b3ab51c8877 668 }
bogdanm 84:0b3ab51c8877 669
bogdanm 84:0b3ab51c8877 670 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 84:0b3ab51c8877 671
bogdanm 84:0b3ab51c8877 672
bogdanm 84:0b3ab51c8877 673
bogdanm 84:0b3ab51c8877 674
bogdanm 84:0b3ab51c8877 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 84:0b3ab51c8877 676 /* TASKING carm specific functions */
bogdanm 84:0b3ab51c8877 677
bogdanm 84:0b3ab51c8877 678 /*
bogdanm 84:0b3ab51c8877 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 84:0b3ab51c8877 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 84:0b3ab51c8877 681 * Including the CMSIS ones.
bogdanm 84:0b3ab51c8877 682 */
bogdanm 84:0b3ab51c8877 683
bogdanm 84:0b3ab51c8877 684 #endif
bogdanm 84:0b3ab51c8877 685
bogdanm 84:0b3ab51c8877 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 84:0b3ab51c8877 687
bogdanm 84:0b3ab51c8877 688 #endif /* __CORE_CMINSTR_H */