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TARGET_KL46Z/core_cmInstr.h@86:4f9a848d74c7, 2014-06-25 (annotated)

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
73:1efda918f0ba 
version_2.0

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bogdanm 73:1efda918f0ba 1 /**************************************************************************//**
bogdanm 73:1efda918f0ba 2 * @file core_cmInstr.h
bogdanm 73:1efda918f0ba 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
bogdanm 73:1efda918f0ba 4 * @version V3.20
bogdanm 73:1efda918f0ba 5 * @date 05. March 2013
bogdanm 73:1efda918f0ba 6 *
bogdanm 73:1efda918f0ba 7 * @note
bogdanm 73:1efda918f0ba 8 *
bogdanm 73:1efda918f0ba 9 ******************************************************************************/
bogdanm 73:1efda918f0ba 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 73:1efda918f0ba 11
bogdanm 73:1efda918f0ba 12 All rights reserved.
bogdanm 73:1efda918f0ba 13 Redistribution and use in source and binary forms, with or without
bogdanm 73:1efda918f0ba 14 modification, are permitted provided that the following conditions are met:
bogdanm 73:1efda918f0ba 15 - Redistributions of source code must retain the above copyright
bogdanm 73:1efda918f0ba 16 notice, this list of conditions and the following disclaimer.
bogdanm 73:1efda918f0ba 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 73:1efda918f0ba 18 notice, this list of conditions and the following disclaimer in the
bogdanm 73:1efda918f0ba 19 documentation and/or other materials provided with the distribution.
bogdanm 73:1efda918f0ba 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 73:1efda918f0ba 21 to endorse or promote products derived from this software without
bogdanm 73:1efda918f0ba 22 specific prior written permission.
bogdanm 73:1efda918f0ba 23 *
bogdanm 73:1efda918f0ba 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 73:1efda918f0ba 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 73:1efda918f0ba 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 73:1efda918f0ba 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 73:1efda918f0ba 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 73:1efda918f0ba 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 73:1efda918f0ba 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 73:1efda918f0ba 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 73:1efda918f0ba 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 73:1efda918f0ba 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 73:1efda918f0ba 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 73:1efda918f0ba 35 ---------------------------------------------------------------------------*/
bogdanm 73:1efda918f0ba 36
bogdanm 73:1efda918f0ba 37
bogdanm 73:1efda918f0ba 38 #ifndef __CORE_CMINSTR_H
bogdanm 73:1efda918f0ba 39 #define __CORE_CMINSTR_H
bogdanm 73:1efda918f0ba 40
bogdanm 73:1efda918f0ba 41
bogdanm 73:1efda918f0ba 42 /* ########################## Core Instruction Access ######################### */
bogdanm 73:1efda918f0ba 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 73:1efda918f0ba 44 Access to dedicated instructions
bogdanm 73:1efda918f0ba 45 @{
bogdanm 73:1efda918f0ba 46 */
bogdanm 73:1efda918f0ba 47
bogdanm 73:1efda918f0ba 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 73:1efda918f0ba 49 /* ARM armcc specific functions */
bogdanm 73:1efda918f0ba 50
bogdanm 73:1efda918f0ba 51 #if (__ARMCC_VERSION < 400677)
bogdanm 73:1efda918f0ba 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 73:1efda918f0ba 53 #endif
bogdanm 73:1efda918f0ba 54
bogdanm 73:1efda918f0ba 55
bogdanm 73:1efda918f0ba 56 /** \brief No Operation
bogdanm 73:1efda918f0ba 57
bogdanm 73:1efda918f0ba 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 73:1efda918f0ba 59 */
bogdanm 73:1efda918f0ba 60 #define __NOP __nop
bogdanm 73:1efda918f0ba 61
bogdanm 73:1efda918f0ba 62
bogdanm 73:1efda918f0ba 63 /** \brief Wait For Interrupt
bogdanm 73:1efda918f0ba 64
bogdanm 73:1efda918f0ba 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 73:1efda918f0ba 66 until one of a number of events occurs.
bogdanm 73:1efda918f0ba 67 */
bogdanm 73:1efda918f0ba 68 #define __WFI __wfi
bogdanm 73:1efda918f0ba 69
bogdanm 73:1efda918f0ba 70
bogdanm 73:1efda918f0ba 71 /** \brief Wait For Event
bogdanm 73:1efda918f0ba 72
bogdanm 73:1efda918f0ba 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 73:1efda918f0ba 74 a low-power state until one of a number of events occurs.
bogdanm 73:1efda918f0ba 75 */
bogdanm 73:1efda918f0ba 76 #define __WFE __wfe
bogdanm 73:1efda918f0ba 77
bogdanm 73:1efda918f0ba 78
bogdanm 73:1efda918f0ba 79 /** \brief Send Event
bogdanm 73:1efda918f0ba 80
bogdanm 73:1efda918f0ba 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 73:1efda918f0ba 82 */
bogdanm 73:1efda918f0ba 83 #define __SEV __sev
bogdanm 73:1efda918f0ba 84
bogdanm 73:1efda918f0ba 85
bogdanm 73:1efda918f0ba 86 /** \brief Instruction Synchronization Barrier
bogdanm 73:1efda918f0ba 87
bogdanm 73:1efda918f0ba 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 73:1efda918f0ba 89 so that all instructions following the ISB are fetched from cache or
bogdanm 73:1efda918f0ba 90 memory, after the instruction has been completed.
bogdanm 73:1efda918f0ba 91 */
bogdanm 73:1efda918f0ba 92 #define __ISB() __isb(0xF)
bogdanm 73:1efda918f0ba 93
bogdanm 73:1efda918f0ba 94
bogdanm 73:1efda918f0ba 95 /** \brief Data Synchronization Barrier
bogdanm 73:1efda918f0ba 96
bogdanm 73:1efda918f0ba 97 This function acts as a special kind of Data Memory Barrier.
bogdanm 73:1efda918f0ba 98 It completes when all explicit memory accesses before this instruction complete.
bogdanm 73:1efda918f0ba 99 */
bogdanm 73:1efda918f0ba 100 #define __DSB() __dsb(0xF)
bogdanm 73:1efda918f0ba 101
bogdanm 73:1efda918f0ba 102
bogdanm 73:1efda918f0ba 103 /** \brief Data Memory Barrier
bogdanm 73:1efda918f0ba 104
bogdanm 73:1efda918f0ba 105 This function ensures the apparent order of the explicit memory operations before
bogdanm 73:1efda918f0ba 106 and after the instruction, without ensuring their completion.
bogdanm 73:1efda918f0ba 107 */
bogdanm 73:1efda918f0ba 108 #define __DMB() __dmb(0xF)
bogdanm 73:1efda918f0ba 109
bogdanm 73:1efda918f0ba 110
bogdanm 73:1efda918f0ba 111 /** \brief Reverse byte order (32 bit)
bogdanm 73:1efda918f0ba 112
bogdanm 73:1efda918f0ba 113 This function reverses the byte order in integer value.
bogdanm 73:1efda918f0ba 114
bogdanm 73:1efda918f0ba 115 \param [in] value Value to reverse
bogdanm 73:1efda918f0ba 116 \return Reversed value
bogdanm 73:1efda918f0ba 117 */
bogdanm 73:1efda918f0ba 118 #define __REV __rev
bogdanm 73:1efda918f0ba 119
bogdanm 73:1efda918f0ba 120
bogdanm 73:1efda918f0ba 121 /** \brief Reverse byte order (16 bit)
bogdanm 73:1efda918f0ba 122
bogdanm 73:1efda918f0ba 123 This function reverses the byte order in two unsigned short values.
bogdanm 73:1efda918f0ba 124
bogdanm 73:1efda918f0ba 125 \param [in] value Value to reverse
bogdanm 73:1efda918f0ba 126 \return Reversed value
bogdanm 73:1efda918f0ba 127 */
bogdanm 73:1efda918f0ba 128 #ifndef __NO_EMBEDDED_ASM
bogdanm 73:1efda918f0ba 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 73:1efda918f0ba 130 {
bogdanm 73:1efda918f0ba 131 rev16 r0, r0
bogdanm 73:1efda918f0ba 132 bx lr
bogdanm 73:1efda918f0ba 133 }
bogdanm 73:1efda918f0ba 134 #endif
bogdanm 73:1efda918f0ba 135
bogdanm 73:1efda918f0ba 136 /** \brief Reverse byte order in signed short value
bogdanm 73:1efda918f0ba 137
bogdanm 73:1efda918f0ba 138 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 73:1efda918f0ba 139
bogdanm 73:1efda918f0ba 140 \param [in] value Value to reverse
bogdanm 73:1efda918f0ba 141 \return Reversed value
bogdanm 73:1efda918f0ba 142 */
bogdanm 73:1efda918f0ba 143 #ifndef __NO_EMBEDDED_ASM
bogdanm 73:1efda918f0ba 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 73:1efda918f0ba 145 {
bogdanm 73:1efda918f0ba 146 revsh r0, r0
bogdanm 73:1efda918f0ba 147 bx lr
bogdanm 73:1efda918f0ba 148 }
bogdanm 73:1efda918f0ba 149 #endif
bogdanm 73:1efda918f0ba 150
bogdanm 73:1efda918f0ba 151
bogdanm 73:1efda918f0ba 152 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 73:1efda918f0ba 153
bogdanm 73:1efda918f0ba 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 73:1efda918f0ba 155
bogdanm 73:1efda918f0ba 156 \param [in] value Value to rotate
bogdanm 73:1efda918f0ba 157 \param [in] value Number of Bits to rotate
bogdanm 73:1efda918f0ba 158 \return Rotated value
bogdanm 73:1efda918f0ba 159 */
bogdanm 73:1efda918f0ba 160 #define __ROR __ror
bogdanm 73:1efda918f0ba 161
bogdanm 73:1efda918f0ba 162
bogdanm 73:1efda918f0ba 163 /** \brief Breakpoint
bogdanm 73:1efda918f0ba 164
bogdanm 73:1efda918f0ba 165 This function causes the processor to enter Debug state.
bogdanm 73:1efda918f0ba 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 73:1efda918f0ba 167
bogdanm 73:1efda918f0ba 168 \param [in] value is ignored by the processor.
bogdanm 73:1efda918f0ba 169 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 73:1efda918f0ba 170 */
bogdanm 73:1efda918f0ba 171 #define __BKPT(value) __breakpoint(value)
bogdanm 73:1efda918f0ba 172
bogdanm 73:1efda918f0ba 173
bogdanm 73:1efda918f0ba 174 #if (__CORTEX_M >= 0x03)
bogdanm 73:1efda918f0ba 175
bogdanm 73:1efda918f0ba 176 /** \brief Reverse bit order of value
bogdanm 73:1efda918f0ba 177
bogdanm 73:1efda918f0ba 178 This function reverses the bit order of the given value.
bogdanm 73:1efda918f0ba 179
bogdanm 73:1efda918f0ba 180 \param [in] value Value to reverse
bogdanm 73:1efda918f0ba 181 \return Reversed value
bogdanm 73:1efda918f0ba 182 */
bogdanm 73:1efda918f0ba 183 #define __RBIT __rbit
bogdanm 73:1efda918f0ba 184
bogdanm 73:1efda918f0ba 185
bogdanm 73:1efda918f0ba 186 /** \brief LDR Exclusive (8 bit)
bogdanm 73:1efda918f0ba 187
bogdanm 73:1efda918f0ba 188 This function performs a exclusive LDR command for 8 bit value.
bogdanm 73:1efda918f0ba 189
bogdanm 73:1efda918f0ba 190 \param [in] ptr Pointer to data
bogdanm 73:1efda918f0ba 191 \return value of type uint8_t at (*ptr)
bogdanm 73:1efda918f0ba 192 */
bogdanm 73:1efda918f0ba 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 73:1efda918f0ba 194
bogdanm 73:1efda918f0ba 195
bogdanm 73:1efda918f0ba 196 /** \brief LDR Exclusive (16 bit)
bogdanm 73:1efda918f0ba 197
bogdanm 73:1efda918f0ba 198 This function performs a exclusive LDR command for 16 bit values.
bogdanm 73:1efda918f0ba 199
bogdanm 73:1efda918f0ba 200 \param [in] ptr Pointer to data
bogdanm 73:1efda918f0ba 201 \return value of type uint16_t at (*ptr)
bogdanm 73:1efda918f0ba 202 */
bogdanm 73:1efda918f0ba 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 73:1efda918f0ba 204
bogdanm 73:1efda918f0ba 205
bogdanm 73:1efda918f0ba 206 /** \brief LDR Exclusive (32 bit)
bogdanm 73:1efda918f0ba 207
bogdanm 73:1efda918f0ba 208 This function performs a exclusive LDR command for 32 bit values.
bogdanm 73:1efda918f0ba 209
bogdanm 73:1efda918f0ba 210 \param [in] ptr Pointer to data
bogdanm 73:1efda918f0ba 211 \return value of type uint32_t at (*ptr)
bogdanm 73:1efda918f0ba 212 */
bogdanm 73:1efda918f0ba 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 73:1efda918f0ba 214
bogdanm 73:1efda918f0ba 215
bogdanm 73:1efda918f0ba 216 /** \brief STR Exclusive (8 bit)
bogdanm 73:1efda918f0ba 217
bogdanm 73:1efda918f0ba 218 This function performs a exclusive STR command for 8 bit values.
bogdanm 73:1efda918f0ba 219
bogdanm 73:1efda918f0ba 220 \param [in] value Value to store
bogdanm 73:1efda918f0ba 221 \param [in] ptr Pointer to location
bogdanm 73:1efda918f0ba 222 \return 0 Function succeeded
bogdanm 73:1efda918f0ba 223 \return 1 Function failed
bogdanm 73:1efda918f0ba 224 */
bogdanm 73:1efda918f0ba 225 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 73:1efda918f0ba 226
bogdanm 73:1efda918f0ba 227
bogdanm 73:1efda918f0ba 228 /** \brief STR Exclusive (16 bit)
bogdanm 73:1efda918f0ba 229
bogdanm 73:1efda918f0ba 230 This function performs a exclusive STR command for 16 bit values.
bogdanm 73:1efda918f0ba 231
bogdanm 73:1efda918f0ba 232 \param [in] value Value to store
bogdanm 73:1efda918f0ba 233 \param [in] ptr Pointer to location
bogdanm 73:1efda918f0ba 234 \return 0 Function succeeded
bogdanm 73:1efda918f0ba 235 \return 1 Function failed
bogdanm 73:1efda918f0ba 236 */
bogdanm 73:1efda918f0ba 237 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 73:1efda918f0ba 238
bogdanm 73:1efda918f0ba 239
bogdanm 73:1efda918f0ba 240 /** \brief STR Exclusive (32 bit)
bogdanm 73:1efda918f0ba 241
bogdanm 73:1efda918f0ba 242 This function performs a exclusive STR command for 32 bit values.
bogdanm 73:1efda918f0ba 243
bogdanm 73:1efda918f0ba 244 \param [in] value Value to store
bogdanm 73:1efda918f0ba 245 \param [in] ptr Pointer to location
bogdanm 73:1efda918f0ba 246 \return 0 Function succeeded
bogdanm 73:1efda918f0ba 247 \return 1 Function failed
bogdanm 73:1efda918f0ba 248 */
bogdanm 73:1efda918f0ba 249 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 73:1efda918f0ba 250
bogdanm 73:1efda918f0ba 251
bogdanm 73:1efda918f0ba 252 /** \brief Remove the exclusive lock
bogdanm 73:1efda918f0ba 253
bogdanm 73:1efda918f0ba 254 This function removes the exclusive lock which is created by LDREX.
bogdanm 73:1efda918f0ba 255
bogdanm 73:1efda918f0ba 256 */
bogdanm 73:1efda918f0ba 257 #define __CLREX __clrex
bogdanm 73:1efda918f0ba 258
bogdanm 73:1efda918f0ba 259
bogdanm 73:1efda918f0ba 260 /** \brief Signed Saturate
bogdanm 73:1efda918f0ba 261
bogdanm 73:1efda918f0ba 262 This function saturates a signed value.
bogdanm 73:1efda918f0ba 263
bogdanm 73:1efda918f0ba 264 \param [in] value Value to be saturated
bogdanm 73:1efda918f0ba 265 \param [in] sat Bit position to saturate to (1..32)
bogdanm 73:1efda918f0ba 266 \return Saturated value
bogdanm 73:1efda918f0ba 267 */
bogdanm 73:1efda918f0ba 268 #define __SSAT __ssat
bogdanm 73:1efda918f0ba 269
bogdanm 73:1efda918f0ba 270
bogdanm 73:1efda918f0ba 271 /** \brief Unsigned Saturate
bogdanm 73:1efda918f0ba 272
bogdanm 73:1efda918f0ba 273 This function saturates an unsigned value.
bogdanm 73:1efda918f0ba 274
bogdanm 73:1efda918f0ba 275 \param [in] value Value to be saturated
bogdanm 73:1efda918f0ba 276 \param [in] sat Bit position to saturate to (0..31)
bogdanm 73:1efda918f0ba 277 \return Saturated value
bogdanm 73:1efda918f0ba 278 */
bogdanm 73:1efda918f0ba 279 #define __USAT __usat
bogdanm 73:1efda918f0ba 280
bogdanm 73:1efda918f0ba 281
bogdanm 73:1efda918f0ba 282 /** \brief Count leading zeros
bogdanm 73:1efda918f0ba 283
bogdanm 73:1efda918f0ba 284 This function counts the number of leading zeros of a data value.
bogdanm 73:1efda918f0ba 285
bogdanm 73:1efda918f0ba 286 \param [in] value Value to count the leading zeros
bogdanm 73:1efda918f0ba 287 \return number of leading zeros in value
bogdanm 73:1efda918f0ba 288 */
bogdanm 73:1efda918f0ba 289 #define __CLZ __clz
bogdanm 73:1efda918f0ba 290
bogdanm 73:1efda918f0ba 291 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 73:1efda918f0ba 292
bogdanm 73:1efda918f0ba 293
bogdanm 73:1efda918f0ba 294
bogdanm 73:1efda918f0ba 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 73:1efda918f0ba 296 /* IAR iccarm specific functions */
bogdanm 73:1efda918f0ba 297
bogdanm 73:1efda918f0ba 298 #include <cmsis_iar.h>
bogdanm 73:1efda918f0ba 299
bogdanm 73:1efda918f0ba 300
bogdanm 73:1efda918f0ba 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 73:1efda918f0ba 302 /* TI CCS specific functions */
bogdanm 73:1efda918f0ba 303
bogdanm 73:1efda918f0ba 304 #include <cmsis_ccs.h>
bogdanm 73:1efda918f0ba 305
bogdanm 73:1efda918f0ba 306
bogdanm 73:1efda918f0ba 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 73:1efda918f0ba 308 /* GNU gcc specific functions */
bogdanm 73:1efda918f0ba 309
bogdanm 73:1efda918f0ba 310 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 73:1efda918f0ba 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 73:1efda918f0ba 312 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 73:1efda918f0ba 313 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 73:1efda918f0ba 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 73:1efda918f0ba 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 73:1efda918f0ba 316 #else
bogdanm 73:1efda918f0ba 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 73:1efda918f0ba 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 73:1efda918f0ba 319 #endif
bogdanm 73:1efda918f0ba 320
bogdanm 73:1efda918f0ba 321 /** \brief No Operation
bogdanm 73:1efda918f0ba 322
bogdanm 73:1efda918f0ba 323 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 73:1efda918f0ba 324 */
bogdanm 73:1efda918f0ba 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
bogdanm 73:1efda918f0ba 326 {
bogdanm 73:1efda918f0ba 327 __ASM volatile ("nop");
bogdanm 73:1efda918f0ba 328 }
bogdanm 73:1efda918f0ba 329
bogdanm 73:1efda918f0ba 330
bogdanm 73:1efda918f0ba 331 /** \brief Wait For Interrupt
bogdanm 73:1efda918f0ba 332
bogdanm 73:1efda918f0ba 333 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 73:1efda918f0ba 334 until one of a number of events occurs.
bogdanm 73:1efda918f0ba 335 */
bogdanm 73:1efda918f0ba 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
bogdanm 73:1efda918f0ba 337 {
bogdanm 73:1efda918f0ba 338 __ASM volatile ("wfi");
bogdanm 73:1efda918f0ba 339 }
bogdanm 73:1efda918f0ba 340
bogdanm 73:1efda918f0ba 341
bogdanm 73:1efda918f0ba 342 /** \brief Wait For Event
bogdanm 73:1efda918f0ba 343
bogdanm 73:1efda918f0ba 344 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 73:1efda918f0ba 345 a low-power state until one of a number of events occurs.
bogdanm 73:1efda918f0ba 346 */
bogdanm 73:1efda918f0ba 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
bogdanm 73:1efda918f0ba 348 {
bogdanm 73:1efda918f0ba 349 __ASM volatile ("wfe");
bogdanm 73:1efda918f0ba 350 }
bogdanm 73:1efda918f0ba 351
bogdanm 73:1efda918f0ba 352
bogdanm 73:1efda918f0ba 353 /** \brief Send Event
bogdanm 73:1efda918f0ba 354
bogdanm 73:1efda918f0ba 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 73:1efda918f0ba 356 */
bogdanm 73:1efda918f0ba 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
bogdanm 73:1efda918f0ba 358 {
bogdanm 73:1efda918f0ba 359 __ASM volatile ("sev");
bogdanm 73:1efda918f0ba 360 }
bogdanm 73:1efda918f0ba 361
bogdanm 73:1efda918f0ba 362
bogdanm 73:1efda918f0ba 363 /** \brief Instruction Synchronization Barrier
bogdanm 73:1efda918f0ba 364
bogdanm 73:1efda918f0ba 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 73:1efda918f0ba 366 so that all instructions following the ISB are fetched from cache or
bogdanm 73:1efda918f0ba 367 memory, after the instruction has been completed.
bogdanm 73:1efda918f0ba 368 */
bogdanm 73:1efda918f0ba 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
bogdanm 73:1efda918f0ba 370 {
bogdanm 73:1efda918f0ba 371 __ASM volatile ("isb");
bogdanm 73:1efda918f0ba 372 }
bogdanm 73:1efda918f0ba 373
bogdanm 73:1efda918f0ba 374
bogdanm 73:1efda918f0ba 375 /** \brief Data Synchronization Barrier
bogdanm 73:1efda918f0ba 376
bogdanm 73:1efda918f0ba 377 This function acts as a special kind of Data Memory Barrier.
bogdanm 73:1efda918f0ba 378 It completes when all explicit memory accesses before this instruction complete.
bogdanm 73:1efda918f0ba 379 */
bogdanm 73:1efda918f0ba 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
bogdanm 73:1efda918f0ba 381 {
bogdanm 73:1efda918f0ba 382 __ASM volatile ("dsb");
bogdanm 73:1efda918f0ba 383 }
bogdanm 73:1efda918f0ba 384
bogdanm 73:1efda918f0ba 385
bogdanm 73:1efda918f0ba 386 /** \brief Data Memory Barrier
bogdanm 73:1efda918f0ba 387
bogdanm 73:1efda918f0ba 388 This function ensures the apparent order of the explicit memory operations before
bogdanm 73:1efda918f0ba 389 and after the instruction, without ensuring their completion.
bogdanm 73:1efda918f0ba 390 */
bogdanm 73:1efda918f0ba 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
bogdanm 73:1efda918f0ba 392 {
bogdanm 73:1efda918f0ba 393 __ASM volatile ("dmb");
bogdanm 73:1efda918f0ba 394 }
bogdanm 73:1efda918f0ba 395
bogdanm 73:1efda918f0ba 396
bogdanm 73:1efda918f0ba 397 /** \brief Reverse byte order (32 bit)
bogdanm 73:1efda918f0ba 398
bogdanm 73:1efda918f0ba 399 This function reverses the byte order in integer value.
bogdanm 73:1efda918f0ba 400
bogdanm 73:1efda918f0ba 401 \param [in] value Value to reverse
bogdanm 73:1efda918f0ba 402 \return Reversed value
bogdanm 73:1efda918f0ba 403 */
bogdanm 73:1efda918f0ba 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 73:1efda918f0ba 405 {
bogdanm 73:1efda918f0ba 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 73:1efda918f0ba 407 return __builtin_bswap32(value);
bogdanm 73:1efda918f0ba 408 #else
bogdanm 73:1efda918f0ba 409 uint32_t result;
bogdanm 73:1efda918f0ba 410
bogdanm 73:1efda918f0ba 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 73:1efda918f0ba 412 return(result);
bogdanm 73:1efda918f0ba 413 #endif
bogdanm 73:1efda918f0ba 414 }
bogdanm 73:1efda918f0ba 415
bogdanm 73:1efda918f0ba 416
bogdanm 73:1efda918f0ba 417 /** \brief Reverse byte order (16 bit)
bogdanm 73:1efda918f0ba 418
bogdanm 73:1efda918f0ba 419 This function reverses the byte order in two unsigned short values.
bogdanm 73:1efda918f0ba 420
bogdanm 73:1efda918f0ba 421 \param [in] value Value to reverse
bogdanm 73:1efda918f0ba 422 \return Reversed value
bogdanm 73:1efda918f0ba 423 */
bogdanm 73:1efda918f0ba 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 73:1efda918f0ba 425 {
bogdanm 73:1efda918f0ba 426 uint32_t result;
bogdanm 73:1efda918f0ba 427
bogdanm 73:1efda918f0ba 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 73:1efda918f0ba 429 return(result);
bogdanm 73:1efda918f0ba 430 }
bogdanm 73:1efda918f0ba 431
bogdanm 73:1efda918f0ba 432
bogdanm 73:1efda918f0ba 433 /** \brief Reverse byte order in signed short value
bogdanm 73:1efda918f0ba 434
bogdanm 73:1efda918f0ba 435 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 73:1efda918f0ba 436
bogdanm 73:1efda918f0ba 437 \param [in] value Value to reverse
bogdanm 73:1efda918f0ba 438 \return Reversed value
bogdanm 73:1efda918f0ba 439 */
bogdanm 73:1efda918f0ba 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 73:1efda918f0ba 441 {
bogdanm 73:1efda918f0ba 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 73:1efda918f0ba 443 return (short)__builtin_bswap16(value);
bogdanm 73:1efda918f0ba 444 #else
bogdanm 73:1efda918f0ba 445 uint32_t result;
bogdanm 73:1efda918f0ba 446
bogdanm 73:1efda918f0ba 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 73:1efda918f0ba 448 return(result);
bogdanm 73:1efda918f0ba 449 #endif
bogdanm 73:1efda918f0ba 450 }
bogdanm 73:1efda918f0ba 451
bogdanm 73:1efda918f0ba 452
bogdanm 73:1efda918f0ba 453 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 73:1efda918f0ba 454
bogdanm 73:1efda918f0ba 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 73:1efda918f0ba 456
bogdanm 73:1efda918f0ba 457 \param [in] value Value to rotate
bogdanm 73:1efda918f0ba 458 \param [in] value Number of Bits to rotate
bogdanm 73:1efda918f0ba 459 \return Rotated value
bogdanm 73:1efda918f0ba 460 */
bogdanm 73:1efda918f0ba 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 73:1efda918f0ba 462 {
bogdanm 73:1efda918f0ba 463 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 73:1efda918f0ba 464 }
bogdanm 73:1efda918f0ba 465
bogdanm 73:1efda918f0ba 466
bogdanm 73:1efda918f0ba 467 /** \brief Breakpoint
bogdanm 73:1efda918f0ba 468
bogdanm 73:1efda918f0ba 469 This function causes the processor to enter Debug state.
bogdanm 73:1efda918f0ba 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 73:1efda918f0ba 471
bogdanm 73:1efda918f0ba 472 \param [in] value is ignored by the processor.
bogdanm 73:1efda918f0ba 473 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 73:1efda918f0ba 474 */
bogdanm 73:1efda918f0ba 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 73:1efda918f0ba 476
bogdanm 73:1efda918f0ba 477
bogdanm 73:1efda918f0ba 478 #if (__CORTEX_M >= 0x03)
bogdanm 73:1efda918f0ba 479
bogdanm 73:1efda918f0ba 480 /** \brief Reverse bit order of value
bogdanm 73:1efda918f0ba 481
bogdanm 73:1efda918f0ba 482 This function reverses the bit order of the given value.
bogdanm 73:1efda918f0ba 483
bogdanm 73:1efda918f0ba 484 \param [in] value Value to reverse
bogdanm 73:1efda918f0ba 485 \return Reversed value
bogdanm 73:1efda918f0ba 486 */
bogdanm 73:1efda918f0ba 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 73:1efda918f0ba 488 {
bogdanm 73:1efda918f0ba 489 uint32_t result;
bogdanm 73:1efda918f0ba 490
bogdanm 73:1efda918f0ba 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
bogdanm 73:1efda918f0ba 492 return(result);
bogdanm 73:1efda918f0ba 493 }
bogdanm 73:1efda918f0ba 494
bogdanm 73:1efda918f0ba 495
bogdanm 73:1efda918f0ba 496 /** \brief LDR Exclusive (8 bit)
bogdanm 73:1efda918f0ba 497
bogdanm 73:1efda918f0ba 498 This function performs a exclusive LDR command for 8 bit value.
bogdanm 73:1efda918f0ba 499
bogdanm 73:1efda918f0ba 500 \param [in] ptr Pointer to data
bogdanm 73:1efda918f0ba 501 \return value of type uint8_t at (*ptr)
bogdanm 73:1efda918f0ba 502 */
bogdanm 73:1efda918f0ba 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 73:1efda918f0ba 504 {
bogdanm 73:1efda918f0ba 505 uint32_t result;
bogdanm 73:1efda918f0ba 506
bogdanm 73:1efda918f0ba 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 73:1efda918f0ba 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 73:1efda918f0ba 509 #else
bogdanm 73:1efda918f0ba 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 73:1efda918f0ba 511 accepted by assembler. So has to use following less efficient pattern.
bogdanm 73:1efda918f0ba 512 */
bogdanm 73:1efda918f0ba 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 73:1efda918f0ba 514 #endif
bogdanm 73:1efda918f0ba 515 return(result);
bogdanm 73:1efda918f0ba 516 }
bogdanm 73:1efda918f0ba 517
bogdanm 73:1efda918f0ba 518
bogdanm 73:1efda918f0ba 519 /** \brief LDR Exclusive (16 bit)
bogdanm 73:1efda918f0ba 520
bogdanm 73:1efda918f0ba 521 This function performs a exclusive LDR command for 16 bit values.
bogdanm 73:1efda918f0ba 522
bogdanm 73:1efda918f0ba 523 \param [in] ptr Pointer to data
bogdanm 73:1efda918f0ba 524 \return value of type uint16_t at (*ptr)
bogdanm 73:1efda918f0ba 525 */
bogdanm 73:1efda918f0ba 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 73:1efda918f0ba 527 {
bogdanm 73:1efda918f0ba 528 uint32_t result;
bogdanm 73:1efda918f0ba 529
bogdanm 73:1efda918f0ba 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 73:1efda918f0ba 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 73:1efda918f0ba 532 #else
bogdanm 73:1efda918f0ba 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 73:1efda918f0ba 534 accepted by assembler. So has to use following less efficient pattern.
bogdanm 73:1efda918f0ba 535 */
bogdanm 73:1efda918f0ba 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 73:1efda918f0ba 537 #endif
bogdanm 73:1efda918f0ba 538 return(result);
bogdanm 73:1efda918f0ba 539 }
bogdanm 73:1efda918f0ba 540
bogdanm 73:1efda918f0ba 541
bogdanm 73:1efda918f0ba 542 /** \brief LDR Exclusive (32 bit)
bogdanm 73:1efda918f0ba 543
bogdanm 73:1efda918f0ba 544 This function performs a exclusive LDR command for 32 bit values.
bogdanm 73:1efda918f0ba 545
bogdanm 73:1efda918f0ba 546 \param [in] ptr Pointer to data
bogdanm 73:1efda918f0ba 547 \return value of type uint32_t at (*ptr)
bogdanm 73:1efda918f0ba 548 */
bogdanm 73:1efda918f0ba 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 73:1efda918f0ba 550 {
bogdanm 73:1efda918f0ba 551 uint32_t result;
bogdanm 73:1efda918f0ba 552
bogdanm 73:1efda918f0ba 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 73:1efda918f0ba 554 return(result);
bogdanm 73:1efda918f0ba 555 }
bogdanm 73:1efda918f0ba 556
bogdanm 73:1efda918f0ba 557
bogdanm 73:1efda918f0ba 558 /** \brief STR Exclusive (8 bit)
bogdanm 73:1efda918f0ba 559
bogdanm 73:1efda918f0ba 560 This function performs a exclusive STR command for 8 bit values.
bogdanm 73:1efda918f0ba 561
bogdanm 73:1efda918f0ba 562 \param [in] value Value to store
bogdanm 73:1efda918f0ba 563 \param [in] ptr Pointer to location
bogdanm 73:1efda918f0ba 564 \return 0 Function succeeded
bogdanm 73:1efda918f0ba 565 \return 1 Function failed
bogdanm 73:1efda918f0ba 566 */
bogdanm 73:1efda918f0ba 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 73:1efda918f0ba 568 {
bogdanm 73:1efda918f0ba 569 uint32_t result;
bogdanm 73:1efda918f0ba 570
bogdanm 73:1efda918f0ba 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 73:1efda918f0ba 572 return(result);
bogdanm 73:1efda918f0ba 573 }
bogdanm 73:1efda918f0ba 574
bogdanm 73:1efda918f0ba 575
bogdanm 73:1efda918f0ba 576 /** \brief STR Exclusive (16 bit)
bogdanm 73:1efda918f0ba 577
bogdanm 73:1efda918f0ba 578 This function performs a exclusive STR command for 16 bit values.
bogdanm 73:1efda918f0ba 579
bogdanm 73:1efda918f0ba 580 \param [in] value Value to store
bogdanm 73:1efda918f0ba 581 \param [in] ptr Pointer to location
bogdanm 73:1efda918f0ba 582 \return 0 Function succeeded
bogdanm 73:1efda918f0ba 583 \return 1 Function failed
bogdanm 73:1efda918f0ba 584 */
bogdanm 73:1efda918f0ba 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 73:1efda918f0ba 586 {
bogdanm 73:1efda918f0ba 587 uint32_t result;
bogdanm 73:1efda918f0ba 588
bogdanm 73:1efda918f0ba 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 73:1efda918f0ba 590 return(result);
bogdanm 73:1efda918f0ba 591 }
bogdanm 73:1efda918f0ba 592
bogdanm 73:1efda918f0ba 593
bogdanm 73:1efda918f0ba 594 /** \brief STR Exclusive (32 bit)
bogdanm 73:1efda918f0ba 595
bogdanm 73:1efda918f0ba 596 This function performs a exclusive STR command for 32 bit values.
bogdanm 73:1efda918f0ba 597
bogdanm 73:1efda918f0ba 598 \param [in] value Value to store
bogdanm 73:1efda918f0ba 599 \param [in] ptr Pointer to location
bogdanm 73:1efda918f0ba 600 \return 0 Function succeeded
bogdanm 73:1efda918f0ba 601 \return 1 Function failed
bogdanm 73:1efda918f0ba 602 */
bogdanm 73:1efda918f0ba 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 73:1efda918f0ba 604 {
bogdanm 73:1efda918f0ba 605 uint32_t result;
bogdanm 73:1efda918f0ba 606
bogdanm 73:1efda918f0ba 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 73:1efda918f0ba 608 return(result);
bogdanm 73:1efda918f0ba 609 }
bogdanm 73:1efda918f0ba 610
bogdanm 73:1efda918f0ba 611
bogdanm 73:1efda918f0ba 612 /** \brief Remove the exclusive lock
bogdanm 73:1efda918f0ba 613
bogdanm 73:1efda918f0ba 614 This function removes the exclusive lock which is created by LDREX.
bogdanm 73:1efda918f0ba 615
bogdanm 73:1efda918f0ba 616 */
bogdanm 73:1efda918f0ba 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
bogdanm 73:1efda918f0ba 618 {
bogdanm 73:1efda918f0ba 619 __ASM volatile ("clrex" ::: "memory");
bogdanm 73:1efda918f0ba 620 }
bogdanm 73:1efda918f0ba 621
bogdanm 73:1efda918f0ba 622
bogdanm 73:1efda918f0ba 623 /** \brief Signed Saturate
bogdanm 73:1efda918f0ba 624
bogdanm 73:1efda918f0ba 625 This function saturates a signed value.
bogdanm 73:1efda918f0ba 626
bogdanm 73:1efda918f0ba 627 \param [in] value Value to be saturated
bogdanm 73:1efda918f0ba 628 \param [in] sat Bit position to saturate to (1..32)
bogdanm 73:1efda918f0ba 629 \return Saturated value
bogdanm 73:1efda918f0ba 630 */
bogdanm 73:1efda918f0ba 631 #define __SSAT(ARG1,ARG2) \
bogdanm 73:1efda918f0ba 632 ({ \
bogdanm 73:1efda918f0ba 633 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 73:1efda918f0ba 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 73:1efda918f0ba 635 __RES; \
bogdanm 73:1efda918f0ba 636 })
bogdanm 73:1efda918f0ba 637
bogdanm 73:1efda918f0ba 638
bogdanm 73:1efda918f0ba 639 /** \brief Unsigned Saturate
bogdanm 73:1efda918f0ba 640
bogdanm 73:1efda918f0ba 641 This function saturates an unsigned value.
bogdanm 73:1efda918f0ba 642
bogdanm 73:1efda918f0ba 643 \param [in] value Value to be saturated
bogdanm 73:1efda918f0ba 644 \param [in] sat Bit position to saturate to (0..31)
bogdanm 73:1efda918f0ba 645 \return Saturated value
bogdanm 73:1efda918f0ba 646 */
bogdanm 73:1efda918f0ba 647 #define __USAT(ARG1,ARG2) \
bogdanm 73:1efda918f0ba 648 ({ \
bogdanm 73:1efda918f0ba 649 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 73:1efda918f0ba 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 73:1efda918f0ba 651 __RES; \
bogdanm 73:1efda918f0ba 652 })
bogdanm 73:1efda918f0ba 653
bogdanm 73:1efda918f0ba 654
bogdanm 73:1efda918f0ba 655 /** \brief Count leading zeros
bogdanm 73:1efda918f0ba 656
bogdanm 73:1efda918f0ba 657 This function counts the number of leading zeros of a data value.
bogdanm 73:1efda918f0ba 658
bogdanm 73:1efda918f0ba 659 \param [in] value Value to count the leading zeros
bogdanm 73:1efda918f0ba 660 \return number of leading zeros in value
bogdanm 73:1efda918f0ba 661 */
bogdanm 73:1efda918f0ba 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
bogdanm 73:1efda918f0ba 663 {
bogdanm 73:1efda918f0ba 664 uint32_t result;
bogdanm 73:1efda918f0ba 665
bogdanm 73:1efda918f0ba 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
bogdanm 73:1efda918f0ba 667 return(result);
bogdanm 73:1efda918f0ba 668 }
bogdanm 73:1efda918f0ba 669
bogdanm 73:1efda918f0ba 670 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 73:1efda918f0ba 671
bogdanm 73:1efda918f0ba 672
bogdanm 73:1efda918f0ba 673
bogdanm 73:1efda918f0ba 674
bogdanm 73:1efda918f0ba 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 73:1efda918f0ba 676 /* TASKING carm specific functions */
bogdanm 73:1efda918f0ba 677
bogdanm 73:1efda918f0ba 678 /*
bogdanm 73:1efda918f0ba 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 73:1efda918f0ba 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 73:1efda918f0ba 681 * Including the CMSIS ones.
bogdanm 73:1efda918f0ba 682 */
bogdanm 73:1efda918f0ba 683
bogdanm 73:1efda918f0ba 684 #endif
bogdanm 73:1efda918f0ba 685
bogdanm 73:1efda918f0ba 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 73:1efda918f0ba 687
bogdanm 73:1efda918f0ba 688 #endif /* __CORE_CMINSTR_H */