Eric Pena / Mbed OS EVAL-AD7768-1

AD7768-1 MBED IIO Application Example

Dependencies:   platform_drivers

app/app_config_mbed.h@2:eb624ef78449, 2021-09-24 (annotated)

Committer:
epena
Date:
Fri Sep 24 19:07:29 2021 +0800
Revision:
2:eb624ef78449
Parent:
1:c0429edee15b 
Deleting the redefinition of data_capture_ops

Who changed what in which revision?

UserRevisionLine numberNew contents of line
epena 1:c0429edee15b 1 /***************************************************************************//*
epena 1:c0429edee15b 2 * @file app_config_mbed.h
epena 1:c0429edee15b 3 * @brief Header file for Mbed platform configurations
epena 1:c0429edee15b 4 ******************************************************************************
epena 1:c0429edee15b 5 * Copyright (c) 2021 Analog Devices, Inc.
epena 1:c0429edee15b 6 * All rights reserved.
epena 1:c0429edee15b 7 *
epena 1:c0429edee15b 8 * This software is proprietary to Analog Devices, Inc. and its licensors.
epena 1:c0429edee15b 9 * By using this software you agree to the terms of the associated
epena 1:c0429edee15b 10 * Analog Devices Software License Agreement.
epena 1:c0429edee15b 11 ******************************************************************************/
epena 1:c0429edee15b 12
epena 1:c0429edee15b 13 #ifndef _APP_CONFIG_MBED_H_
epena 1:c0429edee15b 14 #define _APP_CONFIG_MBED_H_
epena 1:c0429edee15b 15
epena 1:c0429edee15b 16 /******************************************************************************/
epena 1:c0429edee15b 17 /***************************** Include Files **********************************/
epena 1:c0429edee15b 18 /******************************************************************************/
epena 1:c0429edee15b 19
epena 1:c0429edee15b 20 #include <stdint.h>
epena 1:c0429edee15b 21 #include <PinNames.h>
epena 1:c0429edee15b 22
epena 1:c0429edee15b 23 #include "uart_extra.h"
epena 1:c0429edee15b 24 #include "irq_extra.h"
epena 1:c0429edee15b 25 #include "spi_extra.h"
epena 1:c0429edee15b 26
epena 1:c0429edee15b 27 /******************************************************************************/
epena 1:c0429edee15b 28 /********************** Macros and Constants Definition ***********************/
epena 1:c0429edee15b 29 /******************************************************************************/
epena 1:c0429edee15b 30
epena 1:c0429edee15b 31 // Pin mapping of AD7768-1 with arduino
epena 1:c0429edee15b 32 #define SPI_SS D10 // SPI_CS
epena 1:c0429edee15b 33 #define SPI_MOSI D11 // SPI_MOSI
epena 1:c0429edee15b 34 #define SPI_MISO D12 // SPI_MISO
epena 1:c0429edee15b 35 #define SPI_SCK D13 // SPI_SCK
epena 1:c0429edee15b 36 #define DRDY D2 // Conversion ready interrupt
epena 1:c0429edee15b 37
epena 1:c0429edee15b 38 /* Common pin mapping */
epena 1:c0429edee15b 39 #define UART_TX USBTX
epena 1:c0429edee15b 40 #define UART_RX USBRX
epena 1:c0429edee15b 41 #define LED_GREEN LED3
epena 1:c0429edee15b 42
epena 1:c0429edee15b 43 /* Define the max possible sampling frequency (or output data) rate for AD77681 (in SPS).
epena 1:c0429edee15b 44 * This is also used to find the time period to trigger a periodic conversion event.
epena 1:c0429edee15b 45 * Note: Max possible ODR is 64KSPS for continuous data capture on IIO Client.
epena 1:c0429edee15b 46 * This is derived by capturing data from the firmware using the SDP-K1 controller board
epena 1:c0429edee15b 47 * @22.5Mhz SPI clock. The max possible ODR can vary from board to board and
epena 1:c0429edee15b 48 * data continuity is not guaranteed above this ODR on IIO oscilloscope */
epena 1:c0429edee15b 49
epena 1:c0429edee15b 50 /* AD77681 default internal clock frequency (MCLK = 16.384 Mhz) */
epena 1:c0429edee15b 51 #define AD77681_MCLK (16384)
epena 1:c0429edee15b 52
epena 1:c0429edee15b 53 /* AD77681 decimation rate */
epena 1:c0429edee15b 54 #define AD77681_DECIMATION_RATE (32U)
epena 1:c0429edee15b 55
epena 1:c0429edee15b 56 /* AD77681 default mclk_div value */
epena 1:c0429edee15b 57 #define AD77681_DEFAULT_MCLK_DIV (8)
epena 1:c0429edee15b 58
epena 1:c0429edee15b 59 /* AD77681 ODR conversion */
epena 1:c0429edee15b 60 #define AD77681_ODR_CONV_SCALER (AD77681_DECIMATION_RATE * AD77681_DEFAULT_MCLK_DIV)
epena 1:c0429edee15b 61
epena 1:c0429edee15b 62 /* AD77681 default sampling frequency */
epena 1:c0429edee15b 63 #define AD77681_DEFAULT_SAMPLING_FREQ ((AD77681_MCLK * 1000) / AD77681_ODR_CONV_SCALER)
epena 1:c0429edee15b 64
epena 1:c0429edee15b 65 /******************************************************************************/
epena 1:c0429edee15b 66 /********************* Public/Extern Declarations *****************************/
epena 1:c0429edee15b 67 /******************************************************************************/
epena 1:c0429edee15b 68 extern mbed_irq_init_param mbed_ext_int_init_param;
epena 1:c0429edee15b 69 extern mbed_uart_init_param mbed_uart_extra_init_param;
epena 1:c0429edee15b 70 extern mbed_spi_init_param mbed_spi_init_extra_params;
epena 1:c0429edee15b 71
epena 1:c0429edee15b 72 #endif /* _APP_CONFIG_H_ */