Emilio Monti / mbed-KL25Z

mbed libraries for KL25Z

Dependents:   FRDM_RGBLED

SPISlave.h@8:c14af7958ef5, 2012-11-09 (annotated)

Committer:
emilmont
Date:
Fri Nov 09 11:33:53 2012 +0000
Revision:
8:c14af7958ef5
Parent:
2:e9a661555b58
Child:
9:663789d7729f
SPI driver; ADC driver; DAC driver; microlib support; general bugfixing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 2:e9a661555b58 1 /* mbed Microcontroller Library - SPISlave
emilmont 8:c14af7958ef5 2 * Copyright (c) 2010-2011 ARM Limited. All rights reserved.
emilmont 2:e9a661555b58 3 */
emilmont 2:e9a661555b58 4 #ifndef MBED_SPISLAVE_H
emilmont 2:e9a661555b58 5 #define MBED_SPISLAVE_H
emilmont 2:e9a661555b58 6
emilmont 8:c14af7958ef5 7 #include "platform.h"
emilmont 2:e9a661555b58 8
emilmont 2:e9a661555b58 9 #if DEVICE_SPISLAVE
emilmont 2:e9a661555b58 10
emilmont 2:e9a661555b58 11 namespace mbed {
emilmont 2:e9a661555b58 12
emilmont 8:c14af7958ef5 13 /** A SPI slave, used for communicating with a SPI Master device
emilmont 2:e9a661555b58 14 *
emilmont 2:e9a661555b58 15 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
emilmont 2:e9a661555b58 16 *
emilmont 2:e9a661555b58 17 * Example:
emilmont 8:c14af7958ef5 18 * @code
emilmont 8:c14af7958ef5 19 * // Reply to a SPI master as slave
emilmont 8:c14af7958ef5 20 *
emilmont 8:c14af7958ef5 21 * #include "mbed.h"
emilmont 8:c14af7958ef5 22 *
emilmont 8:c14af7958ef5 23 * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
emilmont 8:c14af7958ef5 24 *
emilmont 8:c14af7958ef5 25 * int main() {
emilmont 8:c14af7958ef5 26 * device.reply(0x00); // Prime SPI with first reply
emilmont 8:c14af7958ef5 27 * while(1) {
emilmont 8:c14af7958ef5 28 * if(device.receive()) {
emilmont 8:c14af7958ef5 29 * int v = device.read(); // Read byte from master
emilmont 8:c14af7958ef5 30 * v = (v + 1) % 0x100; // Add one to it, modulo 256
emilmont 8:c14af7958ef5 31 * device.reply(v); // Make this the next reply
emilmont 8:c14af7958ef5 32 * }
emilmont 8:c14af7958ef5 33 * }
emilmont 8:c14af7958ef5 34 * }
emilmont 8:c14af7958ef5 35 * @endcode
emilmont 2:e9a661555b58 36 */
emilmont 8:c14af7958ef5 37 class SPISlave {
emilmont 2:e9a661555b58 38
emilmont 2:e9a661555b58 39 public:
emilmont 2:e9a661555b58 40
emilmont 8:c14af7958ef5 41 /** Create a SPI slave connected to the specified pins
emilmont 2:e9a661555b58 42 *
emilmont 2:e9a661555b58 43 * Pin Options:
emilmont 2:e9a661555b58 44 * (5, 6, 7i, 8) or (11, 12, 13, 14)
emilmont 2:e9a661555b58 45 *
emilmont 2:e9a661555b58 46 * mosi or miso can be specfied as NC if not used
emilmont 8:c14af7958ef5 47 *
emilmont 8:c14af7958ef5 48 * @param mosi SPI Master Out, Slave In pin
emilmont 8:c14af7958ef5 49 * @param miso SPI Master In, Slave Out pin
emilmont 8:c14af7958ef5 50 * @param sclk SPI Clock pin
emilmont 8:c14af7958ef5 51 * @param ssel SPI chip select pin
emilmont 8:c14af7958ef5 52 * @param name (optional) A string to identify the object
emilmont 2:e9a661555b58 53 */
emilmont 8:c14af7958ef5 54 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
emilmont 2:e9a661555b58 55
emilmont 8:c14af7958ef5 56 /** Configure the data transmission format
emilmont 2:e9a661555b58 57 *
emilmont 8:c14af7958ef5 58 * @param bits Number of bits per SPI frame (4 - 16)
emilmont 8:c14af7958ef5 59 * @param mode Clock polarity and phase mode (0 - 3)
emilmont 2:e9a661555b58 60 *
emilmont 8:c14af7958ef5 61 * @code
emilmont 8:c14af7958ef5 62 * mode | POL PHA
emilmont 8:c14af7958ef5 63 * -----+--------
emilmont 8:c14af7958ef5 64 * 0 | 0 0
emilmont 8:c14af7958ef5 65 * 1 | 0 1
emilmont 8:c14af7958ef5 66 * 2 | 1 0
emilmont 8:c14af7958ef5 67 * 3 | 1 1
emilmont 8:c14af7958ef5 68 * @endcode
emilmont 2:e9a661555b58 69 */
emilmont 2:e9a661555b58 70 void format(int bits, int mode = 0);
emilmont 2:e9a661555b58 71
emilmont 8:c14af7958ef5 72 /** Set the spi bus clock frequency
emilmont 2:e9a661555b58 73 *
emilmont 8:c14af7958ef5 74 * @param hz SCLK frequency in hz (default = 1MHz)
emilmont 2:e9a661555b58 75 */
emilmont 2:e9a661555b58 76 void frequency(int hz = 1000000);
emilmont 2:e9a661555b58 77
emilmont 8:c14af7958ef5 78 /** Polls the SPI to see if data has been received
emilmont 2:e9a661555b58 79 *
emilmont 8:c14af7958ef5 80 * @returns
emilmont 8:c14af7958ef5 81 * 0 if no data,
emilmont 8:c14af7958ef5 82 * 1 otherwise
emilmont 2:e9a661555b58 83 */
emilmont 2:e9a661555b58 84 int receive(void);
emilmont 2:e9a661555b58 85
emilmont 8:c14af7958ef5 86 /** Retrieve data from receive buffer as slave
emilmont 2:e9a661555b58 87 *
emilmont 8:c14af7958ef5 88 * @returns
emilmont 8:c14af7958ef5 89 * the data in the receive buffer
emilmont 2:e9a661555b58 90 */
emilmont 2:e9a661555b58 91 int read(void);
emilmont 2:e9a661555b58 92
emilmont 8:c14af7958ef5 93 /** Fill the transmission buffer with the value to be written out
emilmont 2:e9a661555b58 94 * as slave on the next received message from the master.
emilmont 2:e9a661555b58 95 *
emilmont 8:c14af7958ef5 96 * @param value the data to be transmitted next
emilmont 2:e9a661555b58 97 */
emilmont 2:e9a661555b58 98 void reply(int value);
emilmont 2:e9a661555b58 99
emilmont 2:e9a661555b58 100 protected:
emilmont 2:e9a661555b58 101 SPIName _spi;
emilmont 2:e9a661555b58 102
emilmont 2:e9a661555b58 103 int _bits;
emilmont 2:e9a661555b58 104 int _mode;
emilmont 2:e9a661555b58 105 int _hz;
emilmont 2:e9a661555b58 106 };
emilmont 2:e9a661555b58 107
emilmont 2:e9a661555b58 108 } // namespace mbed
emilmont 2:e9a661555b58 109
emilmont 2:e9a661555b58 110 #endif
emilmont 2:e9a661555b58 111
emilmont 2:e9a661555b58 112 #endif