mbed libraries for KL25Z

Dependents:   FRDM_RGBLED

Committer:
emilmont
Date:
Fri Nov 09 11:33:53 2012 +0000
Revision:
8:c14af7958ef5
Parent:
2:e9a661555b58
Child:
9:663789d7729f
SPI driver; ADC driver; DAC driver; microlib support; general bugfixing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 2:e9a661555b58 1 /* mbed Microcontroller Library - SPI
emilmont 8:c14af7958ef5 2 * Copyright (c) 2010-2011 ARM Limited. All rights reserved.
emilmont 2:e9a661555b58 3 */
emilmont 2:e9a661555b58 4 #ifndef MBED_SPI_H
emilmont 2:e9a661555b58 5 #define MBED_SPI_H
emilmont 2:e9a661555b58 6
emilmont 8:c14af7958ef5 7 #include "platform.h"
emilmont 2:e9a661555b58 8
emilmont 2:e9a661555b58 9 #if DEVICE_SPI
emilmont 2:e9a661555b58 10
emilmont 2:e9a661555b58 11 namespace mbed {
emilmont 2:e9a661555b58 12
emilmont 8:c14af7958ef5 13 /** A SPI Master, used for communicating with SPI slave devices
emilmont 2:e9a661555b58 14 *
emilmont 2:e9a661555b58 15 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
emilmont 2:e9a661555b58 16 *
emilmont 2:e9a661555b58 17 * Most SPI devices will also require Chip Select and Reset signals. These
emilmont 2:e9a661555b58 18 * can be controlled using <DigitalOut> pins
emilmont 2:e9a661555b58 19 *
emilmont 2:e9a661555b58 20 * Example:
emilmont 8:c14af7958ef5 21 * @code
emilmont 8:c14af7958ef5 22 * // Send a byte to a SPI slave, and record the response
emilmont 8:c14af7958ef5 23 *
emilmont 8:c14af7958ef5 24 * #include "mbed.h"
emilmont 8:c14af7958ef5 25 *
emilmont 8:c14af7958ef5 26 * SPI device(p5, p6, p7); // mosi, miso, sclk
emilmont 8:c14af7958ef5 27 *
emilmont 8:c14af7958ef5 28 * int main() {
emilmont 8:c14af7958ef5 29 * int response = device.write(0xFF);
emilmont 8:c14af7958ef5 30 * }
emilmont 8:c14af7958ef5 31 * @endcode
emilmont 2:e9a661555b58 32 */
emilmont 8:c14af7958ef5 33 class SPI {
emilmont 2:e9a661555b58 34
emilmont 2:e9a661555b58 35 public:
emilmont 2:e9a661555b58 36
emilmont 8:c14af7958ef5 37 /** Create a SPI master connected to the specified pins
emilmont 2:e9a661555b58 38 *
emilmont 2:e9a661555b58 39 * Pin Options:
emilmont 2:e9a661555b58 40 * (5, 6, 7) or (11, 12, 13)
emilmont 2:e9a661555b58 41 *
emilmont 2:e9a661555b58 42 * mosi or miso can be specfied as NC if not used
emilmont 8:c14af7958ef5 43 *
emilmont 8:c14af7958ef5 44 * @param mosi SPI Master Out, Slave In pin
emilmont 8:c14af7958ef5 45 * @param miso SPI Master In, Slave Out pin
emilmont 8:c14af7958ef5 46 * @param sclk SPI Clock pin
emilmont 2:e9a661555b58 47 */
emilmont 8:c14af7958ef5 48 SPI(PinName mosi, PinName miso, PinName sclk);
emilmont 2:e9a661555b58 49
emilmont 8:c14af7958ef5 50 /** Configure the data transmission format
emilmont 2:e9a661555b58 51 *
emilmont 8:c14af7958ef5 52 * @param bits Number of bits per SPI frame (4 - 16)
emilmont 8:c14af7958ef5 53 * @param mode Clock polarity and phase mode (0 - 3)
emilmont 2:e9a661555b58 54 *
emilmont 8:c14af7958ef5 55 * @code
emilmont 8:c14af7958ef5 56 * mode | POL PHA
emilmont 8:c14af7958ef5 57 * -----+--------
emilmont 8:c14af7958ef5 58 * 0 | 0 0
emilmont 8:c14af7958ef5 59 * 1 | 0 1
emilmont 8:c14af7958ef5 60 * 2 | 1 0
emilmont 8:c14af7958ef5 61 * 3 | 1 1
emilmont 8:c14af7958ef5 62 * @endcode
emilmont 2:e9a661555b58 63 */
emilmont 2:e9a661555b58 64 void format(int bits, int mode = 0);
emilmont 2:e9a661555b58 65
emilmont 8:c14af7958ef5 66 /** Set the spi bus clock frequency
emilmont 2:e9a661555b58 67 *
emilmont 8:c14af7958ef5 68 * @param hz SCLK frequency in hz (default = 1MHz)
emilmont 2:e9a661555b58 69 */
emilmont 2:e9a661555b58 70 void frequency(int hz = 1000000);
emilmont 2:e9a661555b58 71
emilmont 8:c14af7958ef5 72 /** Write to the SPI Slave and return the response
emilmont 2:e9a661555b58 73 *
emilmont 8:c14af7958ef5 74 * @param value Data to be sent to the SPI slave
emilmont 8:c14af7958ef5 75 *
emilmont 8:c14af7958ef5 76 * @returns
emilmont 8:c14af7958ef5 77 * Response from the SPI slave
emilmont 2:e9a661555b58 78 */
emilmont 2:e9a661555b58 79 virtual int write(int value);
emilmont 2:e9a661555b58 80
emilmont 2:e9a661555b58 81 protected:
emilmont 2:e9a661555b58 82 SPIName _spi;
emilmont 2:e9a661555b58 83
emilmont 2:e9a661555b58 84 void aquire(void);
emilmont 8:c14af7958ef5 85 static SPI *_owner;
emilmont 2:e9a661555b58 86 int _bits;
emilmont 2:e9a661555b58 87 int _mode;
emilmont 2:e9a661555b58 88 int _hz;
emilmont 2:e9a661555b58 89 };
emilmont 2:e9a661555b58 90
emilmont 2:e9a661555b58 91 } // namespace mbed
emilmont 2:e9a661555b58 92
emilmont 2:e9a661555b58 93 #endif
emilmont 2:e9a661555b58 94
emilmont 2:e9a661555b58 95 #endif