V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_min_q31.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Minimum value of a Q31 vector.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * ---------------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupStats
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47
emh203 0:3d9c67d97d6f 48 /**
emh203 0:3d9c67d97d6f 49 * @addtogroup Min
emh203 0:3d9c67d97d6f 50 * @{
emh203 0:3d9c67d97d6f 51 */
emh203 0:3d9c67d97d6f 52
emh203 0:3d9c67d97d6f 53
emh203 0:3d9c67d97d6f 54 /**
emh203 0:3d9c67d97d6f 55 * @brief Minimum value of a Q31 vector.
emh203 0:3d9c67d97d6f 56 * @param[in] *pSrc points to the input vector
emh203 0:3d9c67d97d6f 57 * @param[in] blockSize length of the input vector
emh203 0:3d9c67d97d6f 58 * @param[out] *pResult minimum value returned here
emh203 0:3d9c67d97d6f 59 * @param[out] *pIndex index of minimum value returned here
emh203 0:3d9c67d97d6f 60 * @return none.
emh203 0:3d9c67d97d6f 61 *
emh203 0:3d9c67d97d6f 62 */
emh203 0:3d9c67d97d6f 63
emh203 0:3d9c67d97d6f 64 void arm_min_q31(
emh203 0:3d9c67d97d6f 65 q31_t * pSrc,
emh203 0:3d9c67d97d6f 66 uint32_t blockSize,
emh203 0:3d9c67d97d6f 67 q31_t * pResult,
emh203 0:3d9c67d97d6f 68 uint32_t * pIndex)
emh203 0:3d9c67d97d6f 69 {
emh203 0:3d9c67d97d6f 70 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 71
emh203 0:3d9c67d97d6f 72 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 73 q31_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
emh203 0:3d9c67d97d6f 74 uint32_t blkCnt, outIndex, count; /* loop counter */
emh203 0:3d9c67d97d6f 75
emh203 0:3d9c67d97d6f 76 /* Initialise the count value. */
emh203 0:3d9c67d97d6f 77 count = 0u;
emh203 0:3d9c67d97d6f 78 /* Initialise the index value to zero. */
emh203 0:3d9c67d97d6f 79 outIndex = 0u;
emh203 0:3d9c67d97d6f 80 /* Load first input value that act as reference value for comparision */
emh203 0:3d9c67d97d6f 81 out = *pSrc++;
emh203 0:3d9c67d97d6f 82
emh203 0:3d9c67d97d6f 83
emh203 0:3d9c67d97d6f 84 /* Loop unrolling */
emh203 0:3d9c67d97d6f 85 blkCnt = (blockSize - 1u) >> 2u;
emh203 0:3d9c67d97d6f 86
emh203 0:3d9c67d97d6f 87 while(blkCnt > 0)
emh203 0:3d9c67d97d6f 88 {
emh203 0:3d9c67d97d6f 89 /* Initialize minVal to the next consecutive values one by one */
emh203 0:3d9c67d97d6f 90 minVal1 = *pSrc++;
emh203 0:3d9c67d97d6f 91 minVal2 = *pSrc++;
emh203 0:3d9c67d97d6f 92
emh203 0:3d9c67d97d6f 93 /* compare for the minimum value */
emh203 0:3d9c67d97d6f 94 if(out > minVal1)
emh203 0:3d9c67d97d6f 95 {
emh203 0:3d9c67d97d6f 96 /* Update the minimum value and its index */
emh203 0:3d9c67d97d6f 97 out = minVal1;
emh203 0:3d9c67d97d6f 98 outIndex = count + 1u;
emh203 0:3d9c67d97d6f 99 }
emh203 0:3d9c67d97d6f 100
emh203 0:3d9c67d97d6f 101 minVal1 = *pSrc++;
emh203 0:3d9c67d97d6f 102
emh203 0:3d9c67d97d6f 103 /* compare for the minimum value */
emh203 0:3d9c67d97d6f 104 if(out > minVal2)
emh203 0:3d9c67d97d6f 105 {
emh203 0:3d9c67d97d6f 106 /* Update the minimum value and its index */
emh203 0:3d9c67d97d6f 107 out = minVal2;
emh203 0:3d9c67d97d6f 108 outIndex = count + 2u;
emh203 0:3d9c67d97d6f 109 }
emh203 0:3d9c67d97d6f 110
emh203 0:3d9c67d97d6f 111 minVal2 = *pSrc++;
emh203 0:3d9c67d97d6f 112
emh203 0:3d9c67d97d6f 113 /* compare for the minimum value */
emh203 0:3d9c67d97d6f 114 if(out > minVal1)
emh203 0:3d9c67d97d6f 115 {
emh203 0:3d9c67d97d6f 116 /* Update the minimum value and its index */
emh203 0:3d9c67d97d6f 117 out = minVal1;
emh203 0:3d9c67d97d6f 118 outIndex = count + 3u;
emh203 0:3d9c67d97d6f 119 }
emh203 0:3d9c67d97d6f 120
emh203 0:3d9c67d97d6f 121 /* compare for the minimum value */
emh203 0:3d9c67d97d6f 122 if(out > minVal2)
emh203 0:3d9c67d97d6f 123 {
emh203 0:3d9c67d97d6f 124 /* Update the minimum value and its index */
emh203 0:3d9c67d97d6f 125 out = minVal2;
emh203 0:3d9c67d97d6f 126 outIndex = count + 4u;
emh203 0:3d9c67d97d6f 127 }
emh203 0:3d9c67d97d6f 128
emh203 0:3d9c67d97d6f 129 count += 4u;
emh203 0:3d9c67d97d6f 130
emh203 0:3d9c67d97d6f 131 blkCnt--;
emh203 0:3d9c67d97d6f 132 }
emh203 0:3d9c67d97d6f 133
emh203 0:3d9c67d97d6f 134 /* if (blockSize - 1u ) is not multiple of 4 */
emh203 0:3d9c67d97d6f 135 blkCnt = (blockSize - 1u) % 4u;
emh203 0:3d9c67d97d6f 136
emh203 0:3d9c67d97d6f 137 #else
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 140 q31_t minVal1, out; /* Temporary variables to store the output value. */
emh203 0:3d9c67d97d6f 141 uint32_t blkCnt, outIndex; /* loop counter */
emh203 0:3d9c67d97d6f 142
emh203 0:3d9c67d97d6f 143 blkCnt = (blockSize - 1u);
emh203 0:3d9c67d97d6f 144
emh203 0:3d9c67d97d6f 145 /* Initialise the index value to zero. */
emh203 0:3d9c67d97d6f 146 outIndex = 0u;
emh203 0:3d9c67d97d6f 147 /* Load first input value that act as reference value for comparision */
emh203 0:3d9c67d97d6f 148 out = *pSrc++;
emh203 0:3d9c67d97d6f 149
emh203 0:3d9c67d97d6f 150 #endif // #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 151
emh203 0:3d9c67d97d6f 152 while(blkCnt > 0)
emh203 0:3d9c67d97d6f 153 {
emh203 0:3d9c67d97d6f 154 /* Initialize minVal to the next consecutive values one by one */
emh203 0:3d9c67d97d6f 155 minVal1 = *pSrc++;
emh203 0:3d9c67d97d6f 156
emh203 0:3d9c67d97d6f 157 /* compare for the minimum value */
emh203 0:3d9c67d97d6f 158 if(out > minVal1)
emh203 0:3d9c67d97d6f 159 {
emh203 0:3d9c67d97d6f 160 /* Update the minimum value and it's index */
emh203 0:3d9c67d97d6f 161 out = minVal1;
emh203 0:3d9c67d97d6f 162 outIndex = blockSize - blkCnt;
emh203 0:3d9c67d97d6f 163 }
emh203 0:3d9c67d97d6f 164
emh203 0:3d9c67d97d6f 165 blkCnt--;
emh203 0:3d9c67d97d6f 166
emh203 0:3d9c67d97d6f 167 }
emh203 0:3d9c67d97d6f 168
emh203 0:3d9c67d97d6f 169 /* Store the minimum value and its index into destination pointers */
emh203 0:3d9c67d97d6f 170 *pResult = out;
emh203 0:3d9c67d97d6f 171 *pIndex = outIndex;
emh203 0:3d9c67d97d6f 172 }
emh203 0:3d9c67d97d6f 173
emh203 0:3d9c67d97d6f 174 /**
emh203 0:3d9c67d97d6f 175 * @} end of Min group
emh203 0:3d9c67d97d6f 176 */