Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

MatrixFunctions/arm_mat_trans_q15.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_mat_trans_q15.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q15 matrix transpose.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMatrix
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup MatrixTrans
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /*
emh203 0:3d9c67d97d6f 53 * @brief Q15 matrix transpose.
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrc points to the input matrix
emh203 0:3d9c67d97d6f 55 * @param[out] *pDst points to the output matrix
emh203 0:3d9c67d97d6f 56 * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
emh203 0:3d9c67d97d6f 57 * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emh203 0:3d9c67d97d6f 58 */
emh203 0:3d9c67d97d6f 59
emh203 0:3d9c67d97d6f 60 arm_status arm_mat_trans_q15(
emh203 0:3d9c67d97d6f 61 const arm_matrix_instance_q15 * pSrc,
emh203 0:3d9c67d97d6f 62 arm_matrix_instance_q15 * pDst)
emh203 0:3d9c67d97d6f 63 {
emh203 0:3d9c67d97d6f 64 q15_t *pSrcA = pSrc->pData; /* input data matrix pointer */
emh203 0:3d9c67d97d6f 65 q15_t *pOut = pDst->pData; /* output data matrix pointer */
emh203 0:3d9c67d97d6f 66 uint16_t nRows = pSrc->numRows; /* number of nRows */
emh203 0:3d9c67d97d6f 67 uint16_t nColumns = pSrc->numCols; /* number of nColumns */
emh203 0:3d9c67d97d6f 68 uint16_t col, row = nRows, i = 0u; /* row and column loop counters */
emh203 0:3d9c67d97d6f 69 arm_status status; /* status of matrix transpose */
emh203 0:3d9c67d97d6f 70
emh203 0:3d9c67d97d6f 71 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 72
emh203 0:3d9c67d97d6f 73 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 74 #ifndef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 75
emh203 0:3d9c67d97d6f 76 q31_t in; /* variable to hold temporary output */
emh203 0:3d9c67d97d6f 77
emh203 0:3d9c67d97d6f 78 #else
emh203 0:3d9c67d97d6f 79
emh203 0:3d9c67d97d6f 80 q15_t in;
emh203 0:3d9c67d97d6f 81
emh203 0:3d9c67d97d6f 82 #endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
emh203 0:3d9c67d97d6f 83
emh203 0:3d9c67d97d6f 84 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 85
emh203 0:3d9c67d97d6f 86
emh203 0:3d9c67d97d6f 87 /* Check for matrix mismatch condition */
emh203 0:3d9c67d97d6f 88 if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
emh203 0:3d9c67d97d6f 89 {
emh203 0:3d9c67d97d6f 90 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 91 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 92 }
emh203 0:3d9c67d97d6f 93 else
emh203 0:3d9c67d97d6f 94 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emh203 0:3d9c67d97d6f 95
emh203 0:3d9c67d97d6f 96 {
emh203 0:3d9c67d97d6f 97 /* Matrix transpose by exchanging the rows with columns */
emh203 0:3d9c67d97d6f 98 /* row loop */
emh203 0:3d9c67d97d6f 99 do
emh203 0:3d9c67d97d6f 100 {
emh203 0:3d9c67d97d6f 101
emh203 0:3d9c67d97d6f 102 /* Apply loop unrolling and exchange the columns with row elements */
emh203 0:3d9c67d97d6f 103 col = nColumns >> 2u;
emh203 0:3d9c67d97d6f 104
emh203 0:3d9c67d97d6f 105 /* The pointer pOut is set to starting address of the column being processed */
emh203 0:3d9c67d97d6f 106 pOut = pDst->pData + i;
emh203 0:3d9c67d97d6f 107
emh203 0:3d9c67d97d6f 108 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 109 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 110 while(col > 0u)
emh203 0:3d9c67d97d6f 111 {
emh203 0:3d9c67d97d6f 112 #ifndef UNALIGNED_SUPPORT_DISABLE
emh203 0:3d9c67d97d6f 113
emh203 0:3d9c67d97d6f 114 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 115 in = *__SIMD32(pSrcA)++;
emh203 0:3d9c67d97d6f 116
emh203 0:3d9c67d97d6f 117 /* Unpack and store one element in the destination */
emh203 0:3d9c67d97d6f 118 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 119
emh203 0:3d9c67d97d6f 120 *pOut = (q15_t) in;
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 #else
emh203 0:3d9c67d97d6f 123
emh203 0:3d9c67d97d6f 124 *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 127
emh203 0:3d9c67d97d6f 128 /* Update the pointer pOut to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 129 pOut += nRows;
emh203 0:3d9c67d97d6f 130
emh203 0:3d9c67d97d6f 131 /* Unpack and store the second element in the destination */
emh203 0:3d9c67d97d6f 132
emh203 0:3d9c67d97d6f 133 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135 *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
emh203 0:3d9c67d97d6f 136
emh203 0:3d9c67d97d6f 137 #else
emh203 0:3d9c67d97d6f 138
emh203 0:3d9c67d97d6f 139 *pOut = (q15_t) in;
emh203 0:3d9c67d97d6f 140
emh203 0:3d9c67d97d6f 141 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 142
emh203 0:3d9c67d97d6f 143 /* Update the pointer pOut to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 144 pOut += nRows;
emh203 0:3d9c67d97d6f 145
emh203 0:3d9c67d97d6f 146 /* Read two elements from the row */
emh203 0:3d9c67d97d6f 147 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 148
emh203 0:3d9c67d97d6f 149 in = *__SIMD32(pSrcA)++;
emh203 0:3d9c67d97d6f 150
emh203 0:3d9c67d97d6f 151 #else
emh203 0:3d9c67d97d6f 152
emh203 0:3d9c67d97d6f 153 in = *__SIMD32(pSrcA)++;
emh203 0:3d9c67d97d6f 154
emh203 0:3d9c67d97d6f 155 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 156
emh203 0:3d9c67d97d6f 157 /* Unpack and store one element in the destination */
emh203 0:3d9c67d97d6f 158 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 159
emh203 0:3d9c67d97d6f 160 *pOut = (q15_t) in;
emh203 0:3d9c67d97d6f 161
emh203 0:3d9c67d97d6f 162 #else
emh203 0:3d9c67d97d6f 163
emh203 0:3d9c67d97d6f 164 *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
emh203 0:3d9c67d97d6f 165
emh203 0:3d9c67d97d6f 166 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 167
emh203 0:3d9c67d97d6f 168 /* Update the pointer pOut to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 169 pOut += nRows;
emh203 0:3d9c67d97d6f 170
emh203 0:3d9c67d97d6f 171 /* Unpack and store the second element in the destination */
emh203 0:3d9c67d97d6f 172 #ifndef ARM_MATH_BIG_ENDIAN
emh203 0:3d9c67d97d6f 173
emh203 0:3d9c67d97d6f 174 *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
emh203 0:3d9c67d97d6f 175
emh203 0:3d9c67d97d6f 176 #else
emh203 0:3d9c67d97d6f 177
emh203 0:3d9c67d97d6f 178 *pOut = (q15_t) in;
emh203 0:3d9c67d97d6f 179
emh203 0:3d9c67d97d6f 180 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
emh203 0:3d9c67d97d6f 181
emh203 0:3d9c67d97d6f 182 #else
emh203 0:3d9c67d97d6f 183 /* Read one element from the row */
emh203 0:3d9c67d97d6f 184 in = *pSrcA++;
emh203 0:3d9c67d97d6f 185
emh203 0:3d9c67d97d6f 186 /* Store one element in the destination */
emh203 0:3d9c67d97d6f 187 *pOut = in;
emh203 0:3d9c67d97d6f 188
emh203 0:3d9c67d97d6f 189 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 190 pOut += nRows;
emh203 0:3d9c67d97d6f 191
emh203 0:3d9c67d97d6f 192 /* Read one element from the row */
emh203 0:3d9c67d97d6f 193 in = *pSrcA++;
emh203 0:3d9c67d97d6f 194
emh203 0:3d9c67d97d6f 195 /* Store one element in the destination */
emh203 0:3d9c67d97d6f 196 *pOut = in;
emh203 0:3d9c67d97d6f 197
emh203 0:3d9c67d97d6f 198 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 199 pOut += nRows;
emh203 0:3d9c67d97d6f 200
emh203 0:3d9c67d97d6f 201 /* Read one element from the row */
emh203 0:3d9c67d97d6f 202 in = *pSrcA++;
emh203 0:3d9c67d97d6f 203
emh203 0:3d9c67d97d6f 204 /* Store one element in the destination */
emh203 0:3d9c67d97d6f 205 *pOut = in;
emh203 0:3d9c67d97d6f 206
emh203 0:3d9c67d97d6f 207 /* Update the pointer px to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 208 pOut += nRows;
emh203 0:3d9c67d97d6f 209
emh203 0:3d9c67d97d6f 210 /* Read one element from the row */
emh203 0:3d9c67d97d6f 211 in = *pSrcA++;
emh203 0:3d9c67d97d6f 212
emh203 0:3d9c67d97d6f 213 /* Store one element in the destination */
emh203 0:3d9c67d97d6f 214 *pOut = in;
emh203 0:3d9c67d97d6f 215
emh203 0:3d9c67d97d6f 216 #endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
emh203 0:3d9c67d97d6f 217
emh203 0:3d9c67d97d6f 218 /* Update the pointer pOut to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 219 pOut += nRows;
emh203 0:3d9c67d97d6f 220
emh203 0:3d9c67d97d6f 221 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 222 col--;
emh203 0:3d9c67d97d6f 223 }
emh203 0:3d9c67d97d6f 224
emh203 0:3d9c67d97d6f 225 /* Perform matrix transpose for last 3 samples here. */
emh203 0:3d9c67d97d6f 226 col = nColumns % 0x4u;
emh203 0:3d9c67d97d6f 227
emh203 0:3d9c67d97d6f 228 #else
emh203 0:3d9c67d97d6f 229
emh203 0:3d9c67d97d6f 230 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 231
emh203 0:3d9c67d97d6f 232 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 233
emh203 0:3d9c67d97d6f 234 /* Check for matrix mismatch condition */
emh203 0:3d9c67d97d6f 235 if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
emh203 0:3d9c67d97d6f 236 {
emh203 0:3d9c67d97d6f 237 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 238 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 239 }
emh203 0:3d9c67d97d6f 240 else
emh203 0:3d9c67d97d6f 241 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emh203 0:3d9c67d97d6f 242
emh203 0:3d9c67d97d6f 243 {
emh203 0:3d9c67d97d6f 244 /* Matrix transpose by exchanging the rows with columns */
emh203 0:3d9c67d97d6f 245 /* row loop */
emh203 0:3d9c67d97d6f 246 do
emh203 0:3d9c67d97d6f 247 {
emh203 0:3d9c67d97d6f 248 /* The pointer pOut is set to starting address of the column being processed */
emh203 0:3d9c67d97d6f 249 pOut = pDst->pData + i;
emh203 0:3d9c67d97d6f 250
emh203 0:3d9c67d97d6f 251 /* Initialize column loop counter */
emh203 0:3d9c67d97d6f 252 col = nColumns;
emh203 0:3d9c67d97d6f 253
emh203 0:3d9c67d97d6f 254 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 255
emh203 0:3d9c67d97d6f 256 while(col > 0u)
emh203 0:3d9c67d97d6f 257 {
emh203 0:3d9c67d97d6f 258 /* Read and store the input element in the destination */
emh203 0:3d9c67d97d6f 259 *pOut = *pSrcA++;
emh203 0:3d9c67d97d6f 260
emh203 0:3d9c67d97d6f 261 /* Update the pointer pOut to point to the next row of the transposed matrix */
emh203 0:3d9c67d97d6f 262 pOut += nRows;
emh203 0:3d9c67d97d6f 263
emh203 0:3d9c67d97d6f 264 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 265 col--;
emh203 0:3d9c67d97d6f 266 }
emh203 0:3d9c67d97d6f 267
emh203 0:3d9c67d97d6f 268 i++;
emh203 0:3d9c67d97d6f 269
emh203 0:3d9c67d97d6f 270 /* Decrement the row loop counter */
emh203 0:3d9c67d97d6f 271 row--;
emh203 0:3d9c67d97d6f 272
emh203 0:3d9c67d97d6f 273 } while(row > 0u);
emh203 0:3d9c67d97d6f 274
emh203 0:3d9c67d97d6f 275 /* set status as ARM_MATH_SUCCESS */
emh203 0:3d9c67d97d6f 276 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 277 }
emh203 0:3d9c67d97d6f 278 /* Return to application */
emh203 0:3d9c67d97d6f 279 return (status);
emh203 0:3d9c67d97d6f 280 }
emh203 0:3d9c67d97d6f 281
emh203 0:3d9c67d97d6f 282 /**
emh203 0:3d9c67d97d6f 283 * @} end of MatrixTrans group
emh203 0:3d9c67d97d6f 284 */