Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

MatrixFunctions/arm_mat_cmplx_mult_f32.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_mat_cmplx_mult_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Floating-point matrix multiplication.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40 #include "arm_math.h"
emh203 0:3d9c67d97d6f 41
emh203 0:3d9c67d97d6f 42 /**
emh203 0:3d9c67d97d6f 43 * @ingroup groupMatrix
emh203 0:3d9c67d97d6f 44 */
emh203 0:3d9c67d97d6f 45
emh203 0:3d9c67d97d6f 46 /**
emh203 0:3d9c67d97d6f 47 * @defgroup CmplxMatrixMult Complex Matrix Multiplication
emh203 0:3d9c67d97d6f 48 *
emh203 0:3d9c67d97d6f 49 * Complex Matrix multiplication is only defined if the number of columns of the
emh203 0:3d9c67d97d6f 50 * first matrix equals the number of rows of the second matrix.
emh203 0:3d9c67d97d6f 51 * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
emh203 0:3d9c67d97d6f 52 * in an <code>M x P</code> matrix.
emh203 0:3d9c67d97d6f 53 * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
emh203 0:3d9c67d97d6f 54 * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
emh203 0:3d9c67d97d6f 55 * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
emh203 0:3d9c67d97d6f 56 */
emh203 0:3d9c67d97d6f 57
emh203 0:3d9c67d97d6f 58
emh203 0:3d9c67d97d6f 59 /**
emh203 0:3d9c67d97d6f 60 * @addtogroup CmplxMatrixMult
emh203 0:3d9c67d97d6f 61 * @{
emh203 0:3d9c67d97d6f 62 */
emh203 0:3d9c67d97d6f 63
emh203 0:3d9c67d97d6f 64 /**
emh203 0:3d9c67d97d6f 65 * @brief Floating-point Complex matrix multiplication.
emh203 0:3d9c67d97d6f 66 * @param[in] *pSrcA points to the first input complex matrix structure
emh203 0:3d9c67d97d6f 67 * @param[in] *pSrcB points to the second input complex matrix structure
emh203 0:3d9c67d97d6f 68 * @param[out] *pDst points to output complex matrix structure
emh203 0:3d9c67d97d6f 69 * @return The function returns either
emh203 0:3d9c67d97d6f 70 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emh203 0:3d9c67d97d6f 71 */
emh203 0:3d9c67d97d6f 72
emh203 0:3d9c67d97d6f 73 arm_status arm_mat_cmplx_mult_f32(
emh203 0:3d9c67d97d6f 74 const arm_matrix_instance_f32 * pSrcA,
emh203 0:3d9c67d97d6f 75 const arm_matrix_instance_f32 * pSrcB,
emh203 0:3d9c67d97d6f 76 arm_matrix_instance_f32 * pDst)
emh203 0:3d9c67d97d6f 77 {
emh203 0:3d9c67d97d6f 78 float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
emh203 0:3d9c67d97d6f 79 float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
emh203 0:3d9c67d97d6f 80 float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emh203 0:3d9c67d97d6f 81 float32_t *pOut = pDst->pData; /* output data matrix pointer */
emh203 0:3d9c67d97d6f 82 float32_t *px; /* Temporary output data matrix pointer */
emh203 0:3d9c67d97d6f 83 uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
emh203 0:3d9c67d97d6f 84 uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
emh203 0:3d9c67d97d6f 85 uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
emh203 0:3d9c67d97d6f 86 float32_t sumReal1, sumImag1; /* accumulator */
emh203 0:3d9c67d97d6f 87 float32_t a0, b0, c0, d0;
emh203 0:3d9c67d97d6f 88 float32_t a1, b1, c1, d1;
emh203 0:3d9c67d97d6f 89 float32_t sumReal2, sumImag2; /* accumulator */
emh203 0:3d9c67d97d6f 90
emh203 0:3d9c67d97d6f 91
emh203 0:3d9c67d97d6f 92 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 93
emh203 0:3d9c67d97d6f 94 uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
emh203 0:3d9c67d97d6f 95 arm_status status; /* status of matrix multiplication */
emh203 0:3d9c67d97d6f 96
emh203 0:3d9c67d97d6f 97 #ifdef ARM_MATH_MATRIX_CHECK
emh203 0:3d9c67d97d6f 98
emh203 0:3d9c67d97d6f 99
emh203 0:3d9c67d97d6f 100 /* Check for matrix mismatch condition */
emh203 0:3d9c67d97d6f 101 if((pSrcA->numCols != pSrcB->numRows) ||
emh203 0:3d9c67d97d6f 102 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emh203 0:3d9c67d97d6f 103 {
emh203 0:3d9c67d97d6f 104
emh203 0:3d9c67d97d6f 105 /* Set status as ARM_MATH_SIZE_MISMATCH */
emh203 0:3d9c67d97d6f 106 status = ARM_MATH_SIZE_MISMATCH;
emh203 0:3d9c67d97d6f 107 }
emh203 0:3d9c67d97d6f 108 else
emh203 0:3d9c67d97d6f 109 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emh203 0:3d9c67d97d6f 110
emh203 0:3d9c67d97d6f 111 {
emh203 0:3d9c67d97d6f 112 /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
emh203 0:3d9c67d97d6f 113 /* row loop */
emh203 0:3d9c67d97d6f 114 do
emh203 0:3d9c67d97d6f 115 {
emh203 0:3d9c67d97d6f 116 /* Output pointer is set to starting address of the row being processed */
emh203 0:3d9c67d97d6f 117 px = pOut + 2 * i;
emh203 0:3d9c67d97d6f 118
emh203 0:3d9c67d97d6f 119 /* For every row wise process, the column loop counter is to be initiated */
emh203 0:3d9c67d97d6f 120 col = numColsB;
emh203 0:3d9c67d97d6f 121
emh203 0:3d9c67d97d6f 122 /* For every row wise process, the pIn2 pointer is set
emh203 0:3d9c67d97d6f 123 ** to the starting address of the pSrcB data */
emh203 0:3d9c67d97d6f 124 pIn2 = pSrcB->pData;
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126 j = 0u;
emh203 0:3d9c67d97d6f 127
emh203 0:3d9c67d97d6f 128 /* column loop */
emh203 0:3d9c67d97d6f 129 do
emh203 0:3d9c67d97d6f 130 {
emh203 0:3d9c67d97d6f 131 /* Set the variable sum, that acts as accumulator, to zero */
emh203 0:3d9c67d97d6f 132 sumReal1 = 0.0f;
emh203 0:3d9c67d97d6f 133 sumImag1 = 0.0f;
emh203 0:3d9c67d97d6f 134
emh203 0:3d9c67d97d6f 135 sumReal2 = 0.0f;
emh203 0:3d9c67d97d6f 136 sumImag2 = 0.0f;
emh203 0:3d9c67d97d6f 137
emh203 0:3d9c67d97d6f 138 /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
emh203 0:3d9c67d97d6f 139 pIn1 = pInA;
emh203 0:3d9c67d97d6f 140
emh203 0:3d9c67d97d6f 141 /* Apply loop unrolling and compute 4 MACs simultaneously. */
emh203 0:3d9c67d97d6f 142 colCnt = numColsA >> 2;
emh203 0:3d9c67d97d6f 143
emh203 0:3d9c67d97d6f 144 /* matrix multiplication */
emh203 0:3d9c67d97d6f 145 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 146 {
emh203 0:3d9c67d97d6f 147
emh203 0:3d9c67d97d6f 148 /* Reading real part of complex matrix A */
emh203 0:3d9c67d97d6f 149 a0 = *pIn1;
emh203 0:3d9c67d97d6f 150
emh203 0:3d9c67d97d6f 151 /* Reading real part of complex matrix B */
emh203 0:3d9c67d97d6f 152 c0 = *pIn2;
emh203 0:3d9c67d97d6f 153
emh203 0:3d9c67d97d6f 154 /* Reading imaginary part of complex matrix A */
emh203 0:3d9c67d97d6f 155 b0 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 156
emh203 0:3d9c67d97d6f 157 /* Reading imaginary part of complex matrix B */
emh203 0:3d9c67d97d6f 158 d0 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 159
emh203 0:3d9c67d97d6f 160 sumReal1 += a0 * c0;
emh203 0:3d9c67d97d6f 161 sumImag1 += b0 * c0;
emh203 0:3d9c67d97d6f 162
emh203 0:3d9c67d97d6f 163 pIn1 += 2u;
emh203 0:3d9c67d97d6f 164 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 165
emh203 0:3d9c67d97d6f 166 sumReal2 -= b0 * d0;
emh203 0:3d9c67d97d6f 167 sumImag2 += a0 * d0;
emh203 0:3d9c67d97d6f 168
emh203 0:3d9c67d97d6f 169 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 170
emh203 0:3d9c67d97d6f 171 a1 = *pIn1;
emh203 0:3d9c67d97d6f 172 c1 = *pIn2;
emh203 0:3d9c67d97d6f 173
emh203 0:3d9c67d97d6f 174 b1 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 175 d1 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 176
emh203 0:3d9c67d97d6f 177 sumReal1 += a1 * c1;
emh203 0:3d9c67d97d6f 178 sumImag1 += b1 * c1;
emh203 0:3d9c67d97d6f 179
emh203 0:3d9c67d97d6f 180 pIn1 += 2u;
emh203 0:3d9c67d97d6f 181 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 182
emh203 0:3d9c67d97d6f 183 sumReal2 -= b1 * d1;
emh203 0:3d9c67d97d6f 184 sumImag2 += a1 * d1;
emh203 0:3d9c67d97d6f 185
emh203 0:3d9c67d97d6f 186 a0 = *pIn1;
emh203 0:3d9c67d97d6f 187 c0 = *pIn2;
emh203 0:3d9c67d97d6f 188
emh203 0:3d9c67d97d6f 189 b0 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 190 d0 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 191
emh203 0:3d9c67d97d6f 192 sumReal1 += a0 * c0;
emh203 0:3d9c67d97d6f 193 sumImag1 += b0 * c0;
emh203 0:3d9c67d97d6f 194
emh203 0:3d9c67d97d6f 195 pIn1 += 2u;
emh203 0:3d9c67d97d6f 196 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 197
emh203 0:3d9c67d97d6f 198 sumReal2 -= b0 * d0;
emh203 0:3d9c67d97d6f 199 sumImag2 += a0 * d0;
emh203 0:3d9c67d97d6f 200
emh203 0:3d9c67d97d6f 201 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 202
emh203 0:3d9c67d97d6f 203 a1 = *pIn1;
emh203 0:3d9c67d97d6f 204 c1 = *pIn2;
emh203 0:3d9c67d97d6f 205
emh203 0:3d9c67d97d6f 206 b1 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 207 d1 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 208
emh203 0:3d9c67d97d6f 209 sumReal1 += a1 * c1;
emh203 0:3d9c67d97d6f 210 sumImag1 += b1 * c1;
emh203 0:3d9c67d97d6f 211
emh203 0:3d9c67d97d6f 212 pIn1 += 2u;
emh203 0:3d9c67d97d6f 213 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 214
emh203 0:3d9c67d97d6f 215 sumReal2 -= b1 * d1;
emh203 0:3d9c67d97d6f 216 sumImag2 += a1 * d1;
emh203 0:3d9c67d97d6f 217
emh203 0:3d9c67d97d6f 218 /* Decrement the loop count */
emh203 0:3d9c67d97d6f 219 colCnt--;
emh203 0:3d9c67d97d6f 220 }
emh203 0:3d9c67d97d6f 221
emh203 0:3d9c67d97d6f 222 /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
emh203 0:3d9c67d97d6f 223 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 224 colCnt = numColsA % 0x4u;
emh203 0:3d9c67d97d6f 225
emh203 0:3d9c67d97d6f 226 while(colCnt > 0u)
emh203 0:3d9c67d97d6f 227 {
emh203 0:3d9c67d97d6f 228 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emh203 0:3d9c67d97d6f 229 a1 = *pIn1;
emh203 0:3d9c67d97d6f 230 c1 = *pIn2;
emh203 0:3d9c67d97d6f 231
emh203 0:3d9c67d97d6f 232 b1 = *(pIn1 + 1u);
emh203 0:3d9c67d97d6f 233 d1 = *(pIn2 + 1u);
emh203 0:3d9c67d97d6f 234
emh203 0:3d9c67d97d6f 235 sumReal1 += a1 * c1;
emh203 0:3d9c67d97d6f 236 sumImag1 += b1 * c1;
emh203 0:3d9c67d97d6f 237
emh203 0:3d9c67d97d6f 238 pIn1 += 2u;
emh203 0:3d9c67d97d6f 239 pIn2 += 2 * numColsB;
emh203 0:3d9c67d97d6f 240
emh203 0:3d9c67d97d6f 241 sumReal2 -= b1 * d1;
emh203 0:3d9c67d97d6f 242 sumImag2 += a1 * d1;
emh203 0:3d9c67d97d6f 243
emh203 0:3d9c67d97d6f 244 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 245 colCnt--;
emh203 0:3d9c67d97d6f 246 }
emh203 0:3d9c67d97d6f 247
emh203 0:3d9c67d97d6f 248 sumReal1 += sumReal2;
emh203 0:3d9c67d97d6f 249 sumImag1 += sumImag2;
emh203 0:3d9c67d97d6f 250
emh203 0:3d9c67d97d6f 251 /* Store the result in the destination buffer */
emh203 0:3d9c67d97d6f 252 *px++ = sumReal1;
emh203 0:3d9c67d97d6f 253 *px++ = sumImag1;
emh203 0:3d9c67d97d6f 254
emh203 0:3d9c67d97d6f 255 /* Update the pointer pIn2 to point to the starting address of the next column */
emh203 0:3d9c67d97d6f 256 j++;
emh203 0:3d9c67d97d6f 257 pIn2 = pSrcB->pData + 2u * j;
emh203 0:3d9c67d97d6f 258
emh203 0:3d9c67d97d6f 259 /* Decrement the column loop counter */
emh203 0:3d9c67d97d6f 260 col--;
emh203 0:3d9c67d97d6f 261
emh203 0:3d9c67d97d6f 262 } while(col > 0u);
emh203 0:3d9c67d97d6f 263
emh203 0:3d9c67d97d6f 264 /* Update the pointer pInA to point to the starting address of the next row */
emh203 0:3d9c67d97d6f 265 i = i + numColsB;
emh203 0:3d9c67d97d6f 266 pInA = pInA + 2 * numColsA;
emh203 0:3d9c67d97d6f 267
emh203 0:3d9c67d97d6f 268 /* Decrement the row loop counter */
emh203 0:3d9c67d97d6f 269 row--;
emh203 0:3d9c67d97d6f 270
emh203 0:3d9c67d97d6f 271 } while(row > 0u);
emh203 0:3d9c67d97d6f 272
emh203 0:3d9c67d97d6f 273 /* Set status as ARM_MATH_SUCCESS */
emh203 0:3d9c67d97d6f 274 status = ARM_MATH_SUCCESS;
emh203 0:3d9c67d97d6f 275 }
emh203 0:3d9c67d97d6f 276
emh203 0:3d9c67d97d6f 277 /* Return to application */
emh203 0:3d9c67d97d6f 278 return (status);
emh203 0:3d9c67d97d6f 279 }
emh203 0:3d9c67d97d6f 280
emh203 0:3d9c67d97d6f 281 /**
emh203 0:3d9c67d97d6f 282 * @} end of MatrixMult group
emh203 0:3d9c67d97d6f 283 */