Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

FilteringFunctions/arm_biquad_cascade_df1_f32.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_biquad_cascade_df1_f32.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Processing function for the
emh203 0:3d9c67d97d6f 11 * floating-point Biquad cascade DirectFormI(DF1) filter.
emh203 0:3d9c67d97d6f 12 *
emh203 0:3d9c67d97d6f 13 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 14 *
emh203 0:3d9c67d97d6f 15 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 16 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 17 * are met:
emh203 0:3d9c67d97d6f 18 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 19 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 20 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 21 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 22 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 23 * distribution.
emh203 0:3d9c67d97d6f 24 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 25 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 26 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 27 *
emh203 0:3d9c67d97d6f 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 31 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 32 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 33 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 34 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 35 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 38 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 39 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 40 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 41
emh203 0:3d9c67d97d6f 42 #include "arm_math.h"
emh203 0:3d9c67d97d6f 43
emh203 0:3d9c67d97d6f 44 /**
emh203 0:3d9c67d97d6f 45 * @ingroup groupFilters
emh203 0:3d9c67d97d6f 46 */
emh203 0:3d9c67d97d6f 47
emh203 0:3d9c67d97d6f 48 /**
emh203 0:3d9c67d97d6f 49 * @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure
emh203 0:3d9c67d97d6f 50 *
emh203 0:3d9c67d97d6f 51 * This set of functions implements arbitrary order recursive (IIR) filters.
emh203 0:3d9c67d97d6f 52 * The filters are implemented as a cascade of second order Biquad sections.
emh203 0:3d9c67d97d6f 53 * The functions support Q15, Q31 and floating-point data types.
emh203 0:3d9c67d97d6f 54 * Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.
emh203 0:3d9c67d97d6f 55 *
emh203 0:3d9c67d97d6f 56 * The functions operate on blocks of input and output data and each call to the function
emh203 0:3d9c67d97d6f 57 * processes <code>blockSize</code> samples through the filter.
emh203 0:3d9c67d97d6f 58 * <code>pSrc</code> points to the array of input data and
emh203 0:3d9c67d97d6f 59 * <code>pDst</code> points to the array of output data.
emh203 0:3d9c67d97d6f 60 * Both arrays contain <code>blockSize</code> values.
emh203 0:3d9c67d97d6f 61 *
emh203 0:3d9c67d97d6f 62 * \par Algorithm
emh203 0:3d9c67d97d6f 63 * Each Biquad stage implements a second order filter using the difference equation:
emh203 0:3d9c67d97d6f 64 * <pre>
emh203 0:3d9c67d97d6f 65 * y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emh203 0:3d9c67d97d6f 66 * </pre>
emh203 0:3d9c67d97d6f 67 * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
emh203 0:3d9c67d97d6f 68 * \image html Biquad.gif "Single Biquad filter stage"
emh203 0:3d9c67d97d6f 69 * Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
emh203 0:3d9c67d97d6f 70 * Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
emh203 0:3d9c67d97d6f 71 * Pay careful attention to the sign of the feedback coefficients.
emh203 0:3d9c67d97d6f 72 * Some design tools use the difference equation
emh203 0:3d9c67d97d6f 73 * <pre>
emh203 0:3d9c67d97d6f 74 * y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
emh203 0:3d9c67d97d6f 75 * </pre>
emh203 0:3d9c67d97d6f 76 * In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
emh203 0:3d9c67d97d6f 77 *
emh203 0:3d9c67d97d6f 78 * \par
emh203 0:3d9c67d97d6f 79 * Higher order filters are realized as a cascade of second order sections.
emh203 0:3d9c67d97d6f 80 * <code>numStages</code> refers to the number of second order stages used.
emh203 0:3d9c67d97d6f 81 * For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
emh203 0:3d9c67d97d6f 82 * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
emh203 0:3d9c67d97d6f 83 * A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
emh203 0:3d9c67d97d6f 84 *
emh203 0:3d9c67d97d6f 85 * \par
emh203 0:3d9c67d97d6f 86 * The <code>pState</code> points to state variables array.
emh203 0:3d9c67d97d6f 87 * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
emh203 0:3d9c67d97d6f 88 * The state variables are arranged in the <code>pState</code> array as:
emh203 0:3d9c67d97d6f 89 * <pre>
emh203 0:3d9c67d97d6f 90 * {x[n-1], x[n-2], y[n-1], y[n-2]}
emh203 0:3d9c67d97d6f 91 * </pre>
emh203 0:3d9c67d97d6f 92 *
emh203 0:3d9c67d97d6f 93 * \par
emh203 0:3d9c67d97d6f 94 * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
emh203 0:3d9c67d97d6f 95 * The state array has a total length of <code>4*numStages</code> values.
emh203 0:3d9c67d97d6f 96 * The state variables are updated after each block of data is processed, the coefficients are untouched.
emh203 0:3d9c67d97d6f 97 *
emh203 0:3d9c67d97d6f 98 * \par Instance Structure
emh203 0:3d9c67d97d6f 99 * The coefficients and state variables for a filter are stored together in an instance data structure.
emh203 0:3d9c67d97d6f 100 * A separate instance structure must be defined for each filter.
emh203 0:3d9c67d97d6f 101 * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
emh203 0:3d9c67d97d6f 102 * There are separate instance structure declarations for each of the 3 supported data types.
emh203 0:3d9c67d97d6f 103 *
emh203 0:3d9c67d97d6f 104 * \par Init Functions
emh203 0:3d9c67d97d6f 105 * There is also an associated initialization function for each data type.
emh203 0:3d9c67d97d6f 106 * The initialization function performs following operations:
emh203 0:3d9c67d97d6f 107 * - Sets the values of the internal structure fields.
emh203 0:3d9c67d97d6f 108 * - Zeros out the values in the state buffer.
emh203 0:3d9c67d97d6f 109 * To do this manually without calling the init function, assign the follow subfields of the instance structure:
emh203 0:3d9c67d97d6f 110 * numStages, pCoeffs, pState. Also set all of the values in pState to zero.
emh203 0:3d9c67d97d6f 111 *
emh203 0:3d9c67d97d6f 112 * \par
emh203 0:3d9c67d97d6f 113 * Use of the initialization function is optional.
emh203 0:3d9c67d97d6f 114 * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
emh203 0:3d9c67d97d6f 115 * To place an instance structure into a const data section, the instance structure must be manually initialized.
emh203 0:3d9c67d97d6f 116 * Set the values in the state buffer to zeros before static initialization.
emh203 0:3d9c67d97d6f 117 * The code below statically initializes each of the 3 different data type filter instance structures
emh203 0:3d9c67d97d6f 118 * <pre>
emh203 0:3d9c67d97d6f 119 * arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
emh203 0:3d9c67d97d6f 120 * arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
emh203 0:3d9c67d97d6f 121 * arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
emh203 0:3d9c67d97d6f 122 * </pre>
emh203 0:3d9c67d97d6f 123 * where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer;
emh203 0:3d9c67d97d6f 124 * <code>pCoeffs</code> is the address of the coefficient buffer; <code>postShift</code> shift to be applied.
emh203 0:3d9c67d97d6f 125 *
emh203 0:3d9c67d97d6f 126 * \par Fixed-Point Behavior
emh203 0:3d9c67d97d6f 127 * Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.
emh203 0:3d9c67d97d6f 128 * Following issues must be considered:
emh203 0:3d9c67d97d6f 129 * - Scaling of coefficients
emh203 0:3d9c67d97d6f 130 * - Filter gain
emh203 0:3d9c67d97d6f 131 * - Overflow and saturation
emh203 0:3d9c67d97d6f 132 *
emh203 0:3d9c67d97d6f 133 * \par
emh203 0:3d9c67d97d6f 134 * <b>Scaling of coefficients: </b>
emh203 0:3d9c67d97d6f 135 * Filter coefficients are represented as fractional values and
emh203 0:3d9c67d97d6f 136 * coefficients are restricted to lie in the range <code>[-1 +1)</code>.
emh203 0:3d9c67d97d6f 137 * The fixed-point functions have an additional scaling parameter <code>postShift</code>
emh203 0:3d9c67d97d6f 138 * which allow the filter coefficients to exceed the range <code>[+1 -1)</code>.
emh203 0:3d9c67d97d6f 139 * At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
emh203 0:3d9c67d97d6f 140 * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
emh203 0:3d9c67d97d6f 141 * This essentially scales the filter coefficients by <code>2^postShift</code>.
emh203 0:3d9c67d97d6f 142 * For example, to realize the coefficients
emh203 0:3d9c67d97d6f 143 * <pre>
emh203 0:3d9c67d97d6f 144 * {1.5, -0.8, 1.2, 1.6, -0.9}
emh203 0:3d9c67d97d6f 145 * </pre>
emh203 0:3d9c67d97d6f 146 * set the pCoeffs array to:
emh203 0:3d9c67d97d6f 147 * <pre>
emh203 0:3d9c67d97d6f 148 * {0.75, -0.4, 0.6, 0.8, -0.45}
emh203 0:3d9c67d97d6f 149 * </pre>
emh203 0:3d9c67d97d6f 150 * and set <code>postShift=1</code>
emh203 0:3d9c67d97d6f 151 *
emh203 0:3d9c67d97d6f 152 * \par
emh203 0:3d9c67d97d6f 153 * <b>Filter gain: </b>
emh203 0:3d9c67d97d6f 154 * The frequency response of a Biquad filter is a function of its coefficients.
emh203 0:3d9c67d97d6f 155 * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
emh203 0:3d9c67d97d6f 156 * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
emh203 0:3d9c67d97d6f 157 * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
emh203 0:3d9c67d97d6f 158 *
emh203 0:3d9c67d97d6f 159 * \par
emh203 0:3d9c67d97d6f 160 * <b>Overflow and saturation: </b>
emh203 0:3d9c67d97d6f 161 * For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
emh203 0:3d9c67d97d6f 162 */
emh203 0:3d9c67d97d6f 163
emh203 0:3d9c67d97d6f 164 /**
emh203 0:3d9c67d97d6f 165 * @addtogroup BiquadCascadeDF1
emh203 0:3d9c67d97d6f 166 * @{
emh203 0:3d9c67d97d6f 167 */
emh203 0:3d9c67d97d6f 168
emh203 0:3d9c67d97d6f 169 /**
emh203 0:3d9c67d97d6f 170 * @param[in] *S points to an instance of the floating-point Biquad cascade structure.
emh203 0:3d9c67d97d6f 171 * @param[in] *pSrc points to the block of input data.
emh203 0:3d9c67d97d6f 172 * @param[out] *pDst points to the block of output data.
emh203 0:3d9c67d97d6f 173 * @param[in] blockSize number of samples to process per call.
emh203 0:3d9c67d97d6f 174 * @return none.
emh203 0:3d9c67d97d6f 175 *
emh203 0:3d9c67d97d6f 176 */
emh203 0:3d9c67d97d6f 177
emh203 0:3d9c67d97d6f 178 void arm_biquad_cascade_df1_f32(
emh203 0:3d9c67d97d6f 179 const arm_biquad_casd_df1_inst_f32 * S,
emh203 0:3d9c67d97d6f 180 float32_t * pSrc,
emh203 0:3d9c67d97d6f 181 float32_t * pDst,
emh203 0:3d9c67d97d6f 182 uint32_t blockSize)
emh203 0:3d9c67d97d6f 183 {
emh203 0:3d9c67d97d6f 184 float32_t *pIn = pSrc; /* source pointer */
emh203 0:3d9c67d97d6f 185 float32_t *pOut = pDst; /* destination pointer */
emh203 0:3d9c67d97d6f 186 float32_t *pState = S->pState; /* pState pointer */
emh203 0:3d9c67d97d6f 187 float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */
emh203 0:3d9c67d97d6f 188 float32_t acc; /* Simulates the accumulator */
emh203 0:3d9c67d97d6f 189 float32_t b0, b1, b2, a1, a2; /* Filter coefficients */
emh203 0:3d9c67d97d6f 190 float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */
emh203 0:3d9c67d97d6f 191 float32_t Xn; /* temporary input */
emh203 0:3d9c67d97d6f 192 uint32_t sample, stage = S->numStages; /* loop counters */
emh203 0:3d9c67d97d6f 193
emh203 0:3d9c67d97d6f 194
emh203 0:3d9c67d97d6f 195 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 196
emh203 0:3d9c67d97d6f 197 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 198
emh203 0:3d9c67d97d6f 199 do
emh203 0:3d9c67d97d6f 200 {
emh203 0:3d9c67d97d6f 201 /* Reading the coefficients */
emh203 0:3d9c67d97d6f 202 b0 = *pCoeffs++;
emh203 0:3d9c67d97d6f 203 b1 = *pCoeffs++;
emh203 0:3d9c67d97d6f 204 b2 = *pCoeffs++;
emh203 0:3d9c67d97d6f 205 a1 = *pCoeffs++;
emh203 0:3d9c67d97d6f 206 a2 = *pCoeffs++;
emh203 0:3d9c67d97d6f 207
emh203 0:3d9c67d97d6f 208 /* Reading the pState values */
emh203 0:3d9c67d97d6f 209 Xn1 = pState[0];
emh203 0:3d9c67d97d6f 210 Xn2 = pState[1];
emh203 0:3d9c67d97d6f 211 Yn1 = pState[2];
emh203 0:3d9c67d97d6f 212 Yn2 = pState[3];
emh203 0:3d9c67d97d6f 213
emh203 0:3d9c67d97d6f 214 /* Apply loop unrolling and compute 4 output values simultaneously. */
emh203 0:3d9c67d97d6f 215 /* The variable acc hold output values that are being computed:
emh203 0:3d9c67d97d6f 216 *
emh203 0:3d9c67d97d6f 217 * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emh203 0:3d9c67d97d6f 218 * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emh203 0:3d9c67d97d6f 219 * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emh203 0:3d9c67d97d6f 220 * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emh203 0:3d9c67d97d6f 221 */
emh203 0:3d9c67d97d6f 222
emh203 0:3d9c67d97d6f 223 sample = blockSize >> 2u;
emh203 0:3d9c67d97d6f 224
emh203 0:3d9c67d97d6f 225 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 226 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 227 while(sample > 0u)
emh203 0:3d9c67d97d6f 228 {
emh203 0:3d9c67d97d6f 229 /* Read the first input */
emh203 0:3d9c67d97d6f 230 Xn = *pIn++;
emh203 0:3d9c67d97d6f 231
emh203 0:3d9c67d97d6f 232 /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
emh203 0:3d9c67d97d6f 233 Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
emh203 0:3d9c67d97d6f 234
emh203 0:3d9c67d97d6f 235 /* Store the result in the accumulator in the destination buffer. */
emh203 0:3d9c67d97d6f 236 *pOut++ = Yn2;
emh203 0:3d9c67d97d6f 237
emh203 0:3d9c67d97d6f 238 /* Every time after the output is computed state should be updated. */
emh203 0:3d9c67d97d6f 239 /* The states should be updated as: */
emh203 0:3d9c67d97d6f 240 /* Xn2 = Xn1 */
emh203 0:3d9c67d97d6f 241 /* Xn1 = Xn */
emh203 0:3d9c67d97d6f 242 /* Yn2 = Yn1 */
emh203 0:3d9c67d97d6f 243 /* Yn1 = acc */
emh203 0:3d9c67d97d6f 244
emh203 0:3d9c67d97d6f 245 /* Read the second input */
emh203 0:3d9c67d97d6f 246 Xn2 = *pIn++;
emh203 0:3d9c67d97d6f 247
emh203 0:3d9c67d97d6f 248 /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
emh203 0:3d9c67d97d6f 249 Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
emh203 0:3d9c67d97d6f 250
emh203 0:3d9c67d97d6f 251 /* Store the result in the accumulator in the destination buffer. */
emh203 0:3d9c67d97d6f 252 *pOut++ = Yn1;
emh203 0:3d9c67d97d6f 253
emh203 0:3d9c67d97d6f 254 /* Every time after the output is computed state should be updated. */
emh203 0:3d9c67d97d6f 255 /* The states should be updated as: */
emh203 0:3d9c67d97d6f 256 /* Xn2 = Xn1 */
emh203 0:3d9c67d97d6f 257 /* Xn1 = Xn */
emh203 0:3d9c67d97d6f 258 /* Yn2 = Yn1 */
emh203 0:3d9c67d97d6f 259 /* Yn1 = acc */
emh203 0:3d9c67d97d6f 260
emh203 0:3d9c67d97d6f 261 /* Read the third input */
emh203 0:3d9c67d97d6f 262 Xn1 = *pIn++;
emh203 0:3d9c67d97d6f 263
emh203 0:3d9c67d97d6f 264 /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
emh203 0:3d9c67d97d6f 265 Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
emh203 0:3d9c67d97d6f 266
emh203 0:3d9c67d97d6f 267 /* Store the result in the accumulator in the destination buffer. */
emh203 0:3d9c67d97d6f 268 *pOut++ = Yn2;
emh203 0:3d9c67d97d6f 269
emh203 0:3d9c67d97d6f 270 /* Every time after the output is computed state should be updated. */
emh203 0:3d9c67d97d6f 271 /* The states should be updated as: */
emh203 0:3d9c67d97d6f 272 /* Xn2 = Xn1 */
emh203 0:3d9c67d97d6f 273 /* Xn1 = Xn */
emh203 0:3d9c67d97d6f 274 /* Yn2 = Yn1 */
emh203 0:3d9c67d97d6f 275 /* Yn1 = acc */
emh203 0:3d9c67d97d6f 276
emh203 0:3d9c67d97d6f 277 /* Read the forth input */
emh203 0:3d9c67d97d6f 278 Xn = *pIn++;
emh203 0:3d9c67d97d6f 279
emh203 0:3d9c67d97d6f 280 /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
emh203 0:3d9c67d97d6f 281 Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
emh203 0:3d9c67d97d6f 282
emh203 0:3d9c67d97d6f 283 /* Store the result in the accumulator in the destination buffer. */
emh203 0:3d9c67d97d6f 284 *pOut++ = Yn1;
emh203 0:3d9c67d97d6f 285
emh203 0:3d9c67d97d6f 286 /* Every time after the output is computed state should be updated. */
emh203 0:3d9c67d97d6f 287 /* The states should be updated as: */
emh203 0:3d9c67d97d6f 288 /* Xn2 = Xn1 */
emh203 0:3d9c67d97d6f 289 /* Xn1 = Xn */
emh203 0:3d9c67d97d6f 290 /* Yn2 = Yn1 */
emh203 0:3d9c67d97d6f 291 /* Yn1 = acc */
emh203 0:3d9c67d97d6f 292 Xn2 = Xn1;
emh203 0:3d9c67d97d6f 293 Xn1 = Xn;
emh203 0:3d9c67d97d6f 294
emh203 0:3d9c67d97d6f 295 /* decrement the loop counter */
emh203 0:3d9c67d97d6f 296 sample--;
emh203 0:3d9c67d97d6f 297
emh203 0:3d9c67d97d6f 298 }
emh203 0:3d9c67d97d6f 299
emh203 0:3d9c67d97d6f 300 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 301 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 302 sample = blockSize & 0x3u;
emh203 0:3d9c67d97d6f 303
emh203 0:3d9c67d97d6f 304 while(sample > 0u)
emh203 0:3d9c67d97d6f 305 {
emh203 0:3d9c67d97d6f 306 /* Read the input */
emh203 0:3d9c67d97d6f 307 Xn = *pIn++;
emh203 0:3d9c67d97d6f 308
emh203 0:3d9c67d97d6f 309 /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
emh203 0:3d9c67d97d6f 310 acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
emh203 0:3d9c67d97d6f 311
emh203 0:3d9c67d97d6f 312 /* Store the result in the accumulator in the destination buffer. */
emh203 0:3d9c67d97d6f 313 *pOut++ = acc;
emh203 0:3d9c67d97d6f 314
emh203 0:3d9c67d97d6f 315 /* Every time after the output is computed state should be updated. */
emh203 0:3d9c67d97d6f 316 /* The states should be updated as: */
emh203 0:3d9c67d97d6f 317 /* Xn2 = Xn1 */
emh203 0:3d9c67d97d6f 318 /* Xn1 = Xn */
emh203 0:3d9c67d97d6f 319 /* Yn2 = Yn1 */
emh203 0:3d9c67d97d6f 320 /* Yn1 = acc */
emh203 0:3d9c67d97d6f 321 Xn2 = Xn1;
emh203 0:3d9c67d97d6f 322 Xn1 = Xn;
emh203 0:3d9c67d97d6f 323 Yn2 = Yn1;
emh203 0:3d9c67d97d6f 324 Yn1 = acc;
emh203 0:3d9c67d97d6f 325
emh203 0:3d9c67d97d6f 326 /* decrement the loop counter */
emh203 0:3d9c67d97d6f 327 sample--;
emh203 0:3d9c67d97d6f 328
emh203 0:3d9c67d97d6f 329 }
emh203 0:3d9c67d97d6f 330
emh203 0:3d9c67d97d6f 331 /* Store the updated state variables back into the pState array */
emh203 0:3d9c67d97d6f 332 *pState++ = Xn1;
emh203 0:3d9c67d97d6f 333 *pState++ = Xn2;
emh203 0:3d9c67d97d6f 334 *pState++ = Yn1;
emh203 0:3d9c67d97d6f 335 *pState++ = Yn2;
emh203 0:3d9c67d97d6f 336
emh203 0:3d9c67d97d6f 337 /* The first stage goes from the input buffer to the output buffer. */
emh203 0:3d9c67d97d6f 338 /* Subsequent numStages occur in-place in the output buffer */
emh203 0:3d9c67d97d6f 339 pIn = pDst;
emh203 0:3d9c67d97d6f 340
emh203 0:3d9c67d97d6f 341 /* Reset the output pointer */
emh203 0:3d9c67d97d6f 342 pOut = pDst;
emh203 0:3d9c67d97d6f 343
emh203 0:3d9c67d97d6f 344 /* decrement the loop counter */
emh203 0:3d9c67d97d6f 345 stage--;
emh203 0:3d9c67d97d6f 346
emh203 0:3d9c67d97d6f 347 } while(stage > 0u);
emh203 0:3d9c67d97d6f 348
emh203 0:3d9c67d97d6f 349 #else
emh203 0:3d9c67d97d6f 350
emh203 0:3d9c67d97d6f 351 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 352
emh203 0:3d9c67d97d6f 353 do
emh203 0:3d9c67d97d6f 354 {
emh203 0:3d9c67d97d6f 355 /* Reading the coefficients */
emh203 0:3d9c67d97d6f 356 b0 = *pCoeffs++;
emh203 0:3d9c67d97d6f 357 b1 = *pCoeffs++;
emh203 0:3d9c67d97d6f 358 b2 = *pCoeffs++;
emh203 0:3d9c67d97d6f 359 a1 = *pCoeffs++;
emh203 0:3d9c67d97d6f 360 a2 = *pCoeffs++;
emh203 0:3d9c67d97d6f 361
emh203 0:3d9c67d97d6f 362 /* Reading the pState values */
emh203 0:3d9c67d97d6f 363 Xn1 = pState[0];
emh203 0:3d9c67d97d6f 364 Xn2 = pState[1];
emh203 0:3d9c67d97d6f 365 Yn1 = pState[2];
emh203 0:3d9c67d97d6f 366 Yn2 = pState[3];
emh203 0:3d9c67d97d6f 367
emh203 0:3d9c67d97d6f 368 /* The variables acc holds the output value that is computed:
emh203 0:3d9c67d97d6f 369 * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
emh203 0:3d9c67d97d6f 370 */
emh203 0:3d9c67d97d6f 371
emh203 0:3d9c67d97d6f 372 sample = blockSize;
emh203 0:3d9c67d97d6f 373
emh203 0:3d9c67d97d6f 374 while(sample > 0u)
emh203 0:3d9c67d97d6f 375 {
emh203 0:3d9c67d97d6f 376 /* Read the input */
emh203 0:3d9c67d97d6f 377 Xn = *pIn++;
emh203 0:3d9c67d97d6f 378
emh203 0:3d9c67d97d6f 379 /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
emh203 0:3d9c67d97d6f 380 acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
emh203 0:3d9c67d97d6f 381
emh203 0:3d9c67d97d6f 382 /* Store the result in the accumulator in the destination buffer. */
emh203 0:3d9c67d97d6f 383 *pOut++ = acc;
emh203 0:3d9c67d97d6f 384
emh203 0:3d9c67d97d6f 385 /* Every time after the output is computed state should be updated. */
emh203 0:3d9c67d97d6f 386 /* The states should be updated as: */
emh203 0:3d9c67d97d6f 387 /* Xn2 = Xn1 */
emh203 0:3d9c67d97d6f 388 /* Xn1 = Xn */
emh203 0:3d9c67d97d6f 389 /* Yn2 = Yn1 */
emh203 0:3d9c67d97d6f 390 /* Yn1 = acc */
emh203 0:3d9c67d97d6f 391 Xn2 = Xn1;
emh203 0:3d9c67d97d6f 392 Xn1 = Xn;
emh203 0:3d9c67d97d6f 393 Yn2 = Yn1;
emh203 0:3d9c67d97d6f 394 Yn1 = acc;
emh203 0:3d9c67d97d6f 395
emh203 0:3d9c67d97d6f 396 /* decrement the loop counter */
emh203 0:3d9c67d97d6f 397 sample--;
emh203 0:3d9c67d97d6f 398 }
emh203 0:3d9c67d97d6f 399
emh203 0:3d9c67d97d6f 400 /* Store the updated state variables back into the pState array */
emh203 0:3d9c67d97d6f 401 *pState++ = Xn1;
emh203 0:3d9c67d97d6f 402 *pState++ = Xn2;
emh203 0:3d9c67d97d6f 403 *pState++ = Yn1;
emh203 0:3d9c67d97d6f 404 *pState++ = Yn2;
emh203 0:3d9c67d97d6f 405
emh203 0:3d9c67d97d6f 406 /* The first stage goes from the input buffer to the output buffer. */
emh203 0:3d9c67d97d6f 407 /* Subsequent numStages occur in-place in the output buffer */
emh203 0:3d9c67d97d6f 408 pIn = pDst;
emh203 0:3d9c67d97d6f 409
emh203 0:3d9c67d97d6f 410 /* Reset the output pointer */
emh203 0:3d9c67d97d6f 411 pOut = pDst;
emh203 0:3d9c67d97d6f 412
emh203 0:3d9c67d97d6f 413 /* decrement the loop counter */
emh203 0:3d9c67d97d6f 414 stage--;
emh203 0:3d9c67d97d6f 415
emh203 0:3d9c67d97d6f 416 } while(stage > 0u);
emh203 0:3d9c67d97d6f 417
emh203 0:3d9c67d97d6f 418 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 419
emh203 0:3d9c67d97d6f 420 }
emh203 0:3d9c67d97d6f 421
emh203 0:3d9c67d97d6f 422
emh203 0:3d9c67d97d6f 423 /**
emh203 0:3d9c67d97d6f 424 * @} end of BiquadCascadeDF1 group
emh203 0:3d9c67d97d6f 425 */