Eli Hughes / CMSIS_DSP_401

V4.0.1 of the ARM CMSIS DSP libraries. Note that arm_bitreversal2.s, arm_cfft_f32.c and arm_rfft_fast_f32.c had to be removed. arm_bitreversal2.s will not assemble with the online tools. So, the fast f32 FFT functions are not yet available. All the other FFT functions are available.

Dependents:   MPU9150_Example fir_f32 fir_f32 MPU9150_nucleo_noni2cdev ... more

BasicMathFunctions/arm_dot_prod_q31.c@0:3d9c67d97d6f, 2014-07-28 (annotated)

Committer:
emh203
Date:
Mon Jul 28 15:03:15 2014 +0000
Revision:
0:3d9c67d97d6f
1st working commit.   Had to remove arm_bitreversal2.s     arm_cfft_f32.c and arm_rfft_fast_f32.c.    The .s will not assemble.      For now I removed these functions so we could at least have a library for the other functions.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emh203 0:3d9c67d97d6f 1 /* ----------------------------------------------------------------------
emh203 0:3d9c67d97d6f 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emh203 0:3d9c67d97d6f 3 *
emh203 0:3d9c67d97d6f 4 * $Date: 12. March 2014
emh203 0:3d9c67d97d6f 5 * $Revision: V1.4.3
emh203 0:3d9c67d97d6f 6 *
emh203 0:3d9c67d97d6f 7 * Project: CMSIS DSP Library
emh203 0:3d9c67d97d6f 8 * Title: arm_dot_prod_q31.c
emh203 0:3d9c67d97d6f 9 *
emh203 0:3d9c67d97d6f 10 * Description: Q31 dot product.
emh203 0:3d9c67d97d6f 11 *
emh203 0:3d9c67d97d6f 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emh203 0:3d9c67d97d6f 13 *
emh203 0:3d9c67d97d6f 14 * Redistribution and use in source and binary forms, with or without
emh203 0:3d9c67d97d6f 15 * modification, are permitted provided that the following conditions
emh203 0:3d9c67d97d6f 16 * are met:
emh203 0:3d9c67d97d6f 17 * - Redistributions of source code must retain the above copyright
emh203 0:3d9c67d97d6f 18 * notice, this list of conditions and the following disclaimer.
emh203 0:3d9c67d97d6f 19 * - Redistributions in binary form must reproduce the above copyright
emh203 0:3d9c67d97d6f 20 * notice, this list of conditions and the following disclaimer in
emh203 0:3d9c67d97d6f 21 * the documentation and/or other materials provided with the
emh203 0:3d9c67d97d6f 22 * distribution.
emh203 0:3d9c67d97d6f 23 * - Neither the name of ARM LIMITED nor the names of its contributors
emh203 0:3d9c67d97d6f 24 * may be used to endorse or promote products derived from this
emh203 0:3d9c67d97d6f 25 * software without specific prior written permission.
emh203 0:3d9c67d97d6f 26 *
emh203 0:3d9c67d97d6f 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
emh203 0:3d9c67d97d6f 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
emh203 0:3d9c67d97d6f 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
emh203 0:3d9c67d97d6f 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
emh203 0:3d9c67d97d6f 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
emh203 0:3d9c67d97d6f 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
emh203 0:3d9c67d97d6f 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
emh203 0:3d9c67d97d6f 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emh203 0:3d9c67d97d6f 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
emh203 0:3d9c67d97d6f 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
emh203 0:3d9c67d97d6f 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emh203 0:3d9c67d97d6f 38 * POSSIBILITY OF SUCH DAMAGE.
emh203 0:3d9c67d97d6f 39 * -------------------------------------------------------------------- */
emh203 0:3d9c67d97d6f 40
emh203 0:3d9c67d97d6f 41 #include "arm_math.h"
emh203 0:3d9c67d97d6f 42
emh203 0:3d9c67d97d6f 43 /**
emh203 0:3d9c67d97d6f 44 * @ingroup groupMath
emh203 0:3d9c67d97d6f 45 */
emh203 0:3d9c67d97d6f 46
emh203 0:3d9c67d97d6f 47 /**
emh203 0:3d9c67d97d6f 48 * @addtogroup dot_prod
emh203 0:3d9c67d97d6f 49 * @{
emh203 0:3d9c67d97d6f 50 */
emh203 0:3d9c67d97d6f 51
emh203 0:3d9c67d97d6f 52 /**
emh203 0:3d9c67d97d6f 53 * @brief Dot product of Q31 vectors.
emh203 0:3d9c67d97d6f 54 * @param[in] *pSrcA points to the first input vector
emh203 0:3d9c67d97d6f 55 * @param[in] *pSrcB points to the second input vector
emh203 0:3d9c67d97d6f 56 * @param[in] blockSize number of samples in each vector
emh203 0:3d9c67d97d6f 57 * @param[out] *result output result returned here
emh203 0:3d9c67d97d6f 58 * @return none.
emh203 0:3d9c67d97d6f 59 *
emh203 0:3d9c67d97d6f 60 * <b>Scaling and Overflow Behavior:</b>
emh203 0:3d9c67d97d6f 61 * \par
emh203 0:3d9c67d97d6f 62 * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
emh203 0:3d9c67d97d6f 63 * are truncated to 2.48 format by discarding the lower 14 bits.
emh203 0:3d9c67d97d6f 64 * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
emh203 0:3d9c67d97d6f 65 * There are 15 guard bits in the accumulator and there is no risk of overflow as long as
emh203 0:3d9c67d97d6f 66 * the length of the vectors is less than 2^16 elements.
emh203 0:3d9c67d97d6f 67 * The return result is in 16.48 format.
emh203 0:3d9c67d97d6f 68 */
emh203 0:3d9c67d97d6f 69
emh203 0:3d9c67d97d6f 70 void arm_dot_prod_q31(
emh203 0:3d9c67d97d6f 71 q31_t * pSrcA,
emh203 0:3d9c67d97d6f 72 q31_t * pSrcB,
emh203 0:3d9c67d97d6f 73 uint32_t blockSize,
emh203 0:3d9c67d97d6f 74 q63_t * result)
emh203 0:3d9c67d97d6f 75 {
emh203 0:3d9c67d97d6f 76 q63_t sum = 0; /* Temporary result storage */
emh203 0:3d9c67d97d6f 77 uint32_t blkCnt; /* loop counter */
emh203 0:3d9c67d97d6f 78
emh203 0:3d9c67d97d6f 79
emh203 0:3d9c67d97d6f 80 #ifndef ARM_MATH_CM0_FAMILY
emh203 0:3d9c67d97d6f 81
emh203 0:3d9c67d97d6f 82 /* Run the below code for Cortex-M4 and Cortex-M3 */
emh203 0:3d9c67d97d6f 83 q31_t inA1, inA2, inA3, inA4;
emh203 0:3d9c67d97d6f 84 q31_t inB1, inB2, inB3, inB4;
emh203 0:3d9c67d97d6f 85
emh203 0:3d9c67d97d6f 86 /*loop Unrolling */
emh203 0:3d9c67d97d6f 87 blkCnt = blockSize >> 2u;
emh203 0:3d9c67d97d6f 88
emh203 0:3d9c67d97d6f 89 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emh203 0:3d9c67d97d6f 90 ** a second loop below computes the remaining 1 to 3 samples. */
emh203 0:3d9c67d97d6f 91 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 92 {
emh203 0:3d9c67d97d6f 93 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
emh203 0:3d9c67d97d6f 94 /* Calculate dot product and then store the result in a temporary buffer. */
emh203 0:3d9c67d97d6f 95 inA1 = *pSrcA++;
emh203 0:3d9c67d97d6f 96 inA2 = *pSrcA++;
emh203 0:3d9c67d97d6f 97 inA3 = *pSrcA++;
emh203 0:3d9c67d97d6f 98 inA4 = *pSrcA++;
emh203 0:3d9c67d97d6f 99 inB1 = *pSrcB++;
emh203 0:3d9c67d97d6f 100 inB2 = *pSrcB++;
emh203 0:3d9c67d97d6f 101 inB3 = *pSrcB++;
emh203 0:3d9c67d97d6f 102 inB4 = *pSrcB++;
emh203 0:3d9c67d97d6f 103
emh203 0:3d9c67d97d6f 104 sum += ((q63_t) inA1 * inB1) >> 14u;
emh203 0:3d9c67d97d6f 105 sum += ((q63_t) inA2 * inB2) >> 14u;
emh203 0:3d9c67d97d6f 106 sum += ((q63_t) inA3 * inB3) >> 14u;
emh203 0:3d9c67d97d6f 107 sum += ((q63_t) inA4 * inB4) >> 14u;
emh203 0:3d9c67d97d6f 108
emh203 0:3d9c67d97d6f 109 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 110 blkCnt--;
emh203 0:3d9c67d97d6f 111 }
emh203 0:3d9c67d97d6f 112
emh203 0:3d9c67d97d6f 113 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emh203 0:3d9c67d97d6f 114 ** No loop unrolling is used. */
emh203 0:3d9c67d97d6f 115 blkCnt = blockSize % 0x4u;
emh203 0:3d9c67d97d6f 116
emh203 0:3d9c67d97d6f 117 #else
emh203 0:3d9c67d97d6f 118
emh203 0:3d9c67d97d6f 119 /* Run the below code for Cortex-M0 */
emh203 0:3d9c67d97d6f 120
emh203 0:3d9c67d97d6f 121 /* Initialize blkCnt with number of samples */
emh203 0:3d9c67d97d6f 122 blkCnt = blockSize;
emh203 0:3d9c67d97d6f 123
emh203 0:3d9c67d97d6f 124 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emh203 0:3d9c67d97d6f 125
emh203 0:3d9c67d97d6f 126
emh203 0:3d9c67d97d6f 127 while(blkCnt > 0u)
emh203 0:3d9c67d97d6f 128 {
emh203 0:3d9c67d97d6f 129 /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
emh203 0:3d9c67d97d6f 130 /* Calculate dot product and then store the result in a temporary buffer. */
emh203 0:3d9c67d97d6f 131 sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
emh203 0:3d9c67d97d6f 132
emh203 0:3d9c67d97d6f 133 /* Decrement the loop counter */
emh203 0:3d9c67d97d6f 134 blkCnt--;
emh203 0:3d9c67d97d6f 135 }
emh203 0:3d9c67d97d6f 136
emh203 0:3d9c67d97d6f 137 /* Store the result in the destination buffer in 16.48 format */
emh203 0:3d9c67d97d6f 138 *result = sum;
emh203 0:3d9c67d97d6f 139 }
emh203 0:3d9c67d97d6f 140
emh203 0:3d9c67d97d6f 141 /**
emh203 0:3d9c67d97d6f 142 * @} end of dot_prod group
emh203 0:3d9c67d97d6f 143 */