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Dependencies:   FXOS8700CQ mbed

Fork of StarterKit by Rick McConney

HTS221Reg.h@0:9d5134074d84, 2016-07-08 (annotated)

Committer:
JMF
Date:
Fri Jul 08 23:52:38 2016 +0000
Revision:
0:9d5134074d84
Initial version of AT&T_Avnet Shape Hackathon WNC Shield board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
JMF 0:9d5134074d84 1
JMF 0:9d5134074d84 2 #ifndef HTS221REG_H_
JMF 0:9d5134074d84 3 #define HTS221REG_H_
JMF 0:9d5134074d84 4
JMF 0:9d5134074d84 5
JMF 0:9d5134074d84 6 #define HTS221_ADDRESS 0x5F
JMF 0:9d5134074d84 7
JMF 0:9d5134074d84 8 //Define a few of the registers that we will be accessing on the HTS221
JMF 0:9d5134074d84 9 #define WHO_AM_I 0x0F
JMF 0:9d5134074d84 10 #define WHO_AM_I_RETURN 0xBC //This read-only register contains the device identifier, set to BCh
JMF 0:9d5134074d84 11
JMF 0:9d5134074d84 12 #define AVERAGE_REG 0x10 // To configure humidity/temperature average.
JMF 0:9d5134074d84 13 #define AVERAGE_DEFAULT 0x1B
JMF 0:9d5134074d84 14
JMF 0:9d5134074d84 15 /*
JMF 0:9d5134074d84 16 * [7] PD: power down control
JMF 0:9d5134074d84 17 * (0: power-down mode; 1: active mode)
JMF 0:9d5134074d84 18 *
JMF 0:9d5134074d84 19 * [6:3] Reserved
JMF 0:9d5134074d84 20 *
JMF 0:9d5134074d84 21 * [2] BDU: block data update
JMF 0:9d5134074d84 22 * (0: continuous update; 1: output registers not updated until MSB and LSB reading)
JMF 0:9d5134074d84 23 The BDU bit is used to inhibit the output register update between the reading of the upper
JMF 0:9d5134074d84 24 and lower register parts. In default mode (BDU = ?0?), the lower and upper register parts are
JMF 0:9d5134074d84 25 updated continuously. If it is not certain whether the read will be faster than output data rate,
JMF 0:9d5134074d84 26 it is recommended to set the BDU bit to ?1?. In this way, after the reading of the lower (upper)
JMF 0:9d5134074d84 27 register part, the content of that output register is not updated until the upper (lower) part is
JMF 0:9d5134074d84 28 read also.
JMF 0:9d5134074d84 29 *
JMF 0:9d5134074d84 30 * [1:0] ODR1, ODR0: output data rate selection (see table 17)
JMF 0:9d5134074d84 31 */
JMF 0:9d5134074d84 32 #define CTRL_REG1 0x20
JMF 0:9d5134074d84 33 #define POWER_UP 0x80
JMF 0:9d5134074d84 34 #define BDU_SET 0x4
JMF 0:9d5134074d84 35 #define ODR0_SET 0x1 // setting sensor reading period 1Hz
JMF 0:9d5134074d84 36
JMF 0:9d5134074d84 37 #define CTRL_REG2 0x21
JMF 0:9d5134074d84 38 #define CTRL_REG3 0x22
JMF 0:9d5134074d84 39 #define REG_DEFAULT 0x00
JMF 0:9d5134074d84 40
JMF 0:9d5134074d84 41 #define STATUS_REG 0x27
JMF 0:9d5134074d84 42 #define TEMPERATURE_READY 0x1
JMF 0:9d5134074d84 43 #define HUMIDITY_READY 0x2
JMF 0:9d5134074d84 44
JMF 0:9d5134074d84 45 #define HUMIDITY_L_REG 0x28
JMF 0:9d5134074d84 46 #define HUMIDITY_H_REG 0x29
JMF 0:9d5134074d84 47 #define TEMP_L_REG 0x2A
JMF 0:9d5134074d84 48 #define TEMP_H_REG 0x2B
JMF 0:9d5134074d84 49 /*
JMF 0:9d5134074d84 50 * calibration registry should be read for temperature and humidity calculation.
JMF 0:9d5134074d84 51 * Before the first calculation of temperature and humidity,
JMF 0:9d5134074d84 52 * the master reads out the calibration coefficients.
JMF 0:9d5134074d84 53 * will do at init phase
JMF 0:9d5134074d84 54 */
JMF 0:9d5134074d84 55 #define CALIB_START 0x30
JMF 0:9d5134074d84 56 #define CALIB_END 0x3F
JMF 0:9d5134074d84 57 /*
JMF 0:9d5134074d84 58 #define CALIB_T0_DEGC_X8 0x32
JMF 0:9d5134074d84 59 #define CALIB_T1_DEGC_X8 0x33
JMF 0:9d5134074d84 60 #define CALIB_T1_T0_MSB 0x35
JMF 0:9d5134074d84 61 #define CALIB_T0_OUT_L 0x3C
JMF 0:9d5134074d84 62 #define CALIB_T0_OUT_H 0x3D
JMF 0:9d5134074d84 63 #define CALIB_T1_OUT_L 0x3E
JMF 0:9d5134074d84 64 #define CALIB_T1_OUT_H 0x3F
JMF 0:9d5134074d84 65 */
JMF 0:9d5134074d84 66
JMF 0:9d5134074d84 67
JMF 0:9d5134074d84 68
JMF 0:9d5134074d84 69 #endif /* HTS221REG_H_ */