test

Committer:
elijahsj
Date:
Mon Nov 09 00:33:19 2020 -0500
Revision:
2:4364577b5ad8
Parent:
1:8a094db1347f
copied mbed library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elijahsj 1:8a094db1347f 1 /* mbed Microcontroller Library
elijahsj 1:8a094db1347f 2 *******************************************************************************
elijahsj 1:8a094db1347f 3 * Copyright (c) 2015, STMicroelectronics
elijahsj 1:8a094db1347f 4 * All rights reserved.
elijahsj 1:8a094db1347f 5 *
elijahsj 1:8a094db1347f 6 * Redistribution and use in source and binary forms, with or without
elijahsj 1:8a094db1347f 7 * modification, are permitted provided that the following conditions are met:
elijahsj 1:8a094db1347f 8 *
elijahsj 1:8a094db1347f 9 * 1. Redistributions of source code must retain the above copyright notice,
elijahsj 1:8a094db1347f 10 * this list of conditions and the following disclaimer.
elijahsj 1:8a094db1347f 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
elijahsj 1:8a094db1347f 12 * this list of conditions and the following disclaimer in the documentation
elijahsj 1:8a094db1347f 13 * and/or other materials provided with the distribution.
elijahsj 1:8a094db1347f 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
elijahsj 1:8a094db1347f 15 * may be used to endorse or promote products derived from this software
elijahsj 1:8a094db1347f 16 * without specific prior written permission.
elijahsj 1:8a094db1347f 17 *
elijahsj 1:8a094db1347f 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
elijahsj 1:8a094db1347f 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
elijahsj 1:8a094db1347f 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elijahsj 1:8a094db1347f 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
elijahsj 1:8a094db1347f 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
elijahsj 1:8a094db1347f 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
elijahsj 1:8a094db1347f 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
elijahsj 1:8a094db1347f 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
elijahsj 1:8a094db1347f 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
elijahsj 1:8a094db1347f 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elijahsj 1:8a094db1347f 28 *******************************************************************************
elijahsj 1:8a094db1347f 29 */
elijahsj 1:8a094db1347f 30 #ifndef MBED_I2C_DEVICE_H
elijahsj 1:8a094db1347f 31 #define MBED_I2C_DEVICE_H
elijahsj 1:8a094db1347f 32
elijahsj 1:8a094db1347f 33 #include "cmsis.h"
elijahsj 1:8a094db1347f 34
elijahsj 1:8a094db1347f 35 #ifdef __cplusplus
elijahsj 1:8a094db1347f 36 extern "C" {
elijahsj 1:8a094db1347f 37 #endif
elijahsj 1:8a094db1347f 38
elijahsj 1:8a094db1347f 39 #ifdef DEVICE_I2C
elijahsj 1:8a094db1347f 40
elijahsj 1:8a094db1347f 41 #define I2C_IP_VERSION_V2
elijahsj 1:8a094db1347f 42
elijahsj 1:8a094db1347f 43 #define I2C_IT_ALL (I2C_IT_ERRI|I2C_IT_TCI|I2C_IT_STOPI|I2C_IT_NACKI|I2C_IT_ADDRI|I2C_IT_RXI|I2C_IT_TXI)
elijahsj 1:8a094db1347f 44
elijahsj 1:8a094db1347f 45 /* Family specifc settings for clock source */
elijahsj 1:8a094db1347f 46 #define I2CAPI_I2C1_CLKSRC RCC_I2C1CLKSOURCE_SYSCLK
elijahsj 1:8a094db1347f 47 #define I2CAPI_I2C2_CLKSRC RCC_I2C2CLKSOURCE_SYSCLK
elijahsj 1:8a094db1347f 48 #define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_SYSCLK
elijahsj 1:8a094db1347f 49 #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_SYSCLK
elijahsj 1:8a094db1347f 50
elijahsj 1:8a094db1347f 51 /* Provide the suitable timing depending on requested frequencie */
elijahsj 1:8a094db1347f 52 static inline uint32_t get_i2c_timing(int hz)
elijahsj 1:8a094db1347f 53 {
elijahsj 1:8a094db1347f 54 uint32_t tim = 0;
elijahsj 1:8a094db1347f 55 if (SystemCoreClock == 80000000) {
elijahsj 1:8a094db1347f 56 // Common settings: I2C clock = 80 MHz, Analog filter = ON, Digital filter coefficient = 0
elijahsj 1:8a094db1347f 57 switch (hz) {
elijahsj 1:8a094db1347f 58 case 100000:
elijahsj 1:8a094db1347f 59 tim = 0x30C14E6B; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
elijahsj 1:8a094db1347f 60 break;
elijahsj 1:8a094db1347f 61 case 400000:
elijahsj 1:8a094db1347f 62 tim = 0x10D1143A; // Fast mode with Rise Time = 250ns and Fall Time = 100ns
elijahsj 1:8a094db1347f 63 break;
elijahsj 1:8a094db1347f 64 case 1000000:
elijahsj 1:8a094db1347f 65 tim = 0x00810E27; // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
elijahsj 1:8a094db1347f 66 break;
elijahsj 1:8a094db1347f 67 default:
elijahsj 1:8a094db1347f 68 break;
elijahsj 1:8a094db1347f 69 }
elijahsj 1:8a094db1347f 70 } else if (SystemCoreClock == 48000000) {
elijahsj 1:8a094db1347f 71 // Common settings: I2C clock = 48 MHz, Analog filter = ON, Digital filter coefficient = 0
elijahsj 1:8a094db1347f 72 switch (hz) {
elijahsj 1:8a094db1347f 73 case 100000:
elijahsj 1:8a094db1347f 74 tim = 0x20A03E55; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
elijahsj 1:8a094db1347f 75 break;
elijahsj 1:8a094db1347f 76 case 400000:
elijahsj 1:8a094db1347f 77 tim = 0x10800C21; // Fast mode with Rise Time = 250ns and Fall Time = 100ns
elijahsj 1:8a094db1347f 78 break;
elijahsj 1:8a094db1347f 79 case 1000000:
elijahsj 1:8a094db1347f 80 tim = 0x00500816; // Fast mode Plus with Rise Time = 60ns and Fall Time = 100ns
elijahsj 1:8a094db1347f 81 break;
elijahsj 1:8a094db1347f 82 default:
elijahsj 1:8a094db1347f 83 break;
elijahsj 1:8a094db1347f 84 }
elijahsj 1:8a094db1347f 85 }
elijahsj 1:8a094db1347f 86 return tim;
elijahsj 1:8a094db1347f 87 }
elijahsj 1:8a094db1347f 88
elijahsj 1:8a094db1347f 89 #ifdef __cplusplus
elijahsj 1:8a094db1347f 90 }
elijahsj 1:8a094db1347f 91 #endif
elijahsj 1:8a094db1347f 92
elijahsj 1:8a094db1347f 93 #endif // DEVICE_I2C
elijahsj 1:8a094db1347f 94
elijahsj 1:8a094db1347f 95 #endif