Elijah Stanger-Jones / mbed-dev-f303

test

targets/TARGET_Maxim/TARGET_MAX32630/mxc/wdt.c@2:4364577b5ad8, 2020-11-09 (annotated)

Committer:
elijahsj
Date:
Mon Nov 09 00:33:19 2020 -0500
Revision:
2:4364577b5ad8
Parent:
1:8a094db1347f 
copied mbed library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elijahsj 1:8a094db1347f 1 /**
elijahsj 1:8a094db1347f 2 * @file
elijahsj 1:8a094db1347f 3 * @brief Watchdog driver source.
elijahsj 1:8a094db1347f 4 */
elijahsj 1:8a094db1347f 5 /* *****************************************************************************
elijahsj 1:8a094db1347f 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
elijahsj 1:8a094db1347f 7 *
elijahsj 1:8a094db1347f 8 * Permission is hereby granted, free of charge, to any person obtaining a
elijahsj 1:8a094db1347f 9 * copy of this software and associated documentation files (the "Software"),
elijahsj 1:8a094db1347f 10 * to deal in the Software without restriction, including without limitation
elijahsj 1:8a094db1347f 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
elijahsj 1:8a094db1347f 12 * and/or sell copies of the Software, and to permit persons to whom the
elijahsj 1:8a094db1347f 13 * Software is furnished to do so, subject to the following conditions:
elijahsj 1:8a094db1347f 14 *
elijahsj 1:8a094db1347f 15 * The above copyright notice and this permission notice shall be included
elijahsj 1:8a094db1347f 16 * in all copies or substantial portions of the Software.
elijahsj 1:8a094db1347f 17 *
elijahsj 1:8a094db1347f 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
elijahsj 1:8a094db1347f 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
elijahsj 1:8a094db1347f 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
elijahsj 1:8a094db1347f 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
elijahsj 1:8a094db1347f 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
elijahsj 1:8a094db1347f 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
elijahsj 1:8a094db1347f 24 * OTHER DEALINGS IN THE SOFTWARE.
elijahsj 1:8a094db1347f 25 *
elijahsj 1:8a094db1347f 26 * Except as contained in this notice, the name of Maxim Integrated
elijahsj 1:8a094db1347f 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
elijahsj 1:8a094db1347f 28 * Products, Inc. Branding Policy.
elijahsj 1:8a094db1347f 29 *
elijahsj 1:8a094db1347f 30 * The mere transfer of this software does not imply any licenses
elijahsj 1:8a094db1347f 31 * of trade secrets, proprietary technology, copyrights, patents,
elijahsj 1:8a094db1347f 32 * trademarks, maskwork rights, or any other form of intellectual
elijahsj 1:8a094db1347f 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
elijahsj 1:8a094db1347f 34 * ownership rights.
elijahsj 1:8a094db1347f 35 *
elijahsj 1:8a094db1347f 36 * $Date: 2016-09-08 17:27:05 -0500 (Thu, 08 Sep 2016) $
elijahsj 1:8a094db1347f 37 * $Revision: 24321 $
elijahsj 1:8a094db1347f 38 *
elijahsj 1:8a094db1347f 39 **************************************************************************** */
elijahsj 1:8a094db1347f 40
elijahsj 1:8a094db1347f 41 /* **** Includes **** */
elijahsj 1:8a094db1347f 42 #include <stddef.h>
elijahsj 1:8a094db1347f 43 #include "wdt.h"
elijahsj 1:8a094db1347f 44 /**
elijahsj 1:8a094db1347f 45 * @ingroup wdt
elijahsj 1:8a094db1347f 46 * @{
elijahsj 1:8a094db1347f 47 */
elijahsj 1:8a094db1347f 48 static uint32_t interruptEnable = 0; //keeps track to interrupts to enable in start function
elijahsj 1:8a094db1347f 49
elijahsj 1:8a094db1347f 50 /* ************************************************************************* */
elijahsj 1:8a094db1347f 51 int WDT_Init(mxc_wdt_regs_t *wdt, const sys_cfg_wdt_t *cfg, uint8_t unlock_key)
elijahsj 1:8a094db1347f 52 {
elijahsj 1:8a094db1347f 53 if ((wdt == NULL) || (cfg == NULL))
elijahsj 1:8a094db1347f 54 return E_NULL_PTR;
elijahsj 1:8a094db1347f 55
elijahsj 1:8a094db1347f 56 //setup watchdog clock
elijahsj 1:8a094db1347f 57 SYS_WDT_Init(wdt, cfg);
elijahsj 1:8a094db1347f 58
elijahsj 1:8a094db1347f 59 //unlock ctrl to be writable
elijahsj 1:8a094db1347f 60 wdt->lock_ctrl = unlock_key;
elijahsj 1:8a094db1347f 61
elijahsj 1:8a094db1347f 62 //check to make sure it unlocked
elijahsj 1:8a094db1347f 63 if (wdt->lock_ctrl & 0x01)
elijahsj 1:8a094db1347f 64 return E_BAD_STATE;
elijahsj 1:8a094db1347f 65
elijahsj 1:8a094db1347f 66 //disable all interrupts
elijahsj 1:8a094db1347f 67 interruptEnable = 0;
elijahsj 1:8a094db1347f 68 wdt->enable = interruptEnable;
elijahsj 1:8a094db1347f 69
elijahsj 1:8a094db1347f 70 //enable the watchdog clock and clear all other settings
elijahsj 1:8a094db1347f 71 wdt->ctrl = MXC_F_WDT_CTRL_EN_CLOCK;
elijahsj 1:8a094db1347f 72
elijahsj 1:8a094db1347f 73 //clear all interrupt flags
elijahsj 1:8a094db1347f 74 wdt->flags = WDT_FLAGS_CLEAR_ALL;
elijahsj 1:8a094db1347f 75
elijahsj 1:8a094db1347f 76 //lock ctrl to read-only
elijahsj 1:8a094db1347f 77 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
elijahsj 1:8a094db1347f 78
elijahsj 1:8a094db1347f 79 return E_NO_ERROR;
elijahsj 1:8a094db1347f 80 }
elijahsj 1:8a094db1347f 81
elijahsj 1:8a094db1347f 82 /* ************************************************************************* */
elijahsj 1:8a094db1347f 83 int WDT_EnableInt(mxc_wdt_regs_t *wdt, wdt_period_t int_period, uint8_t unlock_key)
elijahsj 1:8a094db1347f 84 {
elijahsj 1:8a094db1347f 85 //unlock ctrl to be writable
elijahsj 1:8a094db1347f 86 wdt->lock_ctrl = unlock_key;
elijahsj 1:8a094db1347f 87
elijahsj 1:8a094db1347f 88 //check to make sure it unlocked
elijahsj 1:8a094db1347f 89 if (wdt->lock_ctrl & 0x01)
elijahsj 1:8a094db1347f 90 return E_BAD_STATE;
elijahsj 1:8a094db1347f 91
elijahsj 1:8a094db1347f 92 //stop timer and clear interval period
elijahsj 1:8a094db1347f 93 wdt->ctrl &= ~(MXC_F_WDT_CTRL_INT_PERIOD | MXC_F_WDT_CTRL_EN_TIMER);
elijahsj 1:8a094db1347f 94
elijahsj 1:8a094db1347f 95 //set interval period
elijahsj 1:8a094db1347f 96 wdt->ctrl |= (int_period << MXC_F_WDT_CTRL_INT_PERIOD_POS);
elijahsj 1:8a094db1347f 97
elijahsj 1:8a094db1347f 98 //enable timeout interrupt
elijahsj 1:8a094db1347f 99 interruptEnable |= MXC_F_WDT_ENABLE_TIMEOUT;
elijahsj 1:8a094db1347f 100
elijahsj 1:8a094db1347f 101 //lock ctrl to read-only
elijahsj 1:8a094db1347f 102 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
elijahsj 1:8a094db1347f 103
elijahsj 1:8a094db1347f 104 return E_NO_ERROR;
elijahsj 1:8a094db1347f 105 }
elijahsj 1:8a094db1347f 106
elijahsj 1:8a094db1347f 107 /* ************************************************************************* */
elijahsj 1:8a094db1347f 108 int WDT_DisableInt(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
elijahsj 1:8a094db1347f 109 {
elijahsj 1:8a094db1347f 110 //unlock register to be writable
elijahsj 1:8a094db1347f 111 wdt->lock_ctrl = unlock_key;
elijahsj 1:8a094db1347f 112
elijahsj 1:8a094db1347f 113 //check to make sure it unlocked
elijahsj 1:8a094db1347f 114 if (wdt->lock_ctrl & 0x01)
elijahsj 1:8a094db1347f 115 return E_BAD_STATE;
elijahsj 1:8a094db1347f 116
elijahsj 1:8a094db1347f 117 //disable timeout interrupt
elijahsj 1:8a094db1347f 118 interruptEnable &= ~MXC_F_WDT_ENABLE_TIMEOUT;
elijahsj 1:8a094db1347f 119 wdt->enable = interruptEnable;
elijahsj 1:8a094db1347f 120
elijahsj 1:8a094db1347f 121 //lock register to read-only
elijahsj 1:8a094db1347f 122 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
elijahsj 1:8a094db1347f 123
elijahsj 1:8a094db1347f 124 return E_NO_ERROR;
elijahsj 1:8a094db1347f 125 }
elijahsj 1:8a094db1347f 126
elijahsj 1:8a094db1347f 127 /* ************************************************************************* */
elijahsj 1:8a094db1347f 128 int WDT_EnableWait(mxc_wdt_regs_t *wdt, wdt_period_t wait_period, uint8_t unlock_key)
elijahsj 1:8a094db1347f 129 {
elijahsj 1:8a094db1347f 130 // Make sure wait_period is valid
elijahsj 1:8a094db1347f 131 if (wait_period >= WDT_PERIOD_MAX)
elijahsj 1:8a094db1347f 132 return E_INVALID;
elijahsj 1:8a094db1347f 133
elijahsj 1:8a094db1347f 134 //unlock ctrl to be writable
elijahsj 1:8a094db1347f 135 wdt->lock_ctrl = unlock_key;
elijahsj 1:8a094db1347f 136
elijahsj 1:8a094db1347f 137 //check to make sure it unlocked
elijahsj 1:8a094db1347f 138 if (wdt->lock_ctrl & 0x01)
elijahsj 1:8a094db1347f 139 return E_BAD_STATE;
elijahsj 1:8a094db1347f 140
elijahsj 1:8a094db1347f 141 //stop timer and clear wait period
elijahsj 1:8a094db1347f 142 wdt->ctrl &= ~(MXC_F_WDT_CTRL_WAIT_PERIOD | MXC_F_WDT_CTRL_EN_TIMER);
elijahsj 1:8a094db1347f 143
elijahsj 1:8a094db1347f 144 //set wait period
elijahsj 1:8a094db1347f 145 wdt->ctrl |= (wait_period << MXC_F_WDT_CTRL_WAIT_PERIOD_POS);
elijahsj 1:8a094db1347f 146
elijahsj 1:8a094db1347f 147 //enable wait interrupt
elijahsj 1:8a094db1347f 148 interruptEnable |= MXC_F_WDT_ENABLE_PRE_WIN;
elijahsj 1:8a094db1347f 149
elijahsj 1:8a094db1347f 150 //lock ctrl to read-only
elijahsj 1:8a094db1347f 151 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
elijahsj 1:8a094db1347f 152
elijahsj 1:8a094db1347f 153 return E_NO_ERROR;
elijahsj 1:8a094db1347f 154 }
elijahsj 1:8a094db1347f 155
elijahsj 1:8a094db1347f 156 /* ************************************************************************* */
elijahsj 1:8a094db1347f 157 int WDT_DisableWait(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
elijahsj 1:8a094db1347f 158 {
elijahsj 1:8a094db1347f 159 //unlock register to be writable
elijahsj 1:8a094db1347f 160 wdt->lock_ctrl = unlock_key;
elijahsj 1:8a094db1347f 161
elijahsj 1:8a094db1347f 162 //check to make sure it unlocked
elijahsj 1:8a094db1347f 163 if (wdt->lock_ctrl & 0x01)
elijahsj 1:8a094db1347f 164 return E_BAD_STATE;
elijahsj 1:8a094db1347f 165
elijahsj 1:8a094db1347f 166 //disable wait interrupt
elijahsj 1:8a094db1347f 167 interruptEnable &= ~MXC_F_WDT_ENABLE_PRE_WIN;
elijahsj 1:8a094db1347f 168 wdt->enable = interruptEnable;
elijahsj 1:8a094db1347f 169
elijahsj 1:8a094db1347f 170 //lock register to read-only
elijahsj 1:8a094db1347f 171 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
elijahsj 1:8a094db1347f 172
elijahsj 1:8a094db1347f 173 return E_NO_ERROR;
elijahsj 1:8a094db1347f 174 }
elijahsj 1:8a094db1347f 175
elijahsj 1:8a094db1347f 176 /* ************************************************************************* */
elijahsj 1:8a094db1347f 177 int WDT_EnableReset(mxc_wdt_regs_t *wdt, wdt_period_t rst_period, uint8_t unlock_key)
elijahsj 1:8a094db1347f 178 {
elijahsj 1:8a094db1347f 179 // Make sure wait_period is valid
elijahsj 1:8a094db1347f 180 if (rst_period >= WDT_PERIOD_MAX)
elijahsj 1:8a094db1347f 181 return E_INVALID;
elijahsj 1:8a094db1347f 182
elijahsj 1:8a094db1347f 183 //unlock ctrl to be writable
elijahsj 1:8a094db1347f 184 wdt->lock_ctrl = unlock_key;
elijahsj 1:8a094db1347f 185
elijahsj 1:8a094db1347f 186 //check to make sure it unlocked
elijahsj 1:8a094db1347f 187 if (wdt->lock_ctrl & 0x01)
elijahsj 1:8a094db1347f 188 return E_BAD_STATE;
elijahsj 1:8a094db1347f 189
elijahsj 1:8a094db1347f 190 //stop timer and clear reset period
elijahsj 1:8a094db1347f 191 wdt->ctrl &= ~(MXC_F_WDT_CTRL_RST_PERIOD | MXC_F_WDT_CTRL_EN_TIMER);
elijahsj 1:8a094db1347f 192
elijahsj 1:8a094db1347f 193 //set reset period
elijahsj 1:8a094db1347f 194 wdt->ctrl |= (rst_period << MXC_F_WDT_CTRL_RST_PERIOD_POS);
elijahsj 1:8a094db1347f 195
elijahsj 1:8a094db1347f 196 //enable reset0
elijahsj 1:8a094db1347f 197 interruptEnable |= MXC_F_WDT_ENABLE_RESET_OUT;
elijahsj 1:8a094db1347f 198
elijahsj 1:8a094db1347f 199 //lock ctrl to read-only
elijahsj 1:8a094db1347f 200 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
elijahsj 1:8a094db1347f 201
elijahsj 1:8a094db1347f 202 return E_NO_ERROR;
elijahsj 1:8a094db1347f 203 }
elijahsj 1:8a094db1347f 204
elijahsj 1:8a094db1347f 205 /* ************************************************************************* */
elijahsj 1:8a094db1347f 206 int WDT_DisableReset(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
elijahsj 1:8a094db1347f 207 {
elijahsj 1:8a094db1347f 208 //unlock register to be writable
elijahsj 1:8a094db1347f 209 wdt->lock_ctrl = unlock_key;
elijahsj 1:8a094db1347f 210
elijahsj 1:8a094db1347f 211 //check to make sure it unlocked
elijahsj 1:8a094db1347f 212 if (wdt->lock_ctrl & 0x01)
elijahsj 1:8a094db1347f 213 return E_BAD_STATE;
elijahsj 1:8a094db1347f 214
elijahsj 1:8a094db1347f 215 //disable reset0
elijahsj 1:8a094db1347f 216 interruptEnable &= ~MXC_F_WDT_ENABLE_RESET_OUT;
elijahsj 1:8a094db1347f 217 wdt->enable = interruptEnable;
elijahsj 1:8a094db1347f 218
elijahsj 1:8a094db1347f 219 //lock register to read-only
elijahsj 1:8a094db1347f 220 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
elijahsj 1:8a094db1347f 221
elijahsj 1:8a094db1347f 222 return E_NO_ERROR;
elijahsj 1:8a094db1347f 223 }
elijahsj 1:8a094db1347f 224
elijahsj 1:8a094db1347f 225 /* ************************************************************************* */
elijahsj 1:8a094db1347f 226 int WDT_Start(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
elijahsj 1:8a094db1347f 227 {
elijahsj 1:8a094db1347f 228 //check if watchdog is already running
elijahsj 1:8a094db1347f 229 if(WDT_IsActive(wdt))
elijahsj 1:8a094db1347f 230 return E_BAD_STATE;
elijahsj 1:8a094db1347f 231
elijahsj 1:8a094db1347f 232 //unlock ctrl to be writable
elijahsj 1:8a094db1347f 233 wdt->lock_ctrl = unlock_key;
elijahsj 1:8a094db1347f 234
elijahsj 1:8a094db1347f 235 //check to make sure it unlocked
elijahsj 1:8a094db1347f 236 if (wdt->lock_ctrl & 0x01)
elijahsj 1:8a094db1347f 237 return E_BAD_STATE;
elijahsj 1:8a094db1347f 238
elijahsj 1:8a094db1347f 239 WDT_Reset(wdt);
elijahsj 1:8a094db1347f 240
elijahsj 1:8a094db1347f 241 //enable interrupts
elijahsj 1:8a094db1347f 242 wdt->enable = interruptEnable;
elijahsj 1:8a094db1347f 243
elijahsj 1:8a094db1347f 244 //start timer
elijahsj 1:8a094db1347f 245 wdt->ctrl |= MXC_F_WDT_CTRL_EN_TIMER;
elijahsj 1:8a094db1347f 246
elijahsj 1:8a094db1347f 247 //lock ctrl to read-only
elijahsj 1:8a094db1347f 248 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
elijahsj 1:8a094db1347f 249
elijahsj 1:8a094db1347f 250 return E_NO_ERROR;
elijahsj 1:8a094db1347f 251 }
elijahsj 1:8a094db1347f 252
elijahsj 1:8a094db1347f 253 /* ************************************************************************* */
elijahsj 1:8a094db1347f 254 void WDT_Reset(mxc_wdt_regs_t *wdt)
elijahsj 1:8a094db1347f 255 {
elijahsj 1:8a094db1347f 256 //reset the watchdog counter
elijahsj 1:8a094db1347f 257 wdt->clear = MXC_V_WDT_RESET_KEY_0;
elijahsj 1:8a094db1347f 258 wdt->clear = MXC_V_WDT_RESET_KEY_1;
elijahsj 1:8a094db1347f 259
elijahsj 1:8a094db1347f 260 //clear all interrupt flags
elijahsj 1:8a094db1347f 261 wdt->flags = WDT_FLAGS_CLEAR_ALL;
elijahsj 1:8a094db1347f 262
elijahsj 1:8a094db1347f 263 //wait for all interrupts to clear
elijahsj 1:8a094db1347f 264 while(wdt->flags != 0) {
elijahsj 1:8a094db1347f 265 wdt->flags = WDT_FLAGS_CLEAR_ALL;
elijahsj 1:8a094db1347f 266 }
elijahsj 1:8a094db1347f 267
elijahsj 1:8a094db1347f 268 return;
elijahsj 1:8a094db1347f 269 }
elijahsj 1:8a094db1347f 270
elijahsj 1:8a094db1347f 271 /* ************************************************************************* */
elijahsj 1:8a094db1347f 272 int WDT_Stop(mxc_wdt_regs_t *wdt, uint8_t unlock_key)
elijahsj 1:8a094db1347f 273 {
elijahsj 1:8a094db1347f 274 //unlock ctrl to be writable
elijahsj 1:8a094db1347f 275 wdt->lock_ctrl = unlock_key;
elijahsj 1:8a094db1347f 276
elijahsj 1:8a094db1347f 277 //check to make sure it unlocked
elijahsj 1:8a094db1347f 278 if (wdt->lock_ctrl & 0x01)
elijahsj 1:8a094db1347f 279 return E_BAD_STATE;
elijahsj 1:8a094db1347f 280
elijahsj 1:8a094db1347f 281 //disabled the timer and interrupts
elijahsj 1:8a094db1347f 282 wdt->enable = 0;
elijahsj 1:8a094db1347f 283 wdt->ctrl &= ~(MXC_F_WDT_CTRL_EN_TIMER);
elijahsj 1:8a094db1347f 284
elijahsj 1:8a094db1347f 285 //lock ctrl to read-only
elijahsj 1:8a094db1347f 286 wdt->lock_ctrl = MXC_V_WDT_LOCK_KEY;
elijahsj 1:8a094db1347f 287
elijahsj 1:8a094db1347f 288 return E_NO_ERROR;
elijahsj 1:8a094db1347f 289 }
elijahsj 1:8a094db1347f 290 /**@} end of ingroup wdt */