test

Committer:
elijahsj
Date:
Mon Nov 09 00:33:19 2020 -0500
Revision:
2:4364577b5ad8
Parent:
1:8a094db1347f
copied mbed library

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elijahsj 1:8a094db1347f 1 /**
elijahsj 1:8a094db1347f 2 * @file
elijahsj 1:8a094db1347f 3 * @brief This file contains the function implementations for the Flash
elijahsj 1:8a094db1347f 4 * Controller (FLC) peripheral module.
elijahsj 1:8a094db1347f 5 */
elijahsj 1:8a094db1347f 6
elijahsj 1:8a094db1347f 7 /* ****************************************************************************
elijahsj 1:8a094db1347f 8 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
elijahsj 1:8a094db1347f 9 *
elijahsj 1:8a094db1347f 10 * Permission is hereby granted, free of charge, to any person obtaining a
elijahsj 1:8a094db1347f 11 * copy of this software and associated documentation files (the "Software"),
elijahsj 1:8a094db1347f 12 * to deal in the Software without restriction, including without limitation
elijahsj 1:8a094db1347f 13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
elijahsj 1:8a094db1347f 14 * and/or sell copies of the Software, and to permit persons to whom the
elijahsj 1:8a094db1347f 15 * Software is furnished to do so, subject to the following conditions:
elijahsj 1:8a094db1347f 16 *
elijahsj 1:8a094db1347f 17 * The above copyright notice and this permission notice shall be included
elijahsj 1:8a094db1347f 18 * in all copies or substantial portions of the Software.
elijahsj 1:8a094db1347f 19 *
elijahsj 1:8a094db1347f 20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
elijahsj 1:8a094db1347f 21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
elijahsj 1:8a094db1347f 22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
elijahsj 1:8a094db1347f 23 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
elijahsj 1:8a094db1347f 24 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
elijahsj 1:8a094db1347f 25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
elijahsj 1:8a094db1347f 26 * OTHER DEALINGS IN THE SOFTWARE.
elijahsj 1:8a094db1347f 27 *
elijahsj 1:8a094db1347f 28 * Except as contained in this notice, the name of Maxim Integrated
elijahsj 1:8a094db1347f 29 * Products, Inc. shall not be used except as stated in the Maxim Integrated
elijahsj 1:8a094db1347f 30 * Products, Inc. Branding Policy.
elijahsj 1:8a094db1347f 31 *
elijahsj 1:8a094db1347f 32 * The mere transfer of this software does not imply any licenses
elijahsj 1:8a094db1347f 33 * of trade secrets, proprietary technology, copyrights, patents,
elijahsj 1:8a094db1347f 34 * trademarks, maskwork rights, or any other form of intellectual
elijahsj 1:8a094db1347f 35 * property whatsoever. Maxim Integrated Products, Inc. retains all
elijahsj 1:8a094db1347f 36 * ownership rights.
elijahsj 1:8a094db1347f 37 *
elijahsj 1:8a094db1347f 38 * $Date: 2016-09-09 11:48:21 -0500 (Fri, 09 Sep 2016) $
elijahsj 1:8a094db1347f 39 * $Revision: 24338 $
elijahsj 1:8a094db1347f 40 *
elijahsj 1:8a094db1347f 41 *************************************************************************** */
elijahsj 1:8a094db1347f 42
elijahsj 1:8a094db1347f 43 /* **** Includes **** */
elijahsj 1:8a094db1347f 44 #include "mxc_config.h"
elijahsj 1:8a094db1347f 45 #include "flc.h"
elijahsj 1:8a094db1347f 46
elijahsj 1:8a094db1347f 47
elijahsj 1:8a094db1347f 48 /**
elijahsj 1:8a094db1347f 49 * @ingroup flc
elijahsj 1:8a094db1347f 50 * @{
elijahsj 1:8a094db1347f 51 */
elijahsj 1:8a094db1347f 52
elijahsj 1:8a094db1347f 53 /* **** Definitions **** */
elijahsj 1:8a094db1347f 54
elijahsj 1:8a094db1347f 55 /* **** Globals **** */
elijahsj 1:8a094db1347f 56
elijahsj 1:8a094db1347f 57 /* **** Functions **** */
elijahsj 1:8a094db1347f 58
elijahsj 1:8a094db1347f 59 /* ************************************************************************* */
elijahsj 1:8a094db1347f 60 #if defined ( __GNUC__ )
elijahsj 1:8a094db1347f 61 #undef IAR_PRAGMAS //Make sure this is not defined for GCC
elijahsj 1:8a094db1347f 62 #endif
elijahsj 1:8a094db1347f 63
elijahsj 1:8a094db1347f 64 #if IAR_PRAGMAS
elijahsj 1:8a094db1347f 65 // IAR memory section declaration for the in-system flash programming functions to be loaded in RAM.
elijahsj 1:8a094db1347f 66 #pragma section=".flashprog"
elijahsj 1:8a094db1347f 67 #endif
elijahsj 1:8a094db1347f 68 #if defined ( __GNUC__ )
elijahsj 1:8a094db1347f 69 __attribute__ ((section(".flashprog")))
elijahsj 1:8a094db1347f 70 #endif
elijahsj 1:8a094db1347f 71 /**
elijahsj 1:8a094db1347f 72 * @brief Return the status of the busy state of the flash controller.
elijahsj 1:8a094db1347f 73 *
elijahsj 1:8a094db1347f 74 * @return 0 Flash Controller is idle.
elijahsj 1:8a094db1347f 75 * @return Non-zero indicates the flash controller is performing an
elijahsj 1:8a094db1347f 76 * erase or write request.
elijahsj 1:8a094db1347f 77 */
elijahsj 1:8a094db1347f 78 __STATIC_INLINE int FLC_Busy(void)
elijahsj 1:8a094db1347f 79 {
elijahsj 1:8a094db1347f 80 return (MXC_FLC->ctrl & (MXC_F_FLC_CTRL_WRITE | MXC_F_FLC_CTRL_MASS_ERASE | MXC_F_FLC_CTRL_PAGE_ERASE));
elijahsj 1:8a094db1347f 81 }
elijahsj 1:8a094db1347f 82
elijahsj 1:8a094db1347f 83 /* ************************************************************************* */
elijahsj 1:8a094db1347f 84 #if IAR_PRAGMAS
elijahsj 1:8a094db1347f 85 // IAR memory section declaration for the in-system flash programming functions to be loaded in RAM.
elijahsj 1:8a094db1347f 86 #pragma section=".flashprog"
elijahsj 1:8a094db1347f 87 #endif
elijahsj 1:8a094db1347f 88 #if defined ( __GNUC__ )
elijahsj 1:8a094db1347f 89 __attribute__ ((section(".flashprog")))
elijahsj 1:8a094db1347f 90 #endif
elijahsj 1:8a094db1347f 91 int FLC_Init(void)
elijahsj 1:8a094db1347f 92 {
elijahsj 1:8a094db1347f 93 /* Check if the flash controller is busy */
elijahsj 1:8a094db1347f 94 if (FLC_Busy()) {
elijahsj 1:8a094db1347f 95 return E_BUSY;
elijahsj 1:8a094db1347f 96 }
elijahsj 1:8a094db1347f 97
elijahsj 1:8a094db1347f 98 /* Enable automatic calculation of the clock divider to generate a 1MHz clock from the APB clock */
elijahsj 1:8a094db1347f 99 MXC_FLC->perform |= MXC_F_FLC_PERFORM_AUTO_CLKDIV;
elijahsj 1:8a094db1347f 100
elijahsj 1:8a094db1347f 101 /* The flash controller will stall any reads while flash operations are in
elijahsj 1:8a094db1347f 102 * progress. Disable the legacy failure detection logic that would flag reads
elijahsj 1:8a094db1347f 103 * during flash operations as errors.
elijahsj 1:8a094db1347f 104 */
elijahsj 1:8a094db1347f 105 MXC_FLC->perform |= MXC_F_FLC_PERFORM_EN_PREVENT_FAIL;
elijahsj 1:8a094db1347f 106
elijahsj 1:8a094db1347f 107 return E_NO_ERROR;
elijahsj 1:8a094db1347f 108 }
elijahsj 1:8a094db1347f 109
elijahsj 1:8a094db1347f 110 /* ************************************************************************* */
elijahsj 1:8a094db1347f 111 #if IAR_PRAGMAS
elijahsj 1:8a094db1347f 112 // IAR memory section declaration for the in-system flash programming functions to be loaded in RAM.
elijahsj 1:8a094db1347f 113 #pragma section=".flashprog"
elijahsj 1:8a094db1347f 114 #endif
elijahsj 1:8a094db1347f 115 #if defined ( __GNUC__ )
elijahsj 1:8a094db1347f 116 __attribute__ ((section(".flashprog")))
elijahsj 1:8a094db1347f 117 #endif
elijahsj 1:8a094db1347f 118 int FLC_PageErase(uint32_t address, uint8_t erase_code, uint8_t unlock_key)
elijahsj 1:8a094db1347f 119 {
elijahsj 1:8a094db1347f 120 /* Check if the flash controller is busy */
elijahsj 1:8a094db1347f 121 if (FLC_Busy()) {
elijahsj 1:8a094db1347f 122 return E_BUSY;
elijahsj 1:8a094db1347f 123 }
elijahsj 1:8a094db1347f 124
elijahsj 1:8a094db1347f 125 /* Clear stale errors. Interrupt flags can only be written to zero, so this is safe */
elijahsj 1:8a094db1347f 126 MXC_FLC->intr &= ~MXC_F_FLC_INTR_FAILED_IF;
elijahsj 1:8a094db1347f 127
elijahsj 1:8a094db1347f 128 /* Unlock flash */
elijahsj 1:8a094db1347f 129 MXC_FLC->ctrl = (MXC_FLC->ctrl & ~MXC_F_FLC_CTRL_FLSH_UNLOCK) |
elijahsj 1:8a094db1347f 130 ((unlock_key << MXC_F_FLC_CTRL_FLSH_UNLOCK_POS) & MXC_F_FLC_CTRL_FLSH_UNLOCK);
elijahsj 1:8a094db1347f 131
elijahsj 1:8a094db1347f 132 /* Write the Erase Code */
elijahsj 1:8a094db1347f 133 MXC_FLC->ctrl = (MXC_FLC->ctrl & ~MXC_F_FLC_CTRL_ERASE_CODE) |
elijahsj 1:8a094db1347f 134 ((erase_code << MXC_F_FLC_CTRL_ERASE_CODE_POS) & MXC_F_FLC_CTRL_ERASE_CODE);
elijahsj 1:8a094db1347f 135
elijahsj 1:8a094db1347f 136 /* Erase the request page */
elijahsj 1:8a094db1347f 137 MXC_FLC->faddr = address;
elijahsj 1:8a094db1347f 138 MXC_FLC->ctrl |= MXC_F_FLC_CTRL_PAGE_ERASE;
elijahsj 1:8a094db1347f 139
elijahsj 1:8a094db1347f 140 /* Wait until flash operation is complete */
elijahsj 1:8a094db1347f 141 while (FLC_Busy());
elijahsj 1:8a094db1347f 142
elijahsj 1:8a094db1347f 143 /* Lock flash */
elijahsj 1:8a094db1347f 144 MXC_FLC->ctrl &= ~(MXC_F_FLC_CTRL_FLSH_UNLOCK | MXC_F_FLC_CTRL_ERASE_CODE);
elijahsj 1:8a094db1347f 145
elijahsj 1:8a094db1347f 146 /* Check for failures */
elijahsj 1:8a094db1347f 147 if (MXC_FLC->intr & MXC_F_FLC_INTR_FAILED_IF) {
elijahsj 1:8a094db1347f 148 /* Interrupt flags can only be written to zero, so this is safe */
elijahsj 1:8a094db1347f 149 MXC_FLC->intr &= ~MXC_F_FLC_INTR_FAILED_IF;
elijahsj 1:8a094db1347f 150 return E_UNKNOWN;
elijahsj 1:8a094db1347f 151 }
elijahsj 1:8a094db1347f 152
elijahsj 1:8a094db1347f 153 return E_NO_ERROR;
elijahsj 1:8a094db1347f 154 }
elijahsj 1:8a094db1347f 155
elijahsj 1:8a094db1347f 156 /* ************************************************************************* */
elijahsj 1:8a094db1347f 157 #if IAR_PRAGMAS
elijahsj 1:8a094db1347f 158 // IAR memory section declaration for the in-system flash programming functions to be loaded in RAM.
elijahsj 1:8a094db1347f 159 #pragma section=".flashprog"
elijahsj 1:8a094db1347f 160 #endif
elijahsj 1:8a094db1347f 161 #if defined ( __GNUC__ )
elijahsj 1:8a094db1347f 162 __attribute__ ((section(".flashprog")))
elijahsj 1:8a094db1347f 163 #endif
elijahsj 1:8a094db1347f 164 int FLC_Write(uint32_t address, const void *data, uint32_t length, uint8_t unlock_key)
elijahsj 1:8a094db1347f 165 {
elijahsj 1:8a094db1347f 166 uint32_t *ptr = (uint32_t*)data;
elijahsj 1:8a094db1347f 167
elijahsj 1:8a094db1347f 168 /* Can only write in full word units */
elijahsj 1:8a094db1347f 169 if ((address & 3) || (length & 3)) {
elijahsj 1:8a094db1347f 170 return E_BAD_PARAM;
elijahsj 1:8a094db1347f 171 }
elijahsj 1:8a094db1347f 172
elijahsj 1:8a094db1347f 173 if (length == 0) {
elijahsj 1:8a094db1347f 174 /* Nothing to do */
elijahsj 1:8a094db1347f 175 return E_NO_ERROR;
elijahsj 1:8a094db1347f 176 }
elijahsj 1:8a094db1347f 177
elijahsj 1:8a094db1347f 178 /* Check if the flash controller is busy */
elijahsj 1:8a094db1347f 179 if (FLC_Busy()) {
elijahsj 1:8a094db1347f 180 return E_BUSY;
elijahsj 1:8a094db1347f 181 }
elijahsj 1:8a094db1347f 182
elijahsj 1:8a094db1347f 183 /* Clear stale errors. Interrupt flags can only be written to zero, so this is safe */
elijahsj 1:8a094db1347f 184 MXC_FLC->intr &= ~MXC_F_FLC_INTR_FAILED_IF;
elijahsj 1:8a094db1347f 185
elijahsj 1:8a094db1347f 186 /* Unlock flash */
elijahsj 1:8a094db1347f 187 MXC_FLC->ctrl = (MXC_FLC->ctrl & ~MXC_F_FLC_CTRL_FLSH_UNLOCK) |
elijahsj 1:8a094db1347f 188 ((unlock_key << MXC_F_FLC_CTRL_FLSH_UNLOCK_POS) & MXC_F_FLC_CTRL_FLSH_UNLOCK);
elijahsj 1:8a094db1347f 189
elijahsj 1:8a094db1347f 190 /* Set the address to write and enable auto increment */
elijahsj 1:8a094db1347f 191 MXC_FLC->faddr = address;
elijahsj 1:8a094db1347f 192 MXC_FLC->ctrl |= MXC_F_FLC_CTRL_AUTO_INCRE_MODE;
elijahsj 1:8a094db1347f 193 uint32_t write_cmd = MXC_FLC->ctrl | MXC_F_FLC_CTRL_WRITE;
elijahsj 1:8a094db1347f 194
elijahsj 1:8a094db1347f 195 for (; length > 0; length -= 4) {
elijahsj 1:8a094db1347f 196 /* Perform the write */
elijahsj 1:8a094db1347f 197 MXC_FLC->fdata = *ptr++;
elijahsj 1:8a094db1347f 198 MXC_FLC->ctrl = write_cmd;
elijahsj 1:8a094db1347f 199 while (FLC_Busy());
elijahsj 1:8a094db1347f 200 }
elijahsj 1:8a094db1347f 201
elijahsj 1:8a094db1347f 202 /* Lock flash */
elijahsj 1:8a094db1347f 203 MXC_FLC->ctrl &= ~MXC_F_FLC_CTRL_FLSH_UNLOCK;
elijahsj 1:8a094db1347f 204
elijahsj 1:8a094db1347f 205 /* Check for failures */
elijahsj 1:8a094db1347f 206 if (MXC_FLC->intr & MXC_F_FLC_INTR_FAILED_IF) {
elijahsj 1:8a094db1347f 207 /* Interrupt flags can only be written to zero, so this is safe */
elijahsj 1:8a094db1347f 208 MXC_FLC->intr &= ~MXC_F_FLC_INTR_FAILED_IF;
elijahsj 1:8a094db1347f 209 return E_UNKNOWN;
elijahsj 1:8a094db1347f 210 }
elijahsj 1:8a094db1347f 211
elijahsj 1:8a094db1347f 212 return E_NO_ERROR;
elijahsj 1:8a094db1347f 213 }
elijahsj 1:8a094db1347f 214
elijahsj 1:8a094db1347f 215 /* ************************************************************************* */
elijahsj 1:8a094db1347f 216 #if IAR_PRAGMAS
elijahsj 1:8a094db1347f 217 // IAR memory section declaration for the in-system flash programming functions to be loaded in RAM.
elijahsj 1:8a094db1347f 218 #pragma section=".flashprog"
elijahsj 1:8a094db1347f 219 #endif
elijahsj 1:8a094db1347f 220 #if defined ( __GNUC__ )
elijahsj 1:8a094db1347f 221 __attribute__ ((section(".flashprog")))
elijahsj 1:8a094db1347f 222 #endif
elijahsj 1:8a094db1347f 223 int FLC_MassErase(uint8_t erase_code, uint8_t unlock_key)
elijahsj 1:8a094db1347f 224 {
elijahsj 1:8a094db1347f 225 /* Check if the flash controller is busy */
elijahsj 1:8a094db1347f 226 if (FLC_Busy()) {
elijahsj 1:8a094db1347f 227 return E_BUSY;
elijahsj 1:8a094db1347f 228 }
elijahsj 1:8a094db1347f 229
elijahsj 1:8a094db1347f 230 /* Clear stale errors. Interrupt flags can only be written to zero, so this is safe */
elijahsj 1:8a094db1347f 231 MXC_FLC->intr &= ~MXC_F_FLC_INTR_FAILED_IF;
elijahsj 1:8a094db1347f 232
elijahsj 1:8a094db1347f 233 /* Unlock flash */
elijahsj 1:8a094db1347f 234 MXC_FLC->ctrl = (MXC_FLC->ctrl & ~MXC_F_FLC_CTRL_FLSH_UNLOCK) |
elijahsj 1:8a094db1347f 235 ((unlock_key << MXC_F_FLC_CTRL_FLSH_UNLOCK_POS) & MXC_F_FLC_CTRL_FLSH_UNLOCK);
elijahsj 1:8a094db1347f 236
elijahsj 1:8a094db1347f 237 /* Write the Erase Code */
elijahsj 1:8a094db1347f 238 MXC_FLC->ctrl = (MXC_FLC->ctrl & ~MXC_F_FLC_CTRL_ERASE_CODE) |
elijahsj 1:8a094db1347f 239 ((erase_code << MXC_F_FLC_CTRL_ERASE_CODE_POS) & MXC_F_FLC_CTRL_ERASE_CODE);
elijahsj 1:8a094db1347f 240
elijahsj 1:8a094db1347f 241 /* Start the mass erase */
elijahsj 1:8a094db1347f 242 MXC_FLC->ctrl |= MXC_F_FLC_CTRL_MASS_ERASE;
elijahsj 1:8a094db1347f 243
elijahsj 1:8a094db1347f 244 /* Wait until flash operation is complete */
elijahsj 1:8a094db1347f 245 while (FLC_Busy());
elijahsj 1:8a094db1347f 246
elijahsj 1:8a094db1347f 247 /* Lock flash */
elijahsj 1:8a094db1347f 248 MXC_FLC->ctrl &= ~(MXC_F_FLC_CTRL_FLSH_UNLOCK | MXC_F_FLC_CTRL_ERASE_CODE);
elijahsj 1:8a094db1347f 249
elijahsj 1:8a094db1347f 250 /* Check for failures */
elijahsj 1:8a094db1347f 251 if (MXC_FLC->intr & MXC_F_FLC_INTR_FAILED_IF) {
elijahsj 1:8a094db1347f 252 /* Interrupt flags can only be written to zero, so this is safe */
elijahsj 1:8a094db1347f 253 MXC_FLC->intr &= ~MXC_F_FLC_INTR_FAILED_IF;
elijahsj 1:8a094db1347f 254 return E_UNKNOWN;
elijahsj 1:8a094db1347f 255 }
elijahsj 1:8a094db1347f 256
elijahsj 1:8a094db1347f 257 return E_NO_ERROR;
elijahsj 1:8a094db1347f 258 }
elijahsj 1:8a094db1347f 259
elijahsj 1:8a094db1347f 260 /**@} end of group flc */