Elijah Stanger-Jones / mbed-dev-f303

test

targets/TARGET_Maxim/TARGET_MAX32630/mxc/adc.h@2:4364577b5ad8, 2020-11-09 (annotated)

Committer:
elijahsj
Date:
Mon Nov 09 00:33:19 2020 -0500
Revision:
2:4364577b5ad8
Parent:
1:8a094db1347f 
copied mbed library

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elijahsj 1:8a094db1347f 1 /**
elijahsj 1:8a094db1347f 2 * @file
elijahsj 1:8a094db1347f 3 * @brief Analog to Digital Converter function prototypes and data types.
elijahsj 1:8a094db1347f 4 */
elijahsj 1:8a094db1347f 5
elijahsj 1:8a094db1347f 6 /* ****************************************************************************
elijahsj 1:8a094db1347f 7 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
elijahsj 1:8a094db1347f 8 *
elijahsj 1:8a094db1347f 9 * Permission is hereby granted, free of charge, to any person obtaining a
elijahsj 1:8a094db1347f 10 * copy of this software and associated documentation files (the "Software"),
elijahsj 1:8a094db1347f 11 * to deal in the Software without restriction, including without limitation
elijahsj 1:8a094db1347f 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
elijahsj 1:8a094db1347f 13 * and/or sell copies of the Software, and to permit persons to whom the
elijahsj 1:8a094db1347f 14 * Software is furnished to do so, subject to the following conditions:
elijahsj 1:8a094db1347f 15 *
elijahsj 1:8a094db1347f 16 * The above copyright notice and this permission notice shall be included
elijahsj 1:8a094db1347f 17 * in all copies or substantial portions of the Software.
elijahsj 1:8a094db1347f 18 *
elijahsj 1:8a094db1347f 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
elijahsj 1:8a094db1347f 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
elijahsj 1:8a094db1347f 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
elijahsj 1:8a094db1347f 22 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
elijahsj 1:8a094db1347f 23 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
elijahsj 1:8a094db1347f 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
elijahsj 1:8a094db1347f 25 * OTHER DEALINGS IN THE SOFTWARE.
elijahsj 1:8a094db1347f 26 *
elijahsj 1:8a094db1347f 27 * Except as contained in this notice, the name of Maxim Integrated
elijahsj 1:8a094db1347f 28 * Products, Inc. shall not be used except as stated in the Maxim Integrated
elijahsj 1:8a094db1347f 29 * Products, Inc. Branding Policy.
elijahsj 1:8a094db1347f 30 *
elijahsj 1:8a094db1347f 31 * The mere transfer of this software does not imply any licenses
elijahsj 1:8a094db1347f 32 * of trade secrets, proprietary technology, copyrights, patents,
elijahsj 1:8a094db1347f 33 * trademarks, maskwork rights, or any other form of intellectual
elijahsj 1:8a094db1347f 34 * property whatsoever. Maxim Integrated Products, Inc. retains all
elijahsj 1:8a094db1347f 35 * ownership rights.
elijahsj 1:8a094db1347f 36 *
elijahsj 1:8a094db1347f 37 * $Date: 2016-10-07 14:53:52 -0500 (Fri, 07 Oct 2016) $
elijahsj 1:8a094db1347f 38 * $Revision: 24632 $
elijahsj 1:8a094db1347f 39 *
elijahsj 1:8a094db1347f 40 *************************************************************************** */
elijahsj 1:8a094db1347f 41
elijahsj 1:8a094db1347f 42 /* Define to prevent redundant inclusion */
elijahsj 1:8a094db1347f 43 #ifndef _ADC_H
elijahsj 1:8a094db1347f 44 #define _ADC_H
elijahsj 1:8a094db1347f 45
elijahsj 1:8a094db1347f 46 /* **** Includes **** */
elijahsj 1:8a094db1347f 47 #include <stdint.h>
elijahsj 1:8a094db1347f 48
elijahsj 1:8a094db1347f 49 /* Doxy group definition for this peripheral module */
elijahsj 1:8a094db1347f 50
elijahsj 1:8a094db1347f 51 /**
elijahsj 1:8a094db1347f 52 * @ingroup periphlibs
elijahsj 1:8a094db1347f 53 * @defgroup adc Analog to Digital Converter (ADC)
elijahsj 1:8a094db1347f 54 * @{
elijahsj 1:8a094db1347f 55 */
elijahsj 1:8a094db1347f 56
elijahsj 1:8a094db1347f 57 #include "adc_regs.h"
elijahsj 1:8a094db1347f 58
elijahsj 1:8a094db1347f 59 #ifdef __cplusplus
elijahsj 1:8a094db1347f 60 extern "C" {
elijahsj 1:8a094db1347f 61 #endif
elijahsj 1:8a094db1347f 62
elijahsj 1:8a094db1347f 63 /* **** Definitions **** */
elijahsj 1:8a094db1347f 64
elijahsj 1:8a094db1347f 65 /**
elijahsj 1:8a094db1347f 66 * Enumeration type for ADC Channel Selection. See \ref ADC_CHSEL_values "ADC Channel Select Values" for additional information.
elijahsj 1:8a094db1347f 67 */
elijahsj 1:8a094db1347f 68 typedef enum {
elijahsj 1:8a094db1347f 69 ADC_CH_0 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN0, /**< Channel 0 Select */
elijahsj 1:8a094db1347f 70 ADC_CH_1 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN1, /**< Channel 1 Select */
elijahsj 1:8a094db1347f 71 ADC_CH_2 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN2, /**< Channel 2 Select */
elijahsj 1:8a094db1347f 72 ADC_CH_3 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN3, /**< Channel 3 Select */
elijahsj 1:8a094db1347f 73 ADC_CH_0_DIV_5 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN0_DIV_5, /**< Channel 0 divided by 5 */
elijahsj 1:8a094db1347f 74 ADC_CH_1_DIV_5 = MXC_V_ADC_CTRL_ADC_CHSEL_AIN1_DIV_5, /**< Channel 1 divided by 5 */
elijahsj 1:8a094db1347f 75 ADC_CH_VDDB_DIV_4 = MXC_V_ADC_CTRL_ADC_CHSEL_VDDB_DIV_4, /**< VDDB divided by 4 */
elijahsj 1:8a094db1347f 76 ADC_CH_VDD18 = MXC_V_ADC_CTRL_ADC_CHSEL_VDD18, /**< VDD18 input select */
elijahsj 1:8a094db1347f 77 ADC_CH_VDD12 = MXC_V_ADC_CTRL_ADC_CHSEL_VDD12, /**< VDD12 input select */
elijahsj 1:8a094db1347f 78 ADC_CH_VRTC_DIV_2 = MXC_V_ADC_CTRL_ADC_CHSEL_VRTC_DIV_2, /**< VRTC divided by 2 */
elijahsj 1:8a094db1347f 79 ADC_CH_TMON = MXC_V_ADC_CTRL_ADC_CHSEL_TMON, /**< TMON input select */
elijahsj 1:8a094db1347f 80 #if (MXC_ADC_REV > 0)
elijahsj 1:8a094db1347f 81 ADC_CH_VDDIO_DIV_4 = MXC_V_ADC_CTRL_ADC_CHSEL_VDDIO_DIV_4, /**< VDDIO divided by 4 select */
elijahsj 1:8a094db1347f 82 ADC_CH_VDDIOH_DIV_4 = MXC_V_ADC_CTRL_ADC_CHSEL_VDDIOH_DIV_4, /**< VDDIOH divided by 4 select */
elijahsj 1:8a094db1347f 83 #endif
elijahsj 1:8a094db1347f 84 ADC_CH_MAX /**< Max enum value for channel selection */
elijahsj 1:8a094db1347f 85 } mxc_adc_chsel_t;
elijahsj 1:8a094db1347f 86
elijahsj 1:8a094db1347f 87 /**
elijahsj 1:8a094db1347f 88 * Enumeration type for the ADC limit register to set
elijahsj 1:8a094db1347f 89 */
elijahsj 1:8a094db1347f 90 typedef enum {
elijahsj 1:8a094db1347f 91 ADC_LIMIT_0 = 0, /**< ADC Limit Register 0 */
elijahsj 1:8a094db1347f 92 ADC_LIMIT_1 = 1, /**< ADC Limit Register 1 */
elijahsj 1:8a094db1347f 93 ADC_LIMIT_2 = 2, /**< ADC Limit Register 2 */
elijahsj 1:8a094db1347f 94 ADC_LIMIT_3 = 3, /**< ADC Limit Register 3 */
elijahsj 1:8a094db1347f 95 ADC_LIMIT_MAX /**< Number of Limit registers */
elijahsj 1:8a094db1347f 96 } mxc_adc_limitsel_t;
elijahsj 1:8a094db1347f 97
elijahsj 1:8a094db1347f 98 ///@cond
elijahsj 1:8a094db1347f 99 /**
elijahsj 1:8a094db1347f 100 * Mask for all Interrupt Flag Fields
elijahsj 1:8a094db1347f 101 */
elijahsj 1:8a094db1347f 102 #define ADC_IF_MASK (0xffffffffUL << MXC_F_ADC_INTR_ADC_DONE_IF_POS)
elijahsj 1:8a094db1347f 103
elijahsj 1:8a094db1347f 104 /**
elijahsj 1:8a094db1347f 105 * Mask for all Interrupt Enable Fields
elijahsj 1:8a094db1347f 106 */
elijahsj 1:8a094db1347f 107 #define ADC_IE_MASK (0xffffffffUL >> MXC_F_ADC_INTR_ADC_DONE_IF_POS)
elijahsj 1:8a094db1347f 108 ///@endcond
elijahsj 1:8a094db1347f 109
elijahsj 1:8a094db1347f 110 /* **** Function Prototypes **** */
elijahsj 1:8a094db1347f 111
elijahsj 1:8a094db1347f 112 /**
elijahsj 1:8a094db1347f 113 * @brief Initialize the ADC hardware
elijahsj 1:8a094db1347f 114 *
elijahsj 1:8a094db1347f 115 * @return #E_NO_ERROR if successful
elijahsj 1:8a094db1347f 116 */
elijahsj 1:8a094db1347f 117 int ADC_Init(void);
elijahsj 1:8a094db1347f 118
elijahsj 1:8a094db1347f 119 /**
elijahsj 1:8a094db1347f 120 * @brief Start ADC conversion on the selected channel
elijahsj 1:8a094db1347f 121 *
elijahsj 1:8a094db1347f 122 * @param channel Channel select from #mxc_adc_chsel_t
elijahsj 1:8a094db1347f 123 * @param adc_scale Enable the ADC input scaling mode if non-zero
elijahsj 1:8a094db1347f 124 * @param bypass Bypass input buffer stage if non-zero
elijahsj 1:8a094db1347f 125 */
elijahsj 1:8a094db1347f 126 void ADC_StartConvert(mxc_adc_chsel_t channel, unsigned int adc_scale, unsigned int bypass);
elijahsj 1:8a094db1347f 127
elijahsj 1:8a094db1347f 128 /**
elijahsj 1:8a094db1347f 129 * @brief Gets the result from the previous ADC conversion
elijahsj 1:8a094db1347f 130 *
elijahsj 1:8a094db1347f 131 * @param outdata Pointer to store the ADC data conversion
elijahsj 1:8a094db1347f 132 * result.
elijahsj 1:8a094db1347f 133 * @return #E_OVERFLOW ADC overflow error
elijahsj 1:8a094db1347f 134 * @return #E_NO_ERROR Data returned in outdata parameter
elijahsj 1:8a094db1347f 135 */
elijahsj 1:8a094db1347f 136 int ADC_GetData(uint16_t *outdata);
elijahsj 1:8a094db1347f 137
elijahsj 1:8a094db1347f 138 /**
elijahsj 1:8a094db1347f 139 * @brief Set the data limits for an ADC channel monitor
elijahsj 1:8a094db1347f 140 *
elijahsj 1:8a094db1347f 141 * @param unit Which data limit unit to configure
elijahsj 1:8a094db1347f 142 * @param channel Channel select from mxc_adc_chsel_t
elijahsj 1:8a094db1347f 143 * @param low_enable Enable the lower limit on this monitor
elijahsj 1:8a094db1347f 144 * @param low_limit Value for lower limit monitor
elijahsj 1:8a094db1347f 145 * @param high_enable Enable the upper limit on this monitor
elijahsj 1:8a094db1347f 146 * @param high_limit Value for upper limit monitor
elijahsj 1:8a094db1347f 147 *
elijahsj 1:8a094db1347f 148 * @return #E_BAD_PARAM ADC limit or channel greater than supported
elijahsj 1:8a094db1347f 149 * @return #E_NO_ERROR ADC limit set successfully
elijahsj 1:8a094db1347f 150 */
elijahsj 1:8a094db1347f 151 int ADC_SetLimit(mxc_adc_limitsel_t unit, mxc_adc_chsel_t channel,
elijahsj 1:8a094db1347f 152 unsigned int low_enable, unsigned int low_limit,
elijahsj 1:8a094db1347f 153 unsigned int high_enable, unsigned int high_limit);
elijahsj 1:8a094db1347f 154
elijahsj 1:8a094db1347f 155 /**
elijahsj 1:8a094db1347f 156 * @brief Get interrupt flags
elijahsj 1:8a094db1347f 157 *
elijahsj 1:8a094db1347f 158 * @return ADC Interrupt flags bit mask. See the @ref ADC_INTR_IF_Register
elijahsj 1:8a094db1347f 159 * "ADC_INTR Register" for the interrupt flag masks.
elijahsj 1:8a094db1347f 160 */
elijahsj 1:8a094db1347f 161 __STATIC_INLINE uint32_t ADC_GetFlags()
elijahsj 1:8a094db1347f 162 {
elijahsj 1:8a094db1347f 163 return (MXC_ADC->intr & ADC_IF_MASK);
elijahsj 1:8a094db1347f 164 }
elijahsj 1:8a094db1347f 165
elijahsj 1:8a094db1347f 166 /**
elijahsj 1:8a094db1347f 167 * @brief Clear interrupt flag(s) using the mask parameter. All bits set in
elijahsj 1:8a094db1347f 168 * the parameter will be cleared.
elijahsj 1:8a094db1347f 169 *
elijahsj 1:8a094db1347f 170 * @param mask Interrupt flags to clear. See the @ref ADC_INTR_IF_Register
elijahsj 1:8a094db1347f 171 * "ADC_INTR Register" for the interrupt flag masks.
elijahsj 1:8a094db1347f 172 */
elijahsj 1:8a094db1347f 173 __STATIC_INLINE void ADC_ClearFlags(uint32_t mask)
elijahsj 1:8a094db1347f 174 {
elijahsj 1:8a094db1347f 175 MXC_ADC->intr = ((MXC_ADC->intr & ADC_IF_MASK) | mask);
elijahsj 1:8a094db1347f 176 }
elijahsj 1:8a094db1347f 177
elijahsj 1:8a094db1347f 178 /**
elijahsj 1:8a094db1347f 179 * @brief Get the Status of the ADC
elijahsj 1:8a094db1347f 180 *
elijahsj 1:8a094db1347f 181 * @return ADC status register. See @ref ADC_STATUS_Register "ADC_STATUS
elijahsj 1:8a094db1347f 182 * Register" for details.
elijahsj 1:8a094db1347f 183 */
elijahsj 1:8a094db1347f 184 __STATIC_INLINE uint32_t ADC_GetStatus()
elijahsj 1:8a094db1347f 185 {
elijahsj 1:8a094db1347f 186 return (MXC_ADC->status);
elijahsj 1:8a094db1347f 187 }
elijahsj 1:8a094db1347f 188
elijahsj 1:8a094db1347f 189 /**
elijahsj 1:8a094db1347f 190 * @brief Enables the ADC interrupts specified by the mask parameter
elijahsj 1:8a094db1347f 191 *
elijahsj 1:8a094db1347f 192 * @param mask ADC interrupts to enable. See @ref ADC_INTR_IE_Register
elijahsj 1:8a094db1347f 193 * "ADC_INTR Register" for the interrupt enable bit masks.
elijahsj 1:8a094db1347f 194 */
elijahsj 1:8a094db1347f 195 __STATIC_INLINE void ADC_EnableINT(uint32_t mask)
elijahsj 1:8a094db1347f 196 {
elijahsj 1:8a094db1347f 197 MXC_ADC->intr = ((MXC_ADC->intr & ADC_IE_MASK) | mask);
elijahsj 1:8a094db1347f 198 }
elijahsj 1:8a094db1347f 199
elijahsj 1:8a094db1347f 200 /**
elijahsj 1:8a094db1347f 201 * @brief Disable ADC interrupts based on mask
elijahsj 1:8a094db1347f 202 *
elijahsj 1:8a094db1347f 203 * @param mask ADC interrupts to disable. See @ref ADC_INTR_IE_Register
elijahsj 1:8a094db1347f 204 * "ADC_INTR Register" for the interrupt enable bit masks.
elijahsj 1:8a094db1347f 205 */
elijahsj 1:8a094db1347f 206 __STATIC_INLINE void ADC_DisableINT(uint32_t mask)
elijahsj 1:8a094db1347f 207 {
elijahsj 1:8a094db1347f 208 MXC_ADC->intr = ((MXC_ADC->intr & ADC_IE_MASK) & ~mask);
elijahsj 1:8a094db1347f 209 }
elijahsj 1:8a094db1347f 210
elijahsj 1:8a094db1347f 211 /**@} end of group adc */
elijahsj 1:8a094db1347f 212
elijahsj 1:8a094db1347f 213 #ifdef __cplusplus
elijahsj 1:8a094db1347f 214 }
elijahsj 1:8a094db1347f 215 #endif
elijahsj 1:8a094db1347f 216
elijahsj 1:8a094db1347f 217 #endif /* _ADC_H */