test

Committer:
elijahsj
Date:
Mon Nov 09 00:33:19 2020 -0500
Revision:
2:4364577b5ad8
Parent:
1:8a094db1347f
copied mbed library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elijahsj 1:8a094db1347f 1 /*******************************************************************************
elijahsj 1:8a094db1347f 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
elijahsj 1:8a094db1347f 3 *
elijahsj 1:8a094db1347f 4 * Permission is hereby granted, free of charge, to any person obtaining a
elijahsj 1:8a094db1347f 5 * copy of this software and associated documentation files (the "Software"),
elijahsj 1:8a094db1347f 6 * to deal in the Software without restriction, including without limitation
elijahsj 1:8a094db1347f 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
elijahsj 1:8a094db1347f 8 * and/or sell copies of the Software, and to permit persons to whom the
elijahsj 1:8a094db1347f 9 * Software is furnished to do so, subject to the following conditions:
elijahsj 1:8a094db1347f 10 *
elijahsj 1:8a094db1347f 11 * The above copyright notice and this permission notice shall be included
elijahsj 1:8a094db1347f 12 * in all copies or substantial portions of the Software.
elijahsj 1:8a094db1347f 13 *
elijahsj 1:8a094db1347f 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
elijahsj 1:8a094db1347f 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
elijahsj 1:8a094db1347f 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
elijahsj 1:8a094db1347f 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
elijahsj 1:8a094db1347f 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
elijahsj 1:8a094db1347f 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
elijahsj 1:8a094db1347f 20 * OTHER DEALINGS IN THE SOFTWARE.
elijahsj 1:8a094db1347f 21 *
elijahsj 1:8a094db1347f 22 * Except as contained in this notice, the name of Maxim Integrated
elijahsj 1:8a094db1347f 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
elijahsj 1:8a094db1347f 24 * Products, Inc. Branding Policy.
elijahsj 1:8a094db1347f 25 *
elijahsj 1:8a094db1347f 26 * The mere transfer of this software does not imply any licenses
elijahsj 1:8a094db1347f 27 * of trade secrets, proprietary technology, copyrights, patents,
elijahsj 1:8a094db1347f 28 * trademarks, maskwork rights, or any other form of intellectual
elijahsj 1:8a094db1347f 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
elijahsj 1:8a094db1347f 30 * ownership rights.
elijahsj 1:8a094db1347f 31 *******************************************************************************
elijahsj 1:8a094db1347f 32 */
elijahsj 1:8a094db1347f 33
elijahsj 1:8a094db1347f 34 #include <string.h>
elijahsj 1:8a094db1347f 35 #include "mbed_assert.h"
elijahsj 1:8a094db1347f 36 #include "cmsis.h"
elijahsj 1:8a094db1347f 37 #include "serial_api.h"
elijahsj 1:8a094db1347f 38 #include "gpio_api.h"
elijahsj 1:8a094db1347f 39 #include "uart.h"
elijahsj 1:8a094db1347f 40 #include "uart_regs.h"
elijahsj 1:8a094db1347f 41 #include "ioman_regs.h"
elijahsj 1:8a094db1347f 42 #include "PeripheralPins.h"
elijahsj 1:8a094db1347f 43
elijahsj 1:8a094db1347f 44 #define DEFAULT_BAUD 9600
elijahsj 1:8a094db1347f 45
elijahsj 1:8a094db1347f 46 #define UART_ERRORS (MXC_F_UART_INTFL_RX_FRAMING_ERR | \
elijahsj 1:8a094db1347f 47 MXC_F_UART_INTFL_RX_PARITY_ERR | \
elijahsj 1:8a094db1347f 48 MXC_F_UART_INTFL_RX_FIFO_OVERFLOW)
elijahsj 1:8a094db1347f 49
elijahsj 1:8a094db1347f 50 // Variables for managing the stdio UART
elijahsj 1:8a094db1347f 51 int stdio_uart_inited;
elijahsj 1:8a094db1347f 52 serial_t stdio_uart;
elijahsj 1:8a094db1347f 53
elijahsj 1:8a094db1347f 54 // Variables for interrupt driven
elijahsj 1:8a094db1347f 55 static uart_irq_handler irq_handler;
elijahsj 1:8a094db1347f 56 static serial_t *objs[MXC_CFG_UART_INSTANCES];
elijahsj 1:8a094db1347f 57
elijahsj 1:8a094db1347f 58 static void usurp_pin(PinName, int);
elijahsj 1:8a094db1347f 59
elijahsj 1:8a094db1347f 60 //******************************************************************************
elijahsj 1:8a094db1347f 61 void serial_init(serial_t *obj, PinName tx, PinName rx)
elijahsj 1:8a094db1347f 62 {
elijahsj 1:8a094db1347f 63 // Determine which uart is associated with each pin
elijahsj 1:8a094db1347f 64 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
elijahsj 1:8a094db1347f 65 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
elijahsj 1:8a094db1347f 66 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
elijahsj 1:8a094db1347f 67
elijahsj 1:8a094db1347f 68 // Make sure that both pins are pointing to the same uart
elijahsj 1:8a094db1347f 69 MBED_ASSERT(uart != (UARTName)NC);
elijahsj 1:8a094db1347f 70
elijahsj 1:8a094db1347f 71 // Set the obj pointer to the proper uart
elijahsj 1:8a094db1347f 72 obj->uart = (mxc_uart_regs_t*)uart;
elijahsj 1:8a094db1347f 73
elijahsj 1:8a094db1347f 74 // Set the uart index
elijahsj 1:8a094db1347f 75 obj->index = MXC_UART_GET_IDX(obj->uart);
elijahsj 1:8a094db1347f 76 obj->fifo = (mxc_uart_fifo_regs_t*)MXC_UART_GET_BASE_FIFO(obj->index);
elijahsj 1:8a094db1347f 77
elijahsj 1:8a094db1347f 78 // Manage stdio UART
elijahsj 1:8a094db1347f 79 if (uart == STDIO_UART) {
elijahsj 1:8a094db1347f 80 stdio_uart_inited = 1;
elijahsj 1:8a094db1347f 81 memcpy(&stdio_uart, obj, sizeof(serial_t));
elijahsj 1:8a094db1347f 82 }
elijahsj 1:8a094db1347f 83
elijahsj 1:8a094db1347f 84 // Record the pins requested
elijahsj 1:8a094db1347f 85 obj->tx = tx;
elijahsj 1:8a094db1347f 86 obj->rx = rx;
elijahsj 1:8a094db1347f 87
elijahsj 1:8a094db1347f 88 // Merge pin function requests for use with CMSIS init func
elijahsj 1:8a094db1347f 89 ioman_req_t io_req = {0};
elijahsj 1:8a094db1347f 90 pin_function_t *pin_func = NULL;
elijahsj 1:8a094db1347f 91 if (tx != NC) {
elijahsj 1:8a094db1347f 92 pin_func = (pin_function_t *)pinmap_find_function(tx, PinMap_UART_TX);
elijahsj 1:8a094db1347f 93 io_req.value = pin_func->req_val;
elijahsj 1:8a094db1347f 94 }
elijahsj 1:8a094db1347f 95 if (rx != NC) {
elijahsj 1:8a094db1347f 96 pin_func = (pin_function_t *)pinmap_find_function(rx, PinMap_UART_RX);
elijahsj 1:8a094db1347f 97 io_req.value |= pin_func->req_val;
elijahsj 1:8a094db1347f 98 }
elijahsj 1:8a094db1347f 99
elijahsj 1:8a094db1347f 100 // Using req and ack pointers of last pin function lookup
elijahsj 1:8a094db1347f 101 obj->sys_cfg.io_cfg.req_reg = pin_func->reg_req;
elijahsj 1:8a094db1347f 102 obj->sys_cfg.io_cfg.ack_reg = pin_func->reg_ack;
elijahsj 1:8a094db1347f 103 obj->sys_cfg.io_cfg.req_val = io_req;
elijahsj 1:8a094db1347f 104 obj->sys_cfg.clk_scale = CLKMAN_SCALE_DIV_8;
elijahsj 1:8a094db1347f 105
elijahsj 1:8a094db1347f 106 // Configure the UART with default parameters
elijahsj 1:8a094db1347f 107 obj->cfg.extra_stop = 0;
elijahsj 1:8a094db1347f 108 obj->cfg.cts = 0;
elijahsj 1:8a094db1347f 109 obj->cfg.rts = 0;
elijahsj 1:8a094db1347f 110 obj->cfg.baud = DEFAULT_BAUD;
elijahsj 1:8a094db1347f 111 obj->cfg.size = UART_DATA_SIZE_8_BITS;
elijahsj 1:8a094db1347f 112 obj->cfg.parity = UART_PARITY_DISABLE;
elijahsj 1:8a094db1347f 113
elijahsj 1:8a094db1347f 114 int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
elijahsj 1:8a094db1347f 115 MBED_ASSERT(retval == E_NO_ERROR);
elijahsj 1:8a094db1347f 116 }
elijahsj 1:8a094db1347f 117
elijahsj 1:8a094db1347f 118 //******************************************************************************
elijahsj 1:8a094db1347f 119 void serial_baud(serial_t *obj, int baudrate)
elijahsj 1:8a094db1347f 120 {
elijahsj 1:8a094db1347f 121 obj->cfg.baud = baudrate;
elijahsj 1:8a094db1347f 122 int retval = UART_Init(obj->uart, &obj->cfg, NULL);
elijahsj 1:8a094db1347f 123 MBED_ASSERT(retval == E_NO_ERROR);
elijahsj 1:8a094db1347f 124 }
elijahsj 1:8a094db1347f 125
elijahsj 1:8a094db1347f 126 //******************************************************************************
elijahsj 1:8a094db1347f 127 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
elijahsj 1:8a094db1347f 128 {
elijahsj 1:8a094db1347f 129 switch (data_bits) {
elijahsj 1:8a094db1347f 130 case 5:
elijahsj 1:8a094db1347f 131 obj->cfg.size = UART_DATA_SIZE_5_BITS;
elijahsj 1:8a094db1347f 132 break;
elijahsj 1:8a094db1347f 133 case 6:
elijahsj 1:8a094db1347f 134 obj->cfg.size = UART_DATA_SIZE_6_BITS;
elijahsj 1:8a094db1347f 135 break;
elijahsj 1:8a094db1347f 136 case 7:
elijahsj 1:8a094db1347f 137 obj->cfg.size = UART_DATA_SIZE_7_BITS;
elijahsj 1:8a094db1347f 138 break;
elijahsj 1:8a094db1347f 139 case 8:
elijahsj 1:8a094db1347f 140 obj->cfg.size = UART_DATA_SIZE_8_BITS;
elijahsj 1:8a094db1347f 141 break;
elijahsj 1:8a094db1347f 142 default:
elijahsj 1:8a094db1347f 143 MBED_ASSERT(0);
elijahsj 1:8a094db1347f 144 break;
elijahsj 1:8a094db1347f 145 }
elijahsj 1:8a094db1347f 146
elijahsj 1:8a094db1347f 147 switch (parity) {
elijahsj 1:8a094db1347f 148 case ParityNone:
elijahsj 1:8a094db1347f 149 obj->cfg.parity = UART_PARITY_DISABLE;
elijahsj 1:8a094db1347f 150 break;
elijahsj 1:8a094db1347f 151 case ParityOdd :
elijahsj 1:8a094db1347f 152 obj->cfg.parity = UART_PARITY_ODD;
elijahsj 1:8a094db1347f 153 break;
elijahsj 1:8a094db1347f 154 case ParityEven:
elijahsj 1:8a094db1347f 155 obj->cfg.parity = UART_PARITY_EVEN;
elijahsj 1:8a094db1347f 156 break;
elijahsj 1:8a094db1347f 157 case ParityForced1:
elijahsj 1:8a094db1347f 158 case ParityForced0:
elijahsj 1:8a094db1347f 159 default:
elijahsj 1:8a094db1347f 160 MBED_ASSERT(0);
elijahsj 1:8a094db1347f 161 break;
elijahsj 1:8a094db1347f 162 }
elijahsj 1:8a094db1347f 163
elijahsj 1:8a094db1347f 164 switch (stop_bits) {
elijahsj 1:8a094db1347f 165 case 1:
elijahsj 1:8a094db1347f 166 obj->cfg.extra_stop = 0;
elijahsj 1:8a094db1347f 167 break;
elijahsj 1:8a094db1347f 168 case 2:
elijahsj 1:8a094db1347f 169 obj->cfg.extra_stop = 1;
elijahsj 1:8a094db1347f 170 break;
elijahsj 1:8a094db1347f 171 default:
elijahsj 1:8a094db1347f 172 MBED_ASSERT(0);
elijahsj 1:8a094db1347f 173 break;
elijahsj 1:8a094db1347f 174 }
elijahsj 1:8a094db1347f 175
elijahsj 1:8a094db1347f 176 int retval = UART_Init(obj->uart, &obj->cfg, NULL);
elijahsj 1:8a094db1347f 177 MBED_ASSERT(retval == E_NO_ERROR);
elijahsj 1:8a094db1347f 178 }
elijahsj 1:8a094db1347f 179
elijahsj 1:8a094db1347f 180 //******************************************************************************
elijahsj 1:8a094db1347f 181 void uart_handler(serial_t *obj)
elijahsj 1:8a094db1347f 182 {
elijahsj 1:8a094db1347f 183 if (obj && obj->id) {
elijahsj 1:8a094db1347f 184 irq_handler(obj->id, RxIrq);
elijahsj 1:8a094db1347f 185 }
elijahsj 1:8a094db1347f 186 }
elijahsj 1:8a094db1347f 187
elijahsj 1:8a094db1347f 188 void uart0_handler(void) { uart_handler(objs[0]); }
elijahsj 1:8a094db1347f 189 void uart1_handler(void) { uart_handler(objs[1]); }
elijahsj 1:8a094db1347f 190 void uart2_handler(void) { uart_handler(objs[2]); }
elijahsj 1:8a094db1347f 191
elijahsj 1:8a094db1347f 192 //******************************************************************************
elijahsj 1:8a094db1347f 193 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
elijahsj 1:8a094db1347f 194 {
elijahsj 1:8a094db1347f 195 irq_handler = handler;
elijahsj 1:8a094db1347f 196 obj->id = id;
elijahsj 1:8a094db1347f 197 }
elijahsj 1:8a094db1347f 198
elijahsj 1:8a094db1347f 199 //******************************************************************************
elijahsj 1:8a094db1347f 200 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
elijahsj 1:8a094db1347f 201 {
elijahsj 1:8a094db1347f 202 switch (obj->index) {
elijahsj 1:8a094db1347f 203 case 0:
elijahsj 1:8a094db1347f 204 NVIC_SetVector(UART0_IRQn, (uint32_t)uart0_handler);
elijahsj 1:8a094db1347f 205 NVIC_EnableIRQ(UART0_IRQn);
elijahsj 1:8a094db1347f 206 break;
elijahsj 1:8a094db1347f 207 case 1:
elijahsj 1:8a094db1347f 208 NVIC_SetVector(UART1_IRQn, (uint32_t)uart1_handler);
elijahsj 1:8a094db1347f 209 NVIC_EnableIRQ(UART1_IRQn);
elijahsj 1:8a094db1347f 210 break;
elijahsj 1:8a094db1347f 211 case 2:
elijahsj 1:8a094db1347f 212 NVIC_SetVector(UART2_IRQn, (uint32_t)uart2_handler);
elijahsj 1:8a094db1347f 213 NVIC_EnableIRQ(UART2_IRQn);
elijahsj 1:8a094db1347f 214 break;
elijahsj 1:8a094db1347f 215 default:
elijahsj 1:8a094db1347f 216 MBED_ASSERT(0);
elijahsj 1:8a094db1347f 217 }
elijahsj 1:8a094db1347f 218
elijahsj 1:8a094db1347f 219 if (irq == RxIrq) {
elijahsj 1:8a094db1347f 220 // Enable RX FIFO Threshold Interrupt
elijahsj 1:8a094db1347f 221 if (enable) {
elijahsj 1:8a094db1347f 222 // Clear pending interrupts
elijahsj 1:8a094db1347f 223 obj->uart->intfl = obj->uart->intfl;
elijahsj 1:8a094db1347f 224 obj->uart->inten |= (MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
elijahsj 1:8a094db1347f 225 } else {
elijahsj 1:8a094db1347f 226 // Clear pending interrupts
elijahsj 1:8a094db1347f 227 obj->uart->intfl = obj->uart->intfl;
elijahsj 1:8a094db1347f 228 obj->uart->inten &= ~(MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
elijahsj 1:8a094db1347f 229 }
elijahsj 1:8a094db1347f 230 } else if (irq == TxIrq) {
elijahsj 1:8a094db1347f 231 // Set TX Almost Empty level to interrupt when empty
elijahsj 1:8a094db1347f 232 MXC_SET_FIELD(&obj->uart->tx_fifo_ctrl, MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL,
elijahsj 1:8a094db1347f 233 (MXC_UART_FIFO_DEPTH - 1) << MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS);
elijahsj 1:8a094db1347f 234
elijahsj 1:8a094db1347f 235 // Enable TX Almost Empty Interrupt
elijahsj 1:8a094db1347f 236 if (enable) {
elijahsj 1:8a094db1347f 237 // Clear pending interrupts
elijahsj 1:8a094db1347f 238 obj->uart->intfl = obj->uart->intfl;
elijahsj 1:8a094db1347f 239 obj->uart->inten |= MXC_F_UART_INTFL_TX_FIFO_AE;
elijahsj 1:8a094db1347f 240 } else {
elijahsj 1:8a094db1347f 241 // Clear pending interrupts
elijahsj 1:8a094db1347f 242 obj->uart->intfl = obj->uart->intfl;
elijahsj 1:8a094db1347f 243 obj->uart->inten &= ~MXC_F_UART_INTFL_TX_FIFO_AE;
elijahsj 1:8a094db1347f 244 }
elijahsj 1:8a094db1347f 245 } else {
elijahsj 1:8a094db1347f 246 MBED_ASSERT(0);
elijahsj 1:8a094db1347f 247 }
elijahsj 1:8a094db1347f 248 }
elijahsj 1:8a094db1347f 249
elijahsj 1:8a094db1347f 250 //******************************************************************************
elijahsj 1:8a094db1347f 251 int serial_getc(serial_t *obj)
elijahsj 1:8a094db1347f 252 {
elijahsj 1:8a094db1347f 253 int c = 0;
elijahsj 1:8a094db1347f 254
elijahsj 1:8a094db1347f 255 if (obj->rx != NC) {
elijahsj 1:8a094db1347f 256 // Wait for data to be available
elijahsj 1:8a094db1347f 257 while ((obj->uart->rx_fifo_ctrl & MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY) == 0);
elijahsj 1:8a094db1347f 258
elijahsj 1:8a094db1347f 259 c = obj->fifo->rx;
elijahsj 1:8a094db1347f 260 }
elijahsj 1:8a094db1347f 261
elijahsj 1:8a094db1347f 262 return c;
elijahsj 1:8a094db1347f 263 }
elijahsj 1:8a094db1347f 264
elijahsj 1:8a094db1347f 265 //******************************************************************************
elijahsj 1:8a094db1347f 266 void serial_putc(serial_t *obj, int c)
elijahsj 1:8a094db1347f 267 {
elijahsj 1:8a094db1347f 268 if (obj->tx != NC) {
elijahsj 1:8a094db1347f 269 // Wait for room in the FIFO without blocking interrupts.
elijahsj 1:8a094db1347f 270 while (UART_NumWriteAvail(obj->uart) == 0);
elijahsj 1:8a094db1347f 271
elijahsj 1:8a094db1347f 272 // Must clear before every write to the buffer to know that the FIFO
elijahsj 1:8a094db1347f 273 // is empty when the TX DONE bit is set
elijahsj 1:8a094db1347f 274 obj->uart->intfl = MXC_F_UART_INTFL_TX_DONE;
elijahsj 1:8a094db1347f 275 obj->fifo->tx = (uint8_t)c;
elijahsj 1:8a094db1347f 276 }
elijahsj 1:8a094db1347f 277 }
elijahsj 1:8a094db1347f 278
elijahsj 1:8a094db1347f 279 //******************************************************************************
elijahsj 1:8a094db1347f 280 int serial_readable(serial_t *obj)
elijahsj 1:8a094db1347f 281 {
elijahsj 1:8a094db1347f 282 return UART_NumReadAvail(obj->uart);
elijahsj 1:8a094db1347f 283 }
elijahsj 1:8a094db1347f 284
elijahsj 1:8a094db1347f 285 //******************************************************************************
elijahsj 1:8a094db1347f 286 int serial_writable(serial_t *obj)
elijahsj 1:8a094db1347f 287 {
elijahsj 1:8a094db1347f 288 return UART_NumWriteAvail(obj->uart);
elijahsj 1:8a094db1347f 289 }
elijahsj 1:8a094db1347f 290
elijahsj 1:8a094db1347f 291 //******************************************************************************
elijahsj 1:8a094db1347f 292 void serial_clear(serial_t *obj)
elijahsj 1:8a094db1347f 293 {
elijahsj 1:8a094db1347f 294 // Clear the RX and TX FIFOs
elijahsj 1:8a094db1347f 295 UART_DrainRX(obj->uart);
elijahsj 1:8a094db1347f 296 UART_DrainTX(obj->uart);
elijahsj 1:8a094db1347f 297 }
elijahsj 1:8a094db1347f 298
elijahsj 1:8a094db1347f 299 //******************************************************************************
elijahsj 1:8a094db1347f 300 void serial_break_set(serial_t *obj)
elijahsj 1:8a094db1347f 301 {
elijahsj 1:8a094db1347f 302 // Make sure that nothing is being sent
elijahsj 1:8a094db1347f 303 while (((obj->uart->tx_fifo_ctrl & MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY)
elijahsj 1:8a094db1347f 304 >> MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS) > 0);
elijahsj 1:8a094db1347f 305 while (!(obj->uart->intfl & MXC_F_UART_INTFL_TX_DONE));
elijahsj 1:8a094db1347f 306
elijahsj 1:8a094db1347f 307 // Configure TX to output 0
elijahsj 1:8a094db1347f 308 usurp_pin(obj->tx, 0);
elijahsj 1:8a094db1347f 309
elijahsj 1:8a094db1347f 310 // GPIO is setup now, but we need to unmap UART from the pin
elijahsj 1:8a094db1347f 311 pin_function_t *pin_func = (pin_function_t *)pinmap_find_function(obj->tx, PinMap_UART_TX);
elijahsj 1:8a094db1347f 312 *pin_func->reg_req &= ~MXC_F_IOMAN_UART_REQ_IO_REQ;
elijahsj 1:8a094db1347f 313 MBED_ASSERT((*pin_func->reg_ack & MXC_F_IOMAN_UART_ACK_IO_ACK) == 0);
elijahsj 1:8a094db1347f 314 }
elijahsj 1:8a094db1347f 315
elijahsj 1:8a094db1347f 316 //******************************************************************************
elijahsj 1:8a094db1347f 317 void serial_break_clear(serial_t *obj)
elijahsj 1:8a094db1347f 318 {
elijahsj 1:8a094db1347f 319 // Configure TX to output 1
elijahsj 1:8a094db1347f 320 usurp_pin(obj->tx, 1);
elijahsj 1:8a094db1347f 321 // Return TX to UART control
elijahsj 1:8a094db1347f 322 serial_pinout_tx(obj->tx);
elijahsj 1:8a094db1347f 323 }
elijahsj 1:8a094db1347f 324
elijahsj 1:8a094db1347f 325 //******************************************************************************
elijahsj 1:8a094db1347f 326 void serial_pinout_tx(PinName tx)
elijahsj 1:8a094db1347f 327 {
elijahsj 1:8a094db1347f 328 pinmap_pinout(tx, PinMap_UART_TX);
elijahsj 1:8a094db1347f 329 }
elijahsj 1:8a094db1347f 330
elijahsj 1:8a094db1347f 331 //******************************************************************************
elijahsj 1:8a094db1347f 332 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
elijahsj 1:8a094db1347f 333 {
elijahsj 1:8a094db1347f 334 pin_function_t rtscts_pin_func = {0};
elijahsj 1:8a094db1347f 335
elijahsj 1:8a094db1347f 336 obj->cfg.cts = 0;
elijahsj 1:8a094db1347f 337 obj->cfg.rts = 0;
elijahsj 1:8a094db1347f 338
elijahsj 1:8a094db1347f 339 if ((FlowControlCTS == type) || (FlowControlRTSCTS == type)) {
elijahsj 1:8a094db1347f 340 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
elijahsj 1:8a094db1347f 341 UARTName uart = (UARTName)pinmap_merge(uart_cts, (UARTName)obj->uart);
elijahsj 1:8a094db1347f 342 // Assert pin is usable with existing uart
elijahsj 1:8a094db1347f 343 MBED_ASSERT(uart != (UARTName)NC);
elijahsj 1:8a094db1347f 344
elijahsj 1:8a094db1347f 345 pin_function_t *pin_func;
elijahsj 1:8a094db1347f 346 pin_func = (pin_function_t *)pinmap_find_function(txflow, PinMap_UART_CTS);
elijahsj 1:8a094db1347f 347 rtscts_pin_func.req_val |= pin_func->req_val;
elijahsj 1:8a094db1347f 348
elijahsj 1:8a094db1347f 349 obj->cfg.cts = 1;
elijahsj 1:8a094db1347f 350 }
elijahsj 1:8a094db1347f 351
elijahsj 1:8a094db1347f 352 if ((FlowControlRTS == type) || (FlowControlRTSCTS == type)) {
elijahsj 1:8a094db1347f 353 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
elijahsj 1:8a094db1347f 354 UARTName uart = (UARTName)pinmap_merge(uart_rts, (UARTName)obj->uart);
elijahsj 1:8a094db1347f 355 MBED_ASSERT(uart != (UARTName)NC);
elijahsj 1:8a094db1347f 356
elijahsj 1:8a094db1347f 357 pin_function_t *pin_func;
elijahsj 1:8a094db1347f 358 pin_func = (pin_function_t *)pinmap_find_function(rxflow, PinMap_UART_RTS);
elijahsj 1:8a094db1347f 359 rtscts_pin_func.req_val |= pin_func->req_val;
elijahsj 1:8a094db1347f 360
elijahsj 1:8a094db1347f 361 obj->cfg.rts = 1;
elijahsj 1:8a094db1347f 362 }
elijahsj 1:8a094db1347f 363
elijahsj 1:8a094db1347f 364 obj->sys_cfg.io_cfg.req_val.value |= rtscts_pin_func.req_val;
elijahsj 1:8a094db1347f 365
elijahsj 1:8a094db1347f 366 int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
elijahsj 1:8a094db1347f 367 MBED_ASSERT(retval == E_NO_ERROR);
elijahsj 1:8a094db1347f 368 }
elijahsj 1:8a094db1347f 369
elijahsj 1:8a094db1347f 370 //******************************************************************************
elijahsj 1:8a094db1347f 371 static void usurp_pin(PinName pin, int state)
elijahsj 1:8a094db1347f 372 {
elijahsj 1:8a094db1347f 373 gpio_t gpio;
elijahsj 1:8a094db1347f 374 gpio_init_out(&gpio, pin);
elijahsj 1:8a094db1347f 375 gpio_write(&gpio, state);
elijahsj 1:8a094db1347f 376 }