Elijah Stanger-Jones / mbed-dev-f303

test

targets/TARGET_Maxim/TARGET_MAX32625/PeripheralPins.c@2:4364577b5ad8, 2020-11-09 (annotated)

Committer:
elijahsj
Date:
Mon Nov 09 00:33:19 2020 -0500
Revision:
2:4364577b5ad8
Parent:
1:8a094db1347f 
copied mbed library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elijahsj 1:8a094db1347f 1 /*******************************************************************************
elijahsj 1:8a094db1347f 2 * Copyright (c) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
elijahsj 1:8a094db1347f 3 *
elijahsj 1:8a094db1347f 4 * Permission is hereby granted, free of charge, to any person obtaining a
elijahsj 1:8a094db1347f 5 * copy of this software and associated documentation files (the "Software"),
elijahsj 1:8a094db1347f 6 * to deal in the Software without restriction, including without limitation
elijahsj 1:8a094db1347f 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
elijahsj 1:8a094db1347f 8 * and/or sell copies of the Software, and to permit persons to whom the
elijahsj 1:8a094db1347f 9 * Software is furnished to do so, subject to the following conditions:
elijahsj 1:8a094db1347f 10 *
elijahsj 1:8a094db1347f 11 * The above copyright notice and this permission notice shall be included
elijahsj 1:8a094db1347f 12 * in all copies or substantial portions of the Software.
elijahsj 1:8a094db1347f 13 *
elijahsj 1:8a094db1347f 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
elijahsj 1:8a094db1347f 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
elijahsj 1:8a094db1347f 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
elijahsj 1:8a094db1347f 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
elijahsj 1:8a094db1347f 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
elijahsj 1:8a094db1347f 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
elijahsj 1:8a094db1347f 20 * OTHER DEALINGS IN THE SOFTWARE.
elijahsj 1:8a094db1347f 21 *
elijahsj 1:8a094db1347f 22 * Except as contained in this notice, the name of Maxim Integrated
elijahsj 1:8a094db1347f 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
elijahsj 1:8a094db1347f 24 * Products, Inc. Branding Policy.
elijahsj 1:8a094db1347f 25 *
elijahsj 1:8a094db1347f 26 * The mere transfer of this software does not imply any licenses
elijahsj 1:8a094db1347f 27 * of trade secrets, proprietary technology, copyrights, patents,
elijahsj 1:8a094db1347f 28 * trademarks, maskwork rights, or any other form of intellectual
elijahsj 1:8a094db1347f 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
elijahsj 1:8a094db1347f 30 * ownership rights.
elijahsj 1:8a094db1347f 31 *******************************************************************************
elijahsj 1:8a094db1347f 32 */
elijahsj 1:8a094db1347f 33
elijahsj 1:8a094db1347f 34 #include "device.h"
elijahsj 1:8a094db1347f 35 #include "PeripheralPins.h"
elijahsj 1:8a094db1347f 36 #include "ioman_regs.h"
elijahsj 1:8a094db1347f 37 #include "ioman.h"
elijahsj 1:8a094db1347f 38 #include "adc.h"
elijahsj 1:8a094db1347f 39
elijahsj 1:8a094db1347f 40 /*
elijahsj 1:8a094db1347f 41 * To select a peripheral function on Maxim microcontrollers, multiple
elijahsj 1:8a094db1347f 42 * configurations must be made. The mbed PinMap structure only includes one
elijahsj 1:8a094db1347f 43 * data member to hold this information. To extend the configuration storage,
elijahsj 1:8a094db1347f 44 * the "function" data member is used as a pointer to a pin_function_t
elijahsj 1:8a094db1347f 45 * structure. This structure is defined in objects.h. The definitions below
elijahsj 1:8a094db1347f 46 * include the creation of the pin_function_t structures and the assignment of
elijahsj 1:8a094db1347f 47 * the pointers to the "function" data members.
elijahsj 1:8a094db1347f 48 */
elijahsj 1:8a094db1347f 49
elijahsj 1:8a094db1347f 50 #ifdef TOOLCHAIN_ARM_STD
elijahsj 1:8a094db1347f 51 #pragma diag_suppress 1296
elijahsj 1:8a094db1347f 52 #endif
elijahsj 1:8a094db1347f 53
elijahsj 1:8a094db1347f 54 /************I2C***************/
elijahsj 1:8a094db1347f 55 const PinMap PinMap_I2C_SDA[] = {
elijahsj 1:8a094db1347f 56 { P1_6, I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, MXC_F_IOMAN_I2CM0_REQ_MAPPING_REQ, MXC_F_IOMAN_I2CM0_ACK_MAPPING_ACK}) },
elijahsj 1:8a094db1347f 57 { P3_4, I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, MXC_F_IOMAN_I2CM1_REQ_MAPPING_REQ, MXC_F_IOMAN_I2CM1_ACK_MAPPING_ACK}) },
elijahsj 1:8a094db1347f 58 { NC, NC, 0 }
elijahsj 1:8a094db1347f 59 };
elijahsj 1:8a094db1347f 60
elijahsj 1:8a094db1347f 61 const PinMap PinMap_I2C_SCL[] = {
elijahsj 1:8a094db1347f 62 { P1_7, I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, MXC_F_IOMAN_I2CM0_REQ_MAPPING_REQ, MXC_F_IOMAN_I2CM0_ACK_MAPPING_ACK}) },
elijahsj 1:8a094db1347f 63 { P3_5, I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, MXC_F_IOMAN_I2CM1_REQ_MAPPING_REQ, MXC_F_IOMAN_I2CM1_ACK_MAPPING_ACK}) },
elijahsj 1:8a094db1347f 64 { NC, NC, 0 }
elijahsj 1:8a094db1347f 65 };
elijahsj 1:8a094db1347f 66
elijahsj 1:8a094db1347f 67 /************UART***************/
elijahsj 1:8a094db1347f 68 const PinMap PinMap_UART_TX[] = {
elijahsj 1:8a094db1347f 69 { P0_1, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART0_REQ_IO_REQ), (MXC_F_IOMAN_UART0_ACK_IO_MAP | MXC_F_IOMAN_UART0_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 70 { P2_1, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART1_REQ_IO_REQ), (MXC_F_IOMAN_UART1_ACK_IO_MAP | MXC_F_IOMAN_UART1_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 71 { P3_1, UART_2, (int)&((pin_function_t){&MXC_IOMAN->uart2_req, &MXC_IOMAN->uart2_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART2_REQ_IO_REQ), (MXC_F_IOMAN_UART2_ACK_IO_MAP | MXC_F_IOMAN_UART2_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 72 { P0_0, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART0_REQ_IO_REQ), (MXC_F_IOMAN_UART0_ACK_IO_MAP | MXC_F_IOMAN_UART0_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 73 { P2_0, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART1_REQ_IO_REQ), (MXC_F_IOMAN_UART1_ACK_IO_MAP | MXC_F_IOMAN_UART1_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 74 { P3_0, UART_2, (int)&((pin_function_t){&MXC_IOMAN->uart2_req, &MXC_IOMAN->uart2_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART2_REQ_IO_REQ), (MXC_F_IOMAN_UART2_ACK_IO_MAP | MXC_F_IOMAN_UART2_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 75 { NC, NC, 0 }
elijahsj 1:8a094db1347f 76 };
elijahsj 1:8a094db1347f 77
elijahsj 1:8a094db1347f 78 const PinMap PinMap_UART_RX[] = {
elijahsj 1:8a094db1347f 79 { P0_0, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART0_REQ_IO_REQ), (MXC_F_IOMAN_UART0_ACK_IO_MAP | MXC_F_IOMAN_UART0_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 80 { P2_0, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART1_REQ_IO_REQ), (MXC_F_IOMAN_UART1_ACK_IO_MAP | MXC_F_IOMAN_UART1_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 81 { P3_0, UART_2, (int)&((pin_function_t){&MXC_IOMAN->uart2_req, &MXC_IOMAN->uart2_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART2_REQ_IO_REQ), (MXC_F_IOMAN_UART2_ACK_IO_MAP | MXC_F_IOMAN_UART2_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 82 { P0_1, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART0_REQ_IO_REQ), (MXC_F_IOMAN_UART0_ACK_IO_MAP | MXC_F_IOMAN_UART0_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 83 { P2_1, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART1_REQ_IO_REQ), (MXC_F_IOMAN_UART1_ACK_IO_MAP | MXC_F_IOMAN_UART1_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 84 { P3_1, UART_2, (int)&((pin_function_t){&MXC_IOMAN->uart2_req, &MXC_IOMAN->uart2_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART2_REQ_IO_REQ), (MXC_F_IOMAN_UART2_ACK_IO_MAP | MXC_F_IOMAN_UART2_ACK_IO_ACK)}) },
elijahsj 1:8a094db1347f 85 { NC, NC, 0 }
elijahsj 1:8a094db1347f 86 };
elijahsj 1:8a094db1347f 87
elijahsj 1:8a094db1347f 88 const PinMap PinMap_UART_CTS[] = {
elijahsj 1:8a094db1347f 89 { P0_2, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART0_REQ_CTS_IO_REQ), (MXC_F_IOMAN_UART0_ACK_CTS_MAP | MXC_F_IOMAN_UART0_ACK_CTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 90 { P2_2, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART1_REQ_CTS_IO_REQ), (MXC_F_IOMAN_UART1_ACK_CTS_MAP | MXC_F_IOMAN_UART1_ACK_CTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 91 { P3_2, UART_2, (int)&((pin_function_t){&MXC_IOMAN->uart2_req, &MXC_IOMAN->uart2_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART2_REQ_CTS_IO_REQ), (MXC_F_IOMAN_UART2_ACK_CTS_MAP | MXC_F_IOMAN_UART2_ACK_CTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 92 { P0_3, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART0_REQ_CTS_IO_REQ), (MXC_F_IOMAN_UART0_ACK_CTS_MAP | MXC_F_IOMAN_UART0_ACK_CTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 93 { P2_3, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART1_REQ_CTS_IO_REQ), (MXC_F_IOMAN_UART1_ACK_CTS_MAP | MXC_F_IOMAN_UART1_ACK_CTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 94 { P3_3, UART_2, (int)&((pin_function_t){&MXC_IOMAN->uart2_req, &MXC_IOMAN->uart2_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART2_REQ_CTS_IO_REQ), (MXC_F_IOMAN_UART2_ACK_CTS_MAP | MXC_F_IOMAN_UART2_ACK_CTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 95 { NC, NC, 0 }
elijahsj 1:8a094db1347f 96 };
elijahsj 1:8a094db1347f 97
elijahsj 1:8a094db1347f 98 const PinMap PinMap_UART_RTS[] = {
elijahsj 1:8a094db1347f 99 { P0_3, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART0_REQ_RTS_IO_REQ), (MXC_F_IOMAN_UART0_ACK_RTS_MAP | MXC_F_IOMAN_UART0_ACK_RTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 100 { P2_3, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART1_REQ_RTS_IO_REQ), (MXC_F_IOMAN_UART1_ACK_RTS_MAP | MXC_F_IOMAN_UART1_ACK_RTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 101 { P3_3, UART_2, (int)&((pin_function_t){&MXC_IOMAN->uart2_req, &MXC_IOMAN->uart2_ack, ((uint32_t)IOMAN_MAP_A | MXC_F_IOMAN_UART2_REQ_RTS_IO_REQ), (MXC_F_IOMAN_UART2_ACK_RTS_MAP | MXC_F_IOMAN_UART2_ACK_RTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 102 { P0_2, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART0_REQ_RTS_IO_REQ), (MXC_F_IOMAN_UART0_ACK_RTS_MAP | MXC_F_IOMAN_UART0_ACK_RTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 103 { P2_2, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART1_REQ_RTS_IO_REQ), (MXC_F_IOMAN_UART1_ACK_RTS_MAP | MXC_F_IOMAN_UART1_ACK_RTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 104 { P3_2, UART_2, (int)&((pin_function_t){&MXC_IOMAN->uart2_req, &MXC_IOMAN->uart2_ack, ((uint32_t)IOMAN_MAP_B | MXC_F_IOMAN_UART2_REQ_RTS_IO_REQ), (MXC_F_IOMAN_UART2_ACK_RTS_MAP | MXC_F_IOMAN_UART2_ACK_RTS_IO_ACK)}) },
elijahsj 1:8a094db1347f 105 { NC, NC, 0 }
elijahsj 1:8a094db1347f 106 };
elijahsj 1:8a094db1347f 107
elijahsj 1:8a094db1347f 108 /************SPI***************/
elijahsj 1:8a094db1347f 109 const PinMap PinMap_SPI_SCLK[] = {
elijahsj 1:8a094db1347f 110 { P0_4, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spim0_req, &MXC_IOMAN->spim0_ack, MXC_F_IOMAN_SPIM0_REQ_CORE_IO_REQ, MXC_F_IOMAN_SPIM0_ACK_CORE_IO_ACK}) },
elijahsj 1:8a094db1347f 111 { P1_0, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spim1_req, &MXC_IOMAN->spim1_ack, MXC_F_IOMAN_SPIM1_REQ_CORE_IO_REQ, MXC_F_IOMAN_SPIM1_ACK_CORE_IO_ACK}) },
elijahsj 1:8a094db1347f 112 { P2_4, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spim2_req, &MXC_IOMAN->spim2_ack, MXC_F_IOMAN_SPIM2_REQ_CORE_IO_REQ, MXC_F_IOMAN_SPIM2_ACK_CORE_IO_ACK}) },
elijahsj 1:8a094db1347f 113 { NC, NC, 0 }
elijahsj 1:8a094db1347f 114 };
elijahsj 1:8a094db1347f 115
elijahsj 1:8a094db1347f 116 const PinMap PinMap_SPI_MOSI[] = {
elijahsj 1:8a094db1347f 117 { P0_5, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spim0_req, &MXC_IOMAN->spim0_ack, MXC_F_IOMAN_SPIM0_REQ_CORE_IO_REQ, MXC_F_IOMAN_SPIM0_ACK_CORE_IO_ACK}) },
elijahsj 1:8a094db1347f 118 { P1_1, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spim1_req, &MXC_IOMAN->spim1_ack, MXC_F_IOMAN_SPIM1_REQ_CORE_IO_REQ, MXC_F_IOMAN_SPIM1_ACK_CORE_IO_ACK}) },
elijahsj 1:8a094db1347f 119 { P2_5, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spim2_req, &MXC_IOMAN->spim2_ack, MXC_F_IOMAN_SPIM2_REQ_CORE_IO_REQ, MXC_F_IOMAN_SPIM2_ACK_CORE_IO_ACK}) },
elijahsj 1:8a094db1347f 120 { NC, NC, 0 }
elijahsj 1:8a094db1347f 121 };
elijahsj 1:8a094db1347f 122
elijahsj 1:8a094db1347f 123 const PinMap PinMap_SPI_MISO[] = {
elijahsj 1:8a094db1347f 124 { P0_6, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spim0_req, &MXC_IOMAN->spim0_ack, MXC_F_IOMAN_SPIM0_REQ_CORE_IO_REQ, MXC_F_IOMAN_SPIM0_ACK_CORE_IO_ACK}) },
elijahsj 1:8a094db1347f 125 { P1_2, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spim1_req, &MXC_IOMAN->spim1_ack, MXC_F_IOMAN_SPIM1_REQ_CORE_IO_REQ, MXC_F_IOMAN_SPIM1_ACK_CORE_IO_ACK}) },
elijahsj 1:8a094db1347f 126 { P2_6, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spim2_req, &MXC_IOMAN->spim2_ack, MXC_F_IOMAN_SPIM2_REQ_CORE_IO_REQ, MXC_F_IOMAN_SPIM2_ACK_CORE_IO_ACK}) },
elijahsj 1:8a094db1347f 127 { NC, NC, 0 }
elijahsj 1:8a094db1347f 128 };
elijahsj 1:8a094db1347f 129
elijahsj 1:8a094db1347f 130 const PinMap PinMap_SPI_SSEL[] = {
elijahsj 1:8a094db1347f 131 { P0_7, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spim0_req, &MXC_IOMAN->spim0_ack, MXC_F_IOMAN_SPIM0_REQ_SS0_IO_REQ, MXC_F_IOMAN_SPIM0_ACK_SS0_IO_ACK}) },
elijahsj 1:8a094db1347f 132 { P1_3, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spim1_req, &MXC_IOMAN->spim1_ack, MXC_F_IOMAN_SPIM1_REQ_SS0_IO_REQ, MXC_F_IOMAN_SPIM1_ACK_SS0_IO_ACK}) },
elijahsj 1:8a094db1347f 133 { P2_7, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spim2_req, &MXC_IOMAN->spim2_ack, MXC_F_IOMAN_SPIM2_REQ_SS0_IO_REQ, MXC_F_IOMAN_SPIM2_ACK_SS0_IO_ACK}) },
elijahsj 1:8a094db1347f 134 { NC, NC, 0 }
elijahsj 1:8a094db1347f 135 };
elijahsj 1:8a094db1347f 136
elijahsj 1:8a094db1347f 137 /************PWM***************/
elijahsj 1:8a094db1347f 138 const PinMap PinMap_PWM[] = {
elijahsj 1:8a094db1347f 139 { P0_0, PWM_0, 1 }, { P2_0, PWM_0, 1 }, { P4_0, PWM_0, 1 },
elijahsj 1:8a094db1347f 140 { P0_1, PWM_1, 1 }, { P2_1, PWM_1, 1 }, { P4_1, PWM_1, 1 },
elijahsj 1:8a094db1347f 141 { P0_2, PWM_2, 1 }, { P2_2, PWM_2, 1 }, { P4_2, PWM_2, 1 },
elijahsj 1:8a094db1347f 142 { P0_3, PWM_3, 1 }, { P2_3, PWM_3, 1 }, { P4_3, PWM_3, 1 },
elijahsj 1:8a094db1347f 143 { P0_4, PWM_4, 1 }, { P2_4, PWM_4, 1 }, { P4_4, PWM_4, 1 },
elijahsj 1:8a094db1347f 144 { P0_5, PWM_5, 1 }, { P2_5, PWM_5, 1 }, { P4_5, PWM_5, 1 },
elijahsj 1:8a094db1347f 145 { P0_6, PWM_6, 1 }, { P2_6, PWM_6, 1 }, { P4_6, PWM_6, 1 },
elijahsj 1:8a094db1347f 146 { P0_7, PWM_7, 1 }, { P2_7, PWM_7, 1 }, { P4_7, PWM_7, 1 },
elijahsj 1:8a094db1347f 147 { P1_0, PWM_8, 1 }, { P3_0, PWM_8, 1 },
elijahsj 1:8a094db1347f 148 { P1_1, PWM_9, 1 }, { P3_1, PWM_9, 1 },
elijahsj 1:8a094db1347f 149 { P1_2, PWM_10, 1 }, { P3_2, PWM_10, 1 },
elijahsj 1:8a094db1347f 150 { P1_3, PWM_11, 1 }, { P3_3, PWM_11, 1 },
elijahsj 1:8a094db1347f 151 { P1_4, PWM_12, 1 }, { P3_4, PWM_12, 1 },
elijahsj 1:8a094db1347f 152 { P1_5, PWM_13, 1 }, { P3_5, PWM_13, 1 },
elijahsj 1:8a094db1347f 153 { P1_6, PWM_14, 1 }, { P3_6, PWM_14, 1 },
elijahsj 1:8a094db1347f 154 { P1_7, PWM_15, 1 }, { P3_7, PWM_15, 1 },
elijahsj 1:8a094db1347f 155 { NC, NC, 0 }
elijahsj 1:8a094db1347f 156 };
elijahsj 1:8a094db1347f 157
elijahsj 1:8a094db1347f 158 /************ADC***************/
elijahsj 1:8a094db1347f 159 const PinMap PinMap_ADC[] = {
elijahsj 1:8a094db1347f 160 { AIN_0, ADC, ADC_CH_0 },
elijahsj 1:8a094db1347f 161 { AIN_1, ADC, ADC_CH_1 },
elijahsj 1:8a094db1347f 162 { AIN_2, ADC, ADC_CH_2 },
elijahsj 1:8a094db1347f 163 { AIN_3, ADC, ADC_CH_3 },
elijahsj 1:8a094db1347f 164 { AIN_4, ADC, ADC_CH_0_DIV_5 },
elijahsj 1:8a094db1347f 165 { AIN_5, ADC, ADC_CH_1_DIV_5 },
elijahsj 1:8a094db1347f 166 { NC, NC, 0 }
elijahsj 1:8a094db1347f 167 };
elijahsj 1:8a094db1347f 168